DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of the Application
This Office Action is in response to Applicant’s application 18/542,811 filed on December 18 2023 in which claims 1 to 20 are pending.
Drawings
The drawings submitted on December 18 2023 have been reviewed and accepted by the Examiner.
Information Disclosure Statement
The Information Disclosure Statement (IDS), filed on December 26 2023 and October 21 2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosed therein has been considered by the Examiner.
Priority
Receipt is acknowledged of paper submitted under 35 U.S.C. 119(a)-(d) or under 35 U.S.C. 120, 121, 365(c), or 386(c) which has been placed of record in the file.
Notation
References to patents will be in the form of (C: L) where C is the column number and L is the line number. References to pre-grant patent publications will be to the paragraph number in the form of (¶ xxxx).
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claim 2 rejected under 35 U.S.C. 112, second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which applicant regards as the invention.
Claim 2 recites the following limitation: “… is twice or greater and four times or smaller the first trench interval.”
The following limitation renders claim 2 as indefinite for failing to particular point out and distinctly claim the subject matter and the office literally does not understand how interpret claim 2 because claim 1 state the second trench interval is greater than the first trench interval but can also be smaller. The claim must define one limitation with respect to the size of the second trench interval compared to the first trench interval. Claiming both features in the same claim does not further define this claim. Further all the drawing shows the second trench interval as greater than the first trench interval.
Second, the limitation and “four times” does not further limit the claim because claim 2 is defined as “twice or greater…” therefore the office does not understand what limitation “and four times mean”.
The office will interpret claim 2 as follow, that the second trench interval is twice or greater than the first trench interval.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1, 3-7 and 15-20 are rejected under AIA 35 U.S.C. 102(a)(1) as being anticipated by Naito (US 2019/0019885 A1).
Claims 1, 3-7 and 15-20 are rejected under 35 U.S.C. 103 as being unpatentable over
Regarding claim 1, Naito teaches a semiconductor device (Fig. 1-12) comprising a semiconductor substrate (10, Fig.11; ¶0032) provided with a drift region (18; Fig.11; ¶ 0080) of a first conductivity type (n-type; Fig.11), wherein
the semiconductor substrate (10) includes:
an active portion (region A; Fig.2; ¶ 0043); and
a trench portion (30; Fig.2; ¶0045) provided in the active portion at an upper surface of the semiconductor substrate (upper surface of the 10),
the active portion includes:
a first region (130; ¶ 0051) in which trench portions including the trench portion are arrayed at a first trench interval in an array direction (30 are arranged at an array in the X-direction); and
a second region (140, ¶ 0051) in which trench portions (30) including the trench portion are arrayed at a second trench interval greater than the first trench interval in the array direction (30 formed in the second region 140 are arranged at an array greater than 30 formed in 130; Fig.2),
the first region (130) includes a first bottom region (57; Fig.2; ¶ 0048) of a second conductivity type (p-type; fig.2; same conductivity as well region 17) provided over bottoms of at least two trench portions of the trench portions (57 formed in well region 17 provided over the bottom of 30 formed in region 130; Fig.2; ¶ 0048), and
the second region includes a second bottom region (57 formed in second region 140; Fig.2; ¶ 0048) of the second conductivity type (p-type; fig.2; same conductivity as well region 17) provided at a bottom of one trench portion of the trench portions (57 connection region is formed over only one trench in region 140; Fig.2).
Regarding claim 3, Naito teaches the second region includes a gate trench portion (44; Fig.2; ¶ 0086), and the second bottom region is provided at a bottom of the gate trench portion (57 is provided at a bottom of 30 as shown in Fig.2-3).
Regarding claim 4, Naito teaches wherein the semiconductor substrate further includes an outer circumferential well region of the second conductivity type which encloses the active portion in a top view (22, P-type; is formed under 51 in Fig.3; Fig.3 is cross section view of region A in Figure 2 and Figure 1 is a top view of region A in Figure 2; 51 is formed all around the device as shown in Figure 1; Therefore; 22 encloses the action portion from top view).
Regarding claim 5, Naito teaches wherein at least part of the second region (140) is sandwiched between two first regions (130) including the first region in the array direction (since there are matrix of regions of region A across an X-axis, then second region 140 is formed between multiple regions of 130; Fig.1).
Regarding claim 6, Naito teaches wherein the first bottom region (57; Fig.2) provided in one first region of the two first regions (130; Fig.2 and Fig.3) is electrically connected to the outer circumferential well region (all the layers are electrically connected; Fig.2 and Fig.3).
Regarding claim 7, Naito teaches wherein the second region (140; Fig.2) includes at least two trench portions of the trench portions (30 formed in region 140; Fig.2), the second bottom region is provided at a bottom of each of the two trench portions (57 is provided at a bottom of each 30; Fig.2), and the second bottom region is not provided at a center of a mesa portion sandwiched between the two trench portions (57 is not provided in the center of 30; Fig.2).
Regarding claim 15, Naito teaches wherein the semiconductor substrate further includes an outer circumferential well region of the second conductivity type which encloses the active portion in a top view (22, P-type; is formed under 51 in Fig.3; Fig.3 is cross section view of region A in Figure 2 and Figure 1 is a top view of region A in Figure 2; 51 is formed all around the device as shown in Figure 1; Therefore; 22 encloses the action portion from top view).
Regarding claim 16, Naito teaches wherein the semiconductor substrate further includes an outer circumferential well region of the second conductivity type which encloses the active portion in a top view (22, P-type; is formed under 51 in Fig.3; Fig.3 is cross section view of region A in Figure 2 and Figure 1 is a top view of region A in Figure 2; 51 is formed all around the device as shown in Figure 1; Therefore; 22 encloses the action portion from top view).
Regarding claim 17, Naito teaches wherein the second region (140; Fig.2) includes at least two trench portions of the trench portions (30 formed in region 140; Fig.2), the second bottom region is provided at a bottom of each of the two trench portions (57 is provided at a bottom of each 30; Fig.2), and the second bottom region is not provided at a center of a mesa portion sandwiched between the two trench portions (57 is not provided in the center of 30; Fig.2).
Regarding claim 18, Naito teaches wherein the second region (140; Fig.2) includes at least two trench portions of the trench portions (30 formed in region 140; Fig.2), the second bottom region is provided at a bottom of each of the two trench portions (57 is provided at a bottom of each 30; Fig.2), and the second bottom region is not provided at a center of a mesa portion sandwiched between the two trench portions (57 is not provided in the center of 30; Fig.2).
Regarding claim 19, Naito teaches wherein the second region (140; Fig.2) includes at least two trench portions of the trench portions (30 formed in region 140; Fig.2), the second bottom region is provided at a bottom of each of the two trench portions (57 is provided at a bottom of each 30; Fig.2), and the second bottom region is not provided at a center of a mesa portion sandwiched between the two trench portions (57 is not provided in the center of 30; Fig.2).
Regarding claim 20, Naito teaches wherein the second region (140; Fig.2) includes at least two trench portions of the trench portions (30 formed in region 140; Fig.2), the second bottom region is provided at a bottom of each of the two trench portions (57 is provided at a bottom of each 30; Fig.2), and the second bottom region is not provided at a center of a mesa portion sandwiched between the two trench portions (57 is not provided in the center of 30; Fig.2).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 2, 12 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Naito (US 2019/0019885 A1) as applied to claim 1 above, and further in view of Senoo (US 2016/0351561 A1).
Regarding claim 2 (as best as understood), Naito does not teach wherein the second trench interval is twice or greater and four times or smaller the first trench interval.
However, Senoo teaches a similar device and teaches wherein the second trench interval (40L; Fig.10; ¶ 0060) is twice or greater and four times (40 L can have a pitch of 40 µm; ¶ 0060) or smaller the first trench interval (30La; Fig.10; ¶0060; 30La can have a pitch of 6 µm; which is at least 4 times smaller than 40L with a pitch of 40 µm).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to have the second trench interval is twice or greater and four times or smaller the first trench interval in the device of Naito as taught by Senoo for the purpose of increasing the carrier concentration of the IGBT region (¶ 00061).
Regarding claim 12, Naito does not teach the second trench interval is greater than 1.6 times a length of the second bottom region in the array direction.
However, Senoo teaches the second trench interval (40L; Fig.6; ¶ 0060) is greater than 1.6 times a length of the second bottom region (40L; length of 3-7 µm; ¶ 0040) in the array direction (The second interval40 L can have a pitch of 40 µm which is greater than 1.6 times).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to have the second trench interval is greater than 1.6 times a length of the second bottom region in the array direction in the device of Naito as taught by Senoo for the purpose of increasing the carrier concentration of the IGBT region (¶ 00061).
Regarding claim 14, Naito teaches the second region includes a gate trench portion (44; Fig.2; ¶ 0086), and the second bottom region is provided at a bottom of the gate trench portion (57 is provided at a bottom of 30 as shown in Fig.2-3).
Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Naito (US 2019/0019885 A1) as applied to claim 1 above, and further in view of Tamura et al. (US 2016/0043073; hereinafter “Tamura”).
Naito teaches teach an interlayer dielectric film (26; Fig.2; ¶0073) provided above the semiconductor substrate (10) and including a contact hole (54; Fig.2; ¶ 0046).
Naito does not, wherein an opening width of the contact hole provided above the second region is greater an opening width of the contact hole provided above the first region.
However, Tamura teaches an opening width of the contact hole (8-2; Fig.1-2; ¶0091) provided above the second region (22; Fig.1-2) is greater an opening width of the contact hole (8-1; Fig.1-2; ¶ 0092) provided above the first region (21; Fig.1-2).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to have an opening width of the contact hole provided above the second region is greater an opening width of the contact hole provided above the first region in the device of Naito as taught by Tamura since such modification would have involved a mere change in size/shape of a component. A change in shape is generally recognized as being with the level of ordinary skill in the art MPEP § 2144.04 IV B.
Allowable Subject Matter
Claims 8-11 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim 8 is objected to since the prior art reference does not teach the following limitation: “…wherein part of the drift region is provided between two second bottom regions including the second bottom region which are adjacent to each other in the array direction” with each of the limitations of claims 7 AND 1.
Claim 9 is objected to since the prior art reference does not teach the following limitations: “…wherein the semiconductor substrate further includes an accumulation region of the first conductivity type, and part of the accumulation region is provided between two second bottom regions including the second bottom region which are adjacent to each other in the array direction.” with each of the limitations of claims 7 AND 1.
Claim 10 is objected to since the prior art reference does not teach the following limitations: “…an accumulation region of the first conductivity type, and a doping concentration of the accumulation region provided in the second region is lower than a doping concentration of the accumulation region provided in the first region.”
Claim 11 is objected to since claim 11 is dependent on claim 7.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Mounir S Amer whose telephone number is (571)270-3683. The examiner can normally be reached Monday-Friday 9:00-5:30.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eva Montalvo can be reached at (571) 270-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Mounir S Amer/Primary Examiner, Art Unit 2818