DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claim 14 objected because of the following informalities: claim 14 recites “quantum hardware”; it must be recited as “a quantum hardware”. Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 16 including depending claims 17-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention.
Claim 16 recites “a quantum computing system”. It is unclear if the bolded limitation refers to the previously claimed limitation recited in claim 1. Not only does the phrase in the claim lacks a definite article (e.g. the or said) but the limitation is inconsistently recited.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 4, 13-16 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Olivadese (US 2020/0151133 A1).
Claim 1: Olivadese discloses cryogenic cooling system (paragraph [14]: dilution fridges are cryogenic apparatus) for a quantum computing system (paragraph [40]: FIG.1 diagram of input line conditioning for quantum computing devices), the cryogenic cooling system (paragraph [14]) comprising
a plurality of stages (paragraph [14]: facilitate temperature transition and cooling operation plural stages; dilution fridges having 5-temperature stages, 77 K to 0.01 K), each stage associated with an operating temperature (paragraph [14]: facilitate temperature transition/cooling operation), each stage being progressively cooler when moving from a first stage of the plurality of stages to a subsequent stage of the plurality of stages (paragraph [41]: stages 102, 104, …106), wherein the first stage of the plurality of stages is associated with an operating temperature of about 60 kelvin or greater (paragraph [14]: dilution fridges having 5-temperature stages, 77 K to 0.01 K).
Claim 4: Olivadese discloses the apparatus as claimed in claim 1, wherein each stage comprises a cooling unit (paragraph [14]: dilution fridge used as cooling unit) and a thermal plate (paragraph [41]: transition plate used as thermal plate) thermally coupled to the cooling unit (paragraph [15]: plates and fridge).
Claim 13: Olivadese discloses the apparatus as claimed in claim 1, further comprising a dilution refrigerator with series connected mixing stages (paragraph [17]: transmission lines from one dilution fridge stage to the next dilution fridge stage through ports).
Claim 14: Olivadese discloses the apparatus as claimed in claim 13, wherein a first mixing stage of the series connected mixing stages (paragraph [41]: stages 102, 104, …106) is thermally coupled to a thermal plate (paragraph [41]: transition plate used as thermal plate) of a cooling stage associated with quantum hardware (paragraph [40]: quantum computing devices).
Claim 15: Olivadese discloses the apparatus as claimed in claim 14, wherein a second mixing stage of the series connected mixing stages (paragraph [41]: stages 102, 104, …106) is thermally coupled to a thermal plate (paragraph [41]: transition plate used as thermal plate) of an intermediate cooling stage (to clarify, intermediate cooling stage is a stage that is not the first stage, and that is not the last stage; for example the third stage out of 5-temperature stages) of the cryogenic cooling system (paragraph [14]).
Claim 16: Olivadese discloses the apparatus as claimed in claim a quantum computing system (paragraph [40]: FIG.1 diagram of input line conditioning for quantum computing devices) comprising:
one or more superconducting qubits (paragraph [13]: signals/pulses are used to control measure superconducting qubits);
one or more classical processors (paragraph [4]: computers used today known as classical computers);
one or more signal lines (paragraph [15]: transmission lines carry signals providing connection points for line ports of lines between two consecutive stages) coupled between the one or more superconducting qubits (paragraph [13]: signals/pulses are used to control measure superconducting qubits) and the one or more classical processors (paragraph [4]: computers used today known as classical computers);
one or more cryogenic cooling systems (paragraph [14]: dilution fridges are cryogenic apparatus) configured to cool the superconducting qubits (paragraph [13]).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 2, 3, 5-12, 17-20 are rejected under 35 U.S.C. 103 as being unpatentable over Olivadese (US 2020/0151133 A1).
Claim 2: Olivadese discloses the apparatus as claimed in claim 1, wherein the first stage (paragraph [41]: stages 102, 104, …106) is associated with an operating temperature (paragraph [14]: 77 K to 0.01 K), except for about 80 kelvin or greater.
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to modify the apparatus of Olivadese to include about 80 kelvin or greater in order to enhance cooling of processor, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art - Optimum value: MPEP 2144.05 II-B.
Claim 3: Olivadese discloses the apparatus as claimed in claim 1, wherein the first stage (paragraph [41]: stages 102, 104, …106) is associated with an operating temperature (paragraph [14]: 77 K to 0.01 K), except for in a range of about 80 kelvin to about 100 kelvin.
20It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to modify the apparatus of Olivadese to include in a range of about 80 kelvin to about 100 kelvin in order to enhance cooling of processor, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only skill in the art - Optimum Range: MPEP 2144.05 II-A.
Claim 5: Olivadese discloses the apparatus as claimed in claim 1, wherein the plurality of stages further comprise a second stage, a third stage, a fourth stage, a fifth stage (paragraph [41]: 5 temperature-stages), except for a sixth stage, and a seventh stage.
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to modify the apparatus of Olivadese to include a sixth stage, and a seventh stage in order to enhance cooling of processor, since it has been held that mere duplication of the essential working parts of a known device involves only routine skill in the art Duplication of parts: MPEP 2144.04 VI-B.
Claim 6: Olivadese as modified discloses the apparatus as claimed in claim 5, wherein the second stage (paragraph [41]: stages 102, 104, …106) is associated with an operating temperature, except for in a range of about 40 kelvin to about 60 kelvin.
20It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to further modify the apparatus of Olivadese to include in a range of about 40 kelvin to about 60 kelvin in order to enhance cooling of processor, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only skill in the art - Optimum Range: MPEP 2144.05 II-A.
Claim 7: Olivadese as modified discloses the apparatus as claimed in claim 5, wherein the third stage is associated with an operating temperature (paragraph [41]: stages 102, 104, …106), except for in a range of 10 kelvin to about 20 kelvin.
20It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to further modify the apparatus of Olivadese to include in a range of 10 kelvin to about 20 kelvin in order to enhance cooling of processor, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only skill in the art - Optimum Range: MPEP 2144.05 II-A.
Claim 8: Olivadese as modified discloses the apparatus as claimed in claim 5, wherein the fourth stage is associated with an operating temperature (paragraph [41]: stages 102, 104, …106), except for in a range of about 2.5 kelvin to about 4.2 kelvin.
20It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to further modify the apparatus of Olivadese to include in a range of about 2.5 kelvin to about 4.2 kelvin in order to enhance cooling of processor, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only skill in the art - Optimum Range: MPEP 2144.05 II-A.
Claim 9: Olivadese as modified discloses the apparatus as claimed in claim 5, wherein the fifth stage is associated with an operating temperature (paragraph [41]: stages 102, 104, …106), except for in a range of about 600 millikelvin to about 800 millikelvin.
20It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to further modify the apparatus of Olivadese to include in a range of about 600 millikelvin to about 800 millikelvin in order to enhance cooling of processor, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only skill in the art - Optimum Range: MPEP 2144.05 II-A.
Claim 10: Olivadese as modified discloses the apparatus as claimed in claim 5, wherein the sixth stage is associated with an operating temperature (Duplication of parts: MPEP 2144.04 VI-B as Olivadese was modified in claim 5), except for in a range of about 100 millikelvin to about 300 millikelvin.
20It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to further modify the apparatus of Olivadese to include in a range of about 100 millikelvin to about 300 millikelvin in order to enhance cooling of processor, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only skill in the art - Optimum Range: MPEP 2144.05 II-A.
Claim 11: Olivadese as modified discloses the apparatus as claimed in claim 5, wherein the seventh stage is associated with an operating temperature (Duplication of parts: MPEP 2144.04 VI-B as Olivadese was modified in claim 5), except for of about 10 millikelvin to about 100 millikelvin.
would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to further modify the apparatus of Olivadese to include of about 10 millikelvin to about 100 millikelvin in order to enhance cooling of processor, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only skill in the art - Optimum Range: MPEP 2144.05 II-A.
Claim 12: Olivadese discloses the apparatus as claimed in claim 1, wherein at least one of the plurality of stages (paragraph [41]: stages 102, 104, …106) comprises a wiring port configured to couple a signal line with a corresponding stage (paragraph [15]: transmission lines carry signals providing connection points for line ports of lines between two consecutive stages), except for of a second cryogenic system.
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to modify the apparatus of Olivadese to include a second cryogenic system in order to enhance cooling of processor, since it has been held that mere duplication of the essential working parts of a known device involves only routine skill in the art Duplication of parts: MPEP 2144.04 VI-B.
Claim 17: Olivadese discloses the apparatus as claimed in claim 16, wherein the one or more cryogenic cooling systems comprise a first cryogenic cooling system (paragraph [13]: cryogenic apparatus cooling operation), except for a second cryogenic cooling system.
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to modify the apparatus of Olivadese to include a second cryogenic cooling system in order to enhance cooling of processor, since it has been held that mere duplication of the essential working parts of a known device involves only routine skill in the art Duplication of parts: MPEP 2144.04 VI-B.
Claim 18: Olivadese as modified discloses the apparatus as claimed in claim 17, wherein the first cryogenic cooling system (paragraph [13]: cryogenic apparatus cooling operation) and the second cryogenic cooling system (Duplication of parts: MPEP 2144.04 VI-B as Olivadese was modified in claim 17) comprises consistent cooling stages (paragraph [14]: cooling operation consists of multiple thermally-isolated cooling stages of the dilution fridge).
Claim 19: Olivadese as modified discloses the apparatus as claimed in claim 17, wherein one or more stages (paragraph [14]: cooling operation consists of multiple thermally-isolated cooling stages of the dilution fridge) of the first cryogenic cooling system (paragraph [13]: cryogenic apparatus cooling operation) comprise a wiring port (paragraph [15]: transmission lines carry signals providing connection points for line ports of lines between two consecutive stages) configured to couple a signal line to a wiring port (It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to further modify the apparatus of Olivadese to include a wiring port for the second cryogenic cooling system in order to enhance cooling of processor, since it has been held that mere duplication of the essential working parts of a known device involves only routine skill in the art Duplication of parts: MPEP 2144.04 VI-B) of a corresponding stage of the second cryogenic cooling system (Duplication of parts: MPEP 2144.04 VI-B as Olivadese was modified in claim 17).
Claim 20: Olivadese as modified discloses the apparatus as claimed in claim 17, wherein the first cooling stage and the second cooling stage (paragraph [41]: stages 102, 104, …106) are associated with different manufacturers (intended use associated with different manufacturers; for example, manufactures based on laws of quantum mechanics and physics and computer processors, any manufacturers that uses these sciences).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure which is relevant to thermal management for superconducting connectors:
Tuckerman (US 2018/0294401 A1).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KAMRAN TAVAKOLDAVANI whose telephone number is (313)446-6612. The examiner can normally be reached on M-F 8:00 am to 5:00 pm EST.
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/KAMRAN TAVAKOLDAVANI/Examiner, Art Unit 3763
/PAUL ALVARE/Primary Examiner, Art Unit 3763