CTFR 18/543,345 CTFR 93307 DETAILED ACTION Amendments filed on 4/28/2026 have been entered. Claims 12, 17 cancelled. Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Claim Objections 07-29-01 AIA Claim 4 objected to because of the following informalities: each first-subsystem stage; it must be recited as “the each first-subsystem stage” . Appropriate correction is required. Claim Rejections - 35 USC § 112 07-30-02 AIA The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. 07-34-01 AIA Claim 19 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. Claim 19 recites “ a first-system stage ” and a second-system stage ”. It is unclear if the bolded limitations refer to the previously claimed limitations in claim 16. Not only do the phrases in claim 19 lack a definite article (e.g. the or said) but the limitation is inconsistently recited. Claim Rejections - 35 USC § 103 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-23-aia AIA The factual inquiries set forth in Graham v. John Deere Co. , 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. 07-21-aia AIA Claim s 1-11, 13-16, 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over Matthews (US 2023/0088083 A1), in view of Olivadese (US 2020/0151133 A1) . Claim 1 : Matthews discloses a cryogenic cooling system, the cryogenic cooling system (FIG.1) comprising: a first cryogenic cooling subsystem (annotated FIG.1) comprising a plurality of first-subsystem stages (annotated FIG.1), each first-subsystem stage associated with an operating temperature (paragraph [29] [32]: temperatures of stages 1-5), each first-subsystem stage (annotated FIG.1) being progressively cooler when moving from a first first-subsystem stage (thermal stage 1) of the plurality of first-subsystem stages to a subsequent first-subsystem stage of the plurality of first-subsystem stages (annotated FIG.1), wherein the first first-subsystem stage of the plurality of first-subsystem stages (annotated FIG.1) is associated with an operating temperature of about 60 kelvin or greater (paragraph [31]); [AltContent: textbox (first-subsystem stages)] [AltContent: ] [AltContent: textbox (FIG.1)] PNG media_image1.png 780 702 media_image1.png Greyscale Matthews discloses the claimed limitations in claim 1, but fails to disclose a quantum computing system, a second cryogenic cooling subsystem comprising a plurality of second-subsystem stages, each second-subsystem stage associated with an operating temperature, each second-subsystem stage being progressively cooler when moving from a first second-subsystem stage of the plurality of second-subsystem stages to a subsequent second-subsystem stage of the plurality of second-subsystem stages, wherein the first second-subsystem stage of the plurality of second- subsystem stages is associated with an operating temperature of about 60 kelvin or greater; and a plurality of wiring ports, each wiring port comprising a wiring connection between a respective first-subsystem stage of the plurality of first-subsystem stages and a corresponding second-subsystem stage of the plurality of second-subsystem stages. However, Olivadese teaches a quantum computing system (paragraph [40]), a plurality of wiring ports, each wiring port comprising a wiring connection between a respective first-subsystem stage of the plurality of first-subsystem stages (paragraph [15]: stages 102, 104-106; transition line in each dilution stage providing connection points for Line- of Sight LOS ports for transmission lines between two consecutive stages, nine LOS ports each allow 50 connections for transmission lines) for the purpose of allowing connections between transmission lines to carry signals (paragraph [15]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to modify the invention of Matthews to include a quantum computing system: a plurality of wiring ports, each wiring port comprising a wiring connection between a respective first-subsystem stage of the plurality of first-subsystem stages as taught by Olivadese in order to allow connections between transmission lines to carry signals. Further, concerning limitations “a second cryogenic cooling subsystem comprising a plurality of second-subsystem stages, each second-subsystem stage associated with an operating temperature, each second-subsystem stage being progressively cooler when moving from a first second-subsystem stage of the plurality of second-subsystem stages to a subsequent second-subsystem stage of the plurality of second-subsystem stages, wherein the first second-subsystem stage of the plurality of second- subsystem stages is associated with an operating temperature of about 60 kelvin or greater”. Since Matthews discloses the first cryogenic cooling subsystem including the first-subsystem stages and the first first-subsystem stage. Thus Matthews recognizes the cryogenic cooling systems and its benefits and functions. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to modify the apparatus of Matthews to include a second cryogenic cooling subsystem comprising a plurality of second-subsystem stages, each second-subsystem stage associated with an operating temperature, each second-subsystem stage being progressively cooler when moving from a first second-subsystem stage of the plurality of second-subsystem stages to a subsequent second-subsystem stage of the plurality of second-subsystem stages, wherein the first second-subsystem stage of the plurality of second- subsystem stages is associated with an operating temperature of about 60 kelvin or greater in order to facilitate cooling to achieve its goals, since it has been held that mere duplication of the essential working parts of a known device involves only routine skill in the art. Note that the applicant does not claim any criticality for the claimed limitations (Duplication of parts: MPEP 2144.04 VI-B). Claim 2 : Matthews as modified the apparatus as claimed in claim 1, wherein the first first-subsystem stage (annotated FIG.1) is associated with an operating temperature about 80 kelvin or greater (paragraph [32]). Claim 3 : Matthews as modified the apparatus as claimed in claim 1, wherein the first first-subsystem stage (annotated FIG.1) is associated with an operating temperature about 80 kelvin to about 100 kelvin (paragraph [32]). Claim 4 : Matthews as modified discloses the apparatus as claimed in claim 1, wherein each first-subsystem stage (annotated FIG.1) comprises a cooling unit (Olivadese, paragraph [14]: dilution fridge used as cooling unit) and a thermal plate (Olivadese, paragraph [41]: transition plate used as thermal plate) thermally coupled to the cooling unit (Olivadese, paragraph [15]: plates and fridge). Claim 5 : Matthews as modified the apparatus as claimed in claim 1, wherein the plurality of first-subsystem stages (annotated FIG.1) further comprise a second stage, a third stage, a fourth stage, a fifth stage (paragraph [29] [32]: temperatures of stages 1-5) a sixth stage, and a seventh stage (a sixth and seventh stages; Duplication of parts). Claim 6 : Matthews as modified discloses the apparatus as claimed in claim 5, wherein the second stage (paragraph [29] [32]: temperatures of stages 1-5) is associated with an operating temperature in a range of about 40 kelvin to about 60 kelvin (paragraph [32]). Claim 7 : Matthews as modified discloses the apparatus as claimed in claim 5, wherein the third stage (paragraph [29] [32]: temperatures of stages 1-5) is associated with an operating temperature in a range of about 10 kelvin to about 20 kelvin (paragraph [32]). Claim 8 : Matthews as modified discloses the apparatus as claimed in claim 5, wherein the fourth stage (paragraph [29] [32]: temperatures of stages 1-5) is associated with an operating temperature in a range of about 2.5 kelvin to about 4.2 kelvin (Optimum Range: MPEP 2144.05 II-A). Claim 9 : Matthews as modified discloses the apparatus as claimed in claim 5, wherein the fifth stage (paragraph [29] [32]: temperatures of stages 1-5) is associated with an operating temperature in a range of about 600 millikelvin to about 800 millikelvin (paragraph [31] [32]; Optimum Range: MPEP 2144.05 II-A). Claim 10 : Matthews as modified discloses the apparatus as claimed in claim 5, wherein the sixth stage is associated with an operating temperature in a range of about 600 millikelvin to about 800 millikelvin (sixth stage ; Duplication of parts; Optimum Range: MPEP 2144.05 II-A). Claim 11 : Matthews as modified discloses the apparatus as claimed in claim 5, wherein the seventh stage is associated with an operating temperature in a range of about 600 millikelvin to about 800 millikelvin (seventh stage ; Duplication of parts; Optimum Range: MPEP 2144.05 II-A). Claim 13 : Matthews as modified discloses the apparatus as claimed in claim 1, further comprising a dilution refrigerator with series connected mixing stages (Olivadese, paragraph [17]: transmission lines from one dilution fridge stage to the next dilution fridge stage through ports). Claim 14 : Matthews as modified discloses the apparatus as claimed in claim 13, wherein a first mixing stage of the series connected mixing stages (Olivadese, paragraph [41]: stages 102, 104, …106) is thermally coupled to a thermal plate (Olivadese, paragraph [41]: transition plate used as thermal plate) of a cooling stage associated with a quantum hardware (Olivadese, devises are hardware; paragraph [40]: quantum computing devices). Claim 15 : Matthews as modified discloses the apparatus as claimed in claim 14, wherein a second mixing stage of the series connected mixing stages (Matthews, Duplication of parts: MPEP 2144.04 VI-B) is thermally coupled to a thermal plate (Olivadese, paragraph [41]: transition plate used as thermal plate) of an intermediate cooling stage (to clarify, intermediate cooling stage is a stage that is not the first stage, and that is not the last stage; for example the third stage out of 5-temperature stages) of the cryogenic cooling system (paragraph [14]). Claim 16 : Matthews discloses a first cryogenic cooling system (annotated FIG.1) comprising a plurality of first-system stages (annotated FIG.1), each first-system stage associated with an operating temperature (paragraph [29] [32]: temperatures of stages 1-5), each first-system stage (annotated FIG.1) being progressively cooler when moving from a first first-system stage (thermal stage 1) of the plurality of first-system stages to a subsequent first-system stage of the plurality of first-subsystem stages (annotated FIG.1), wherein the first first-subsystem stage of the plurality of first-system stages (annotated FIG.1) is associated with an operating temperature of about 60 kelvin or greater (paragraph [31]); PNG media_image2.png 562 622 media_image2.png Greyscale Matthews discloses the claimed limitations in claim 16, but fails to disclose a quantum computing system comprises: a second cryogenic cooling system comprising a plurality of second-subsystem stages, each second-subsystem stage associated with an operating temperature, each second-system stage being progressively cooler when moving from a first second-system stage of the plurality of second-system stages to a subsequent second-system stage of the plurality of second-system stages, wherein the first second-system stage of the plurality of second- system stages is associated with an operating temperature of about 60 kelvin or greater; one or more first superconducting qubits located in the first cryogenic cooling system; one or more classical processors; one or more first signal lines coupled between the one or more first superconducting qubits and the one or more classical processors; a plurality of wiring ports, each wiring port comprising a wiring connection between a respective first system stage of the plurality of first system stages and a corresponding second system stage of the plurality of second system stages; and one or more second signal lines coupled between the one or more first superconducting qubits and the one or more second superconducting qubits via one or more wiring ports of the plurality of wiring ports. Concerning limitations “a second cryogenic cooling system comprising a plurality of second-system stages, each second-system stage associated with an operating temperature, each second-system stage being progressively cooler when moving from a first second-system stage of the plurality of second-system stages to a subsequent second-system stage of the plurality of second-system stages, wherein the first second-system stage of the plurality of second-system stages is associated with an operating temperature of about 60 kelvin or greater”. Since Matthews discloses the first cryogenic cooling system including the first-system stages and the first first-system stage. Thus Matthews recognizes the cryogenic cooling systems and its benefits and functions. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to modify the apparatus of Matthews to include a second cryogenic cooling system comprising a plurality of second-system stages, each second-system stage associated with an operating temperature, each second-system stage being progressively cooler when moving from a first second-system stage of the plurality of second-system stages to a subsequent second-system stage of the plurality of second-system stages, wherein the first second-system stage of the plurality of second- system stages is associated with an operating temperature of about 60 kelvin or greater in order to facilitate cooling to achieve its goals, since it has been held that mere duplication of the essential working parts of a known device involves only routine skill in the art. Note that the applicant does not claim any criticality for the claimed limitations (Duplication of parts: MPEP 2144.04 VI-B). Further, Olivadese teaches a quantum computing system (paragraph [40]) one or more first superconducting qubits (paragraph [13]: signals/pulses are used to control measure superconducting qubits) located in the first cryogenic cooling system (paragraph [15]: stages 102, 104-106); one or more classical processors (paragraph [4]: computers used today known as classical computers); one or more first signal lines (paragraph [15]: transmission lines carry signals providing connection points for line ports of lines between two consecutive stages) coupled between the one or more first superconducting qubits (paragraph [13]: signals/pulses are used to control measure superconducting qubits) and the one or more classical processors (paragraph [4]: computers used today known as classical computers); a plurality of wiring ports (paragraph [15]: transmission lines used as wiring ports), each wiring port comprising a wiring connection (paragraph [15]: transition line in each dilution stage providing connection points for Line- of Sight LOS ports for transmission lines between two consecutive stages, nine LOS ports each allow 50 connections for transmission lines) between a respective first system stage of the plurality of first system stages and a corresponding second system stage of the plurality of second system stages (to clarify, second system stage of the plurality of second system stages taught by Matthews; Duplication of parts); and one or more second signal lines (paragraph [15]) coupled between the one or more first superconducting qubits (paragraph [13]: signals/pulses are used to control measure superconducting qubits) and the one or more second superconducting qubits (paragraph [13]) via one or more wiring ports of the plurality of wiring ports (paragraph [15]: stages 102, 104-106; transition line in each dilution stage providing connection points for Line- of Sight LOS ports for transmission lines between two consecutive stages, nine LOS ports each allow 50 connections for transmission lines) for the purpose of allowing connections between transmission lines to carry signals (paragraph [15]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to modify the invention of Matthews to include a quantum computing system, one or more first superconducting qubits located in the first cryogenic cooling system; one or more classical processors; one or more first signal lines coupled between the one or more first superconducting qubits and the one or more classical processors; a plurality of wiring ports, each wiring port comprising a wiring connection between a respective first system stage of the plurality of first system stages and a corresponding second system stage of the plurality of second system stages; and one or more second signal lines coupled between the one or more first superconducting qubits and the one or more second superconducting qubits via one or more wiring ports of the plurality of wiring ports as taught by Olivadese in order to allow connections between transmission lines to carry signals. Claim 18 : Matthews as modified discloses the apparatus as claimed in claim 17, wherein the first cryogenic cooling system (annotated FIG.1) and the second cryogenic cooling system (Duplication of parts) comprises consistent cooling stages (paragraph [32]).. Claim 19 : Matthews as modified discloses the apparatus as claimed in claim 18, wherein the one or more first superconducting qubits (Olivadese, paragraph [13]: signals/pulses are used to control measure superconducting qubits) are located in a first-system stage (annotated FIG.1) associated with a first operating temperature in a range of about 10 millikelvin to about 100 millikelvin, and wherein the one or more second superconducting qubits are located in a second-system stage (Duplication of parts; Optimum Range: MPEP 2144.05 II-A) associated with a second operating temperature in a range of about 10 millikelvin to about 100 millikelvin (paragraph [31] [32]; Optimum Range: MPEP 2144.05 II-A). Claim 20 : Matthews as modified discloses the apparatus as claimed in claim 16, wherein the first cryogenic cooling system (annotated FIG.1) and the second cryogenic cooling system (Duplication of parts; Optimum Range: MPEP 2144.05 II-A) are associated with different manufacturers (intended use associated with different manufacturers; for example, manufactures based on laws of quantum mechanics and physics and computer processors, any manufacturers that uses these sciences) . Response to Arguments Applicant's arguments filed on , with respect to all the claims under Claim Rejections - 35 USC § 102 have been fully considered and they are moot. Applicant’s arguments to new features and amendments are addressed in this office action. Therefore, a new ground(s) of rejections have been made in response to the amendments. Conclusion 07-40 AIA Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL . See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to KAMRAN TAVAKOLDAVANI whose telephone number is (313)446-6612. The examiner can normally be reached on M-F 8:00 am to 5:00 pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Len Tran can be reached on (571)272-1184. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. 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If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /KAMRAN TAVAKOLDAVANI/Examiner, Art Unit 3763 /PAUL ALVARE/Primary Examiner, Art Unit 3763 Application/Control Number: 18/543,345 Page 2 Art Unit: 3763 Application/Control Number: 18/543,345 Page 4 Art Unit: 3763 Application/Control Number: 18/543,345 Page 5 Art Unit: 3763 Application/Control Number: 18/543,345 Page 6 Art Unit: 3763 Application/Control Number: 18/543,345 Page 7 Art Unit: 3763 Application/Control Number: 18/543,345 Page 8 Art Unit: 3763 Application/Control Number: 18/543,345 Page 9 Art Unit: 3763 Application/Control Number: 18/543,345 Page 10 Art Unit: 3763 Application/Control Number: 18/543,345 Page 11 Art Unit: 3763 Application/Control Number: 18/543,345 Page 12 Art Unit: 3763 Application/Control Number: 18/543,345 Page 13 Art Unit: 3763 Application/Control Number: 18/543,345 Page 14 Art Unit: 3763 Application/Control Number: 18/543,345 Page 15 Art Unit: 3763
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