Prosecution Insights
Last updated: April 19, 2026
Application No. 18/544,585

Inrush Current Limiting Circuit

Final Rejection §102§103
Filed
Dec 19, 2023
Examiner
CLARK, CHRISTOPHER JAY
Art Unit
2838
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
ABB Schweiz AG
OA Round
2 (Final)
76%
Grant Probability
Favorable
3-4
OA Rounds
2y 9m
To Grant
98%
With Interview

Examiner Intelligence

Grants 76% — above average
76%
Career Allow Rate
560 granted / 742 resolved
+7.5% vs TC avg
Strong +23% interview lift
Without
With
+23.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
18 currently pending
Career history
760
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
46.9%
+6.9% vs TC avg
§102
30.3%
-9.7% vs TC avg
§112
17.5%
-22.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 742 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant's arguments have been fully considered but they are not persuasive. In response to applicant's argument that the references fail to show certain features of the invention, it is noted that the features upon which applicant relies (i.e., that the re-trigger circuit acts to reset the current inrush limiting feature or that retrigger circuit is operated by positive voltage jumps) are not recited in the rejected claim(s). Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993). The previous objection to the drawings has been withdrawn. The previous rejections under 35 USC 112 have been withdrawn due to the amendments made. The previous rejection has been modified to address the amendments made. Claim Objections Claim 7 is objected to because of the following informalities: CLAIM 7: In line 2, after “PTC” insert --,--. Appropriate correction is required. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-3, 6, 9-16, and 19 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Losel (5,087,871). In re Claims 1, 10, and 14, Losel teaches an inrush current limiter circuit for a rectifier, wherein the inrush current limiter circuit provides a flow of a current between a rectifying part of the rectifier (1, col 2 lines 35-38) and a filter capacitance (C), comprising: a power stage comprising a power stage resistor (R) and a power stage transistor (F1) disposed in parallel circuit arrangement to the power stage resistor (col 2 lines 40-43); wherein the power stage resistor is configured to conduct an amount of the current depending on a state of the power stage transistor (col 3 lines 40-58); and wherein the power stage transistor is configured to conduct an amount of the current depending on a charging of a gate capacitance (C1) of the power stage transistor (col 3 lines 40-58); and a re-trigger circuit (3) configured to detect a DC bus voltage jump and to turn the transistor off when the re-trigger circuit detects that there has been a DC bus voltage jump (col 4 lines 34-60). In re Claims 2 and 15, Losel teaches a constant current source (4, col 2l line 60), wherein the constant current source is configured for charging the gate capacitance of the power stage transistor (col 2 lines 59-60). In re Claims 3 and 16, Losel teaches the constant current source is configured to charge the gate capacitance power stage transistor according to a configured time constant (time constant determined by R1 and C1, col 2 lines 54-62). In re Claims 6 and 19, Losel teaches a logic device (F2) to generate a control signal to turn the transistor off (col 4 lines 50-60). In re Claim 9, Losel teaches that the transistor is a MOSFET (col 2 lines 41-42). In re Claim 11, Losel teaches the power stage is arranged in the negative DC path as seen in the Figure. In re Claim 12, Losel teaches the current source 4 is supplied over a positive DC bus voltage of the rectifier as seen in the Figure. In re Claim 13, Losel teaches that the rectifier is a capacitor filter bridge rectifier (via C). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Losel (5,087,871) in view of Boulanger et al (3,935,511). In re Claim 8, Losel fails to specifically teach that resistor R is an NTC, PTC, or temperature independent power resistor. Boulanger teaches an inrush current limiting circuit as seen in Figure 3 that comprises a resistor 22b in parallel with a switch CRb. Boulanger further teaches that the resistor is a PTC (col 4 lines 39-45). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to implement the resistor R of Losel as a PTC as taught by Boulanger since it would allow the resistor R to further limit currents and prevent it from experiencing a potential overheating condition. Allowable Subject Matter Claims 5, 7, 18, and 20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. In re Claims 5 and 18, Losel fails to teach the re-trigger circuit comprises a comparator configured to compare a delayed voltage based on the DC bus voltage with an un-delayed voltage based on the DC bus voltage, and to determine that a DC bus voltage jump has been occurred when the comparison results in a difference voltage higher than a threshold value. In re Claims 7 and 20, Losel fails to teach the re-trigger circuit comprises a Schmitt trigger configured for detection of a DC bus voltage jump. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHRISTOPHER JAY CLARK whose telephone number is (571)270-1427. The examiner can normally be reached Monday - Friday, 10:00am - 6:00pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thienvu Tran can be reached at 571-270-1276. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CHRISTOPHER J CLARK/Examiner, Art Unit 2838 /THIENVU V TRAN/ Supervisory Patent Examiner, Art Unit 2838
Read full office action

Prosecution Timeline

Dec 19, 2023
Application Filed
Jul 26, 2025
Non-Final Rejection — §102, §103
Nov 06, 2025
Response Filed
Feb 19, 2026
Final Rejection — §102, §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
76%
Grant Probability
98%
With Interview (+23.0%)
2y 9m
Median Time to Grant
Moderate
PTA Risk
Based on 742 resolved cases by this examiner. Grant probability derived from career allow rate.

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