DETAILED ACTION
This office action is in response to the amendment filed on 01/15/2026.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-4, 7-10 and 13 is/are rejected under 35 U.S.C. 102(a)(2) as being unpatentable by Shen US 2020/0366204.
Regarding Claim 1, Shen teaches (Figure 3-7) a semiconductor device (fig. 7) comprising: a first switching circuit (left bridge) comprising four switches and a flying capacitor (C1); a second switching circuit (right bridge) comprising two switches (any two); and an inductor (L) connected between a first phase node (left phase node) of the first switching circuit to a second phase node (right phase node) of the second switching converter, wherein the first switching circuit and the second switching circuit are combined to implement a buck-boost voltage converter (par. 108) that performs DC to DC voltage conversion in a first direction (toward B terminal, par. 28) from the first phase node to the second phase node and DC to DC voltage conversion in a second direction (toward A, par. 28) from the second phase node to the first phase node. (For Example: Par. 32, 50 and 108-118)
Regarding Claims 2 and 8, Shen teaches (Figure 3-7) wherein: the four switches comprises a first high-side (s3) switch, a second HS switch (s1), a first low-side switch(s7), and a second LS switch connected in series (s5, fig. 7); the first LS switch (s7) is connected between the second LS switch (s5) and ground (gnd); the second LS switch (s5) is connected between the first phase node (left phase node) and the first LS switch (s7); the first HS switch (s3) is connected between the first phase node (left phase node) and the second HS switch (s1); the second HS switch (s1) is connected between the first HS switch (s3) and a first voltage interface (a+); the flying capacitor (c1) is connected across the second LS switch (s5) and the first HS switch (s3); the two switches comprises a third LS switch and a third HS switch ( s2 and s8); the third LS switch (s8) is connected between the second phase node (right phase node) and ground (gnd); and the third HS switch (s2) is connected between the second phase node (right phase node) and a second voltage interface (b+). (For Example: Par. 32, 50 and 108-118)
Regarding Claims 3 and 9, Shen teaches (Figure 3-7) wherein: a low-side switch (s8) in the second switching circuit is kept in an off state (during buck mode of right converter, see fig. 3); a high-side switch in the second switching circuit is kept in an on state (during buck mode of right side converter, see fig. 3); and the first switching circuit operates as a three-level buck voltage converter (par. 67-69). (For Example: Par. 32, 50 and 108-118)
Regarding Claims 4 and 10, Shen teaches (Figure 3-7) wherein: the first switching circuit (right side bridge) is switched under a first sequence to output a low voltage range (buck mode); and the first switching circuit is switched under a second sequence to output a high voltage range (Boost mode). (For Example: Par. 67-73)
Regarding Claim 7, Shen teaches (Figure 3-7) a system (at Figure 7) comprising: a controller (110); a circuit (11) comprising: a first switching circuit (left bridge) comprising four switches (S1,s3,s5 and s7) and a flying capacitor (C1); a second switching circuit (right bridge) comprising two switches (s2 and s8); and an inductor (L) connected between a first phase node of the first switching circuit to a second phase node of the second switching converter (left phase node and right phase node), wherein the first switching circuit and the second switching circuit are combined to implement a buck-boost voltage (par. 67-73) converter that performs voltage conversion in a first direction (toward B terminal, par. 28) from the first phase node to the second phase node and in a second direction (toward A terminal, par. 28) from the second phase node to the first phase node. (For Example: Par. 32, 50 and 108-118)
Regarding Claim 13, Shen teaches (Figure 3-7) wherein the controller (110) is configured to control a charge rate and a discharge rate of the inductor (L) to operate the circuit as a buck-boost voltage converter (see fig. 3, buck/boost mode). (For Example: Par. 32, 50 and 108-118)
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 5, 11, 14-17 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shen in view of Menzi US 20230268844 .
Regarding Claims 5, 11 and 17, Shen teaches (Figure 3-7) an apparatus.
Shen does not teach wherein: a first LS switch and a second LS switch in the first switching circuit are kept in an off state; a first HS switch and a second HS switch in the first switching circuit are kept in an on state; and the second switching circuit is switched under a specific sequence to operate as a two- level boost voltage converter.
Menzi teaches (Figures 2-3) wherein: a first LS switch and a second LS switch in the first switching circuit (12) are kept in an off state (T’a1-T’a2, Fig. 3 when Uan is higher than Ufb in boost mode); a first HS switch and a second HS switch in the first switching circuit (Ta1-Ta2) are kept in an on state (Fig. 3); and the second switching circuit (13) is switched under a specific sequence to operate as a two-level boost voltage converter (boost converter operation of 13, par. 62). (For Example: Par. 57-69)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Shen to include wherein: a first LS switch and a second LS switch in the first switching circuit are kept in an off state; a first HS switch and a second HS switch in the first switching circuit are kept in an on state; and the second switching circuit is switched under a specific sequence to operate as a two- level boost voltage converter, as taught by Menzi, for a wide voltage and frequency range.
Regarding Claim 14, Shen teaches (Figure 3-7) a system (at Figure 7) comprising: a controller (110); a circuit (11) comprising: a first switching circuit (left bridge) comprising four switches (S1,s3,s5 and s7) and a flying capacitor (C1); a second switching circuit (right bridge) comprising two switches (s2 and s8); and an inductor (L) connected between a first phase node of the first switching circuit to a second phase node of the second switching converter (left phase node and right phase node), wherein the first switching circuit and the second switching circuit are combined to implement a buck-boost voltage (par. 67-73) converter that performs voltage conversion in a first direction (toward B terminal, par. 28) from the first phase node to the second phase node and in a second direction (toward A terminal, par. 28) from the second phase node to the first phase node. (For Example: Par. 32, 50 and 108-118)
Shen does not teach a system comprising a battery.
Menzi teaches (Figures 2-3 and 15) a system (at Figure 7) comprising: a battery (703).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Shen to include a system comprising a battery, as taught by Menzi, to improve reliability by using different types of sources.
Regarding Claim 15, Shen teaches (Figure 3-7) wherein: the four switches comprises a first high-side (s3) switch, a second HS switch (s1), a first low-side switch(s7), and a second LS switch connected in series (s5, fig. 7); the first LS switch (s7) is connected between the second LS switch (s5) and ground (gnd); the second LS switch (s5) is connected between the first phase node (left phase node) and the first LS switch (s7); the first HS switch (s3) is connected between the first phase node (left phase node) and the second HS switch (s1); the second HS switch (s1) is connected between the first HS switch (s3) and a first voltage interface (a+); the flying capacitor (c1) is connected across the second LS switch (s5) and the first HS switch (s3); the two switches comprises a third LS switch and a third HS switch ( s2 and s8); the third LS switch (s8) is connected between the second phase node (right phase node) and ground (gnd); and the third HS switch (s2) is connected between the second phase node (right phase node) and a second voltage interface (b+). (For Example: Par. 32, 50 and 108-118)
Regarding Claim 16, Shen teaches (Figure 3-7) wherein: a low-side switch (s8) in the second switching circuit is kept in an off state (during buck mode of right converter, see fig. 3); a high-side switch in the second switching circuit is kept in an on state (during buck mode of right side converter, see fig. 3); and the first switching circuit operates as a three-level buck voltage converter (par. 67-69). (For Example: Par. 32, 50 and 108-118)
Regarding Claim 20, Shen teaches (Figure 3-7) wherein the controller (110) is configured to control a charge rate and a discharge rate of the inductor (L) to operate the circuit as a buck-boost voltage converter (see fig. 3, buck/boost mode). (For Example: Par. 32, 50 and 108-118)
Claim(s) 6 and 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shen in view of Menzi US 20230268844 and Su US 20190393702.
Regarding Claims 6 and 12, Shen teaches a system.
Shen does not teach wherein: a first LS switch and a second LS switch in the first switching circuit are kept in an off state; a first HS switch and a second HS switch in the first switching circuit are kept in an on state; a first LS switch in the second switching circuit is kept in an off state; a first HS switch in the second switching circuit is kept in an on state; and the first switching circuit and the second switching circuit operate in a pass through mode to pass voltage in one of the first direction and the second direction.
Menzi teaches (Figures 2-3) wherein: a first LS switch and a second LS switch in the first switching circuit (12) are kept in an off state (T’a1-T’a2, Fig. 3 when Uan is higher than Ufb in boost mode); a first HS switch and a second HS switch in the first switching circuit (Ta1-Ta2) are kept in an on state (Fig. 3). (For Example: Par. 57-69)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Shen to include wherein: a first LS switch and a second LS switch in the first switching circuit are kept in an off state; a first HS switch and a second HS switch in the first switching circuit are kept in an on state, as taught by Su, for high efficiency by way of limited power loss due to heat or switching losses.
Shen as modified does not teach a first LS switch in the second switching circuit is kept in an off state; a first HS switch in the second switching circuit is kept in an on state; and the first switching circuit and the second switching circuit operate in a pass through mode to pass voltage in one of the first direction and the second direction.
Su teaches (Figures 1-3) a first LS switch (216) in the second switching circuit is kept in an off state (with path 248); a first HS switch (218) in the second switching circuit is kept in an on state (with path 248); and the first switching circuit (212 and 210) and the second switching circuit (216-218) operate in a pass through mode (par. 38) to pass voltage in one of the first direction (path 248) and the second direction. (For Example: Par. 28-40)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Menzi to include a first LS switch in the second switching circuit is kept in an off state; a first HS switch in the second switching circuit is kept in an on state; and the first switching circuit and the second switching circuit operate in a pass through mode to pass voltage in one of the first direction and the second direction, as taught by Su, for high efficiency by way of limited power loss due to heat or switching losses.
Claim(s) 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shen and Menzi in view of Su US 20190393702.
Regarding Claim 18, Shen teaches the system.
Shen does not teach wherein the controller is configured to: maintain a first LS switch and a second LS switch in the first switching circuit in an off state; maintain a first HS switch and a second HS switch in the first switching circuit in an on state; maintain a first LS switch in the second switching circuit in an off state; maintain a first HS switch in the second switching circuit in an on state; and operate the circuit in a pass through mode to pass voltage in the first direction to charge the battery.
Menzi teaches (Figures 2-3) wherein: a first LS switch and a second LS switch in the first switching circuit (12) are kept in an off state (T’a1-T’a2, Fig. 3 when Uan is higher than Ufb in boost mode); a first HS switch and a second HS switch in the first switching circuit (Ta1-Ta2) are kept in an on state (Fig. 3). (For Example: Par. 57-69)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Shen to include wherein: a first LS switch and a second LS switch in the first switching circuit are kept in an off state; a first HS switch and a second HS switch in the first switching circuit are kept in an on state, as taught by Su, for high efficiency by way of limited power loss due to heat or switching losses.
Shen as modified does not teach a first LS switch in the second switching circuit is kept in an off state; a first HS switch in the second switching circuit is kept in an on state; and the first switching circuit and the second switching circuit operate in a pass through mode to pass voltage in one of the first direction and the second direction to charge the battery.
Su teaches (Figures 1-3) a first LS switch (216) in the second switching circuit is kept in an off state (with path 248); a first HS switch (218) in the second switching circuit is kept in an on state (with path 248); and the first switching circuit (212 and 210) and the second switching circuit (216-218) operate in a pass through mode (par. 38) to pass voltage in one of the first direction (path 248) and the second direction to charge the battery (228). (For Example: Par. 28-40)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Menzi to include a first LS switch in the second switching circuit is kept in an off state; a first HS switch in the second switching circuit is kept in an on state; and the first switching circuit and the second switching circuit operate in a pass through mode to pass voltage in one of the first direction and the second direction to charge the battery, as taught by Su, for high efficiency by way of limited power loss due to heat or switching losses.
Claim(s) 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shen and Menzi in view of Lim US 2017/0279284.
Regarding Claim 19, Shen teaches (Figure 3-7) the system.
Menzi does not teach further comprising a load, wherein the controller is configured to turn off the four switches in the first switching circuit and turn off the two switches in the second switching circuit to discharge the battery to the load under an on-the-go (OTG) mode.
Lim teaches (Figures 1-2) further comprising a load (at 116c), wherein the controller is configured to turn off the four switches in the first switching circuit (202, par. 30) and turn off the two switches in the second switching circuit (204 with beft2 off) to discharge the battery to the load under an on-the-go (OTG) mode (Par. 30 recites “In a sixth operational scenario, only the input voltage (VIN2) at the second USB-C-2 connector is present. Thus, if the second battery charger 204 is not in the CC mode and the second battery transistor switch BFET2 is turned off, then only the battery stack or cells 219 can supply the VSYS load via BFET1.”). (For Example: Par. 28-40)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Menzi to include further comprising a load, wherein the controller is configured to turn off the four switches in the first switching circuit and turn off the two switches in the second switching circuit to discharge the battery to the load under an on-the-go (OTG) mode, as taught by Su, to significantly increase the battery charging speed.
Response to Arguments
Applicant’s arguments with respect to the claim(s) have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to GUSTAVO A ROSARIO-BENITEZ whose telephone number is (571)270-7888. The examiner can normally be reached M-F 9AM-5PM.
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/GUSTAVO A ROSARIO-BENITEZ/Primary Examiner, Art Unit 2838