DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on February 6, 2026 was filed in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Response to Amendment
The amendment filed February 6, 2026 has been accepted and entered. Accordingly, claims 24-25, 27-28, 33-34, 36, 41, and 42 are amended.
Claims 24-43 are pending in this application.
In view of the amendment, the objection to claim 28 has been withdrawn.
Response to Arguments
Applicant's arguments filed February 6, 2026 have been fully considered but they are not persuasive.
Applicant’s arguments with respect to claims 24-25, 36 and 41 have been considered but are moot because the new ground of rejection relies on the references not applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Regarding Applicant’s argument with respective to claim 26 that “However, the specific sequence recited in claim 26-first across bit positions in the modulation symbol, then across modulation symbols in the pre-DFT time domain, and then across MIMO layers-is not explicitly disclosed by Frenne” (Response filed February 6, 2026, Page 9). Examiner respectfully disagrees with Applicant.
Frenne teaches “it may be considered to use a mapping across Pre-DFTS-OFDM time first, then across layer” (Frenne [Para. 0071]), “it may be considered to provide a mapping within symbols of a CBB or data block, then across layers” ([Para. 0073]), and “The input coded bit sequence may be mapped to modulation symbols according to: Input coded bit sequence->Bits_mod_symb_0a, bits_mod_symb_0b, bits_mod_symb_1a, bits_mod_symb_1b, . . ..” (Frenne [Para. 0074and 0075]). According to Frenne, both mapping within symbols and mapping across Pre-DFTS-OFDM time can be performed before layer mapping. Frenne further teaches “the bits of a data block may be modulated to provide N modulation symbols. The modulation may be block-wise mapped to layers. In some variants, a time domain mapping like a pre-DFT-time mapping may be performed before a layer domain mapping” (Frenne [Para. 0086]). Paragraph 0086 provides a context that mapping across bit positions in a modulation symbol is performed before layer mapping. That paragraph 0086 states mapping in a pre-DFT-time domain is performed before layer mapping without stating before the mapping across bit positions in a modulation symbol in the context of mapping within a modulation symbol is performed before layer mapping indicates that mapping in a pre-DFT-time domain is to be performed before layer mapping but not before with mapping within symbols. In another word, paragraph 0086 teaches the sequence of first mapping across bit positions in a modulation symbol, then mapping in a pre-DFT-time domain, and then layer mapping.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 24-29, 35 and 41-42 are rejected under 35 U.S.C. 103 as being unpatentable over Frenne et al. (US20240048422A1, hereinafter Frenne) in view of ETSI EN 302 755 (ETSI EN 302 755 V1.4.1, hereinafter EN 302.755).
For claim 24. Frenne teaches one or more non-transitory computer-readable media (NTCRM) having instructions, stored thereon ([Para. 0195], a computer processor and a memory coupled to the processor, wherein the memory is encoded with one or more programs or program products that execute the services, functions and steps disclosed herein. [Para. 0128], Examples for memories comprise volatile and non-volatile memory Random Access Memory (RAM), and/or Read-Only-Memory (ROM), and/or flash memory), that when executed by one or more processors ([Para. 0058], a program product comprising instructions causing processing circuitry to control and/or perform a method as described herein), cause a device of a wireless cellular network to ([Para. 0094], a wireless device or terminal 10 or a UE (User Equipment, configured for cellular communication with a network): encode bits of control information using Polar code ([Para. 0153], Transmitting signaling, in particular control signaling may comprise encoding. Encoding may comprise forward error correction encoding. Forward error correction coding may comprise polar coding); and map the coded bits for transmission based on a multiple input, multiple output (MIMO) layer index ([Para. 0150], a code block may comprise error correction bits. An error correction coding scheme may be used for determining the error correction bits based on polar coding. [Para. 0069], a mapping of a single codeword or code block to multiple layers using Discrete Fourier Transform-Spread-Orthogonal Frequency Division Multiplexing (DFT-S-OFDM) is used. A mapping may comprise multiple mappings, e.g. sub- or partial mappings, which may be represented to be provided in an order. [Para. 0071], it may be considered to use a mapping across Pre-DFT-S-OFDM time first, then across layer, then across time (OFDM symbols). Mapping across time may be linear (in increasing order), but other approaches may be used [Examiner’s Note: Time is the time index and mapping of bits or symbols in code word in increasing order of time is mapping in time index]. [Para. 0073], In a further alternative, it may be considered to provide a mapping within symbols of a data block, then across layers. [Para. 0074] and [FIG. 1], An input coded bit sequence (representing the content of the data block) may be provided. The input coded bit sequence may be mapped to modulation symbols [Examiner’s Note: Mapping in a modulation symbol can be performed before mapping across layers]. [Para. 0086], the bits of a data block may be modulated to provide N modulation symbols. The modulation may be block-wise mapped to layers. In some variants, a time domain mapping like a pre-DFT-time mapping may be performed before a layer domain mapping. [Para. 0085], MIMO precoding may be defined to preserve PAPR, e.g. two layers may not be combined through the same power amplifier/antenna port), a time index in a pre-discrete Fourier transform (DFT) time domain ([Para. 0071], it may be considered to use a mapping across Pre-DFT-S-OFDM time first, then across layer, then across time (OFDM symbols). Mapping across time may be linear (in increasing order). [Para. 0086], the bits of a data block may be modulated to provide N modulation symbols. The modulation may be block-wise mapped to layers. In some variants, a time domain mapping like a pre-DFT-time mapping may be performed before a layer domain mapping) and a real and imaginary part dimension of a modulation symbol constellation.
Although teaching mapping of coded bits across bit positions in modulation symbols, Frenne does not explicitly disclose and map the coded bits for transmission based on a multiple input, multiple output (MIMO) layer index, a time index in a pre-discrete Fourier transform (DFT) time domain and a real and imaginary part dimension of a modulation symbol constellation.
EN 302.755 teaches and map the coded bits for transmission based on a multiple input, multiple output (MIMO) layer index, a time index in a pre-discrete Fourier transform (DFT) time domain and a real and imaginary part dimension of a modulation symbol constellation ([Page 46], the words of width Nsubstreams are split into two cell words of width ηMOD= Nsubstreams /2 at the output of the demultiplexer. The first ηmod = Nsubstreams /2 bits [b0,do..bNsubstreams/2-1,do] form the first of a pair of output cell words [y0,2do.. yηmod-1, 2do] and the remaining output bits [bNsubstreams/2, do..bNsubstreams-1,do] form the second output cell word [y0, 2do+1..yηmod-1,2do+1] fed to the constellation mapper [Examiner’s Note: The cell words correspond to modulation symbols. The first cell word comprises the bits in even positions and the second in odd positions]. [Page 47], Table 14(d): Constellation mapping for real part of 16-QAM are bits, y0,q and y2,q mapped in real part dimension. Table 14(e) Constellation mapping for imaginary part of 16-QAM are bits, y1,q and y3,q, mapped in imaginary part dimension [Examiner’s Note: The mapping is based on bit positions as the bit indexes indicate])
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the apparatus of Frenne, so that the mapping is based on a real and imaginary part dimension of a modulation symbol constellation, as taught by EN 302.755. The modification would have implemented channel coding/modulation system for generic data streams (EN 302.755 [Page 9 Scope]).
For claim 25, Freene and EN 302.755 teach the one or more NTCRM of claim 24. The reference further teach wherein the coded bits are mapped for transmission based further on bit positions in a modulation symbol of the modulation symbol constellation (EN 302.755 [Page 43], 6.2 Mapping bits onto constellations. 6.2.1 Bit to cell word de-multiplexer. The bit-stream vdi from the bit interleaver is de-multiplexed into Nsubstreams sub-streams, as shown in figure 14. [Page 46], the words of width Nsubstreams are split into two cell words of width ηMOD= Nsubstreams /2 at the output of the demultiplexer. The first ηmod = Nsubstreams /2 bits [b0,do..bNsubstreams/2-1,do] form the first of a pair of output cell words [y0,2do.. yηmod-1, 2do] and the remaining output bits [bNsubstreams/2, do..bNsubstreams-1,do] form the second output cell word [y0, 2do+1..yηmod-1,2do+1] fed to the constellation mapper [Examiner’s Note: The cell words correspond to modulation symbols. The first cell word comprises the bits in even positions and the second in odd positions]. EN 302.755 [Page 46], 6.2.2 Cell word mapping into I/Q constellations. Each cell word (y0,q..yηmod-1,q) from the demultiplexer in clause 6.2.1 shall be modulated using either QPSK, 16-QAM, 64-QAM or 256-QAM constellations to give a constellation point zq. [Page 47], Table 14(d): Constellation mapping for real part of 16-QAM are bits, y0,q and y2,q mapped in real part dimension. Table 14(e) Constellation mapping for imaginary part of 16-QAM are bits, y1,q and y3,q, mapped in imaginary part dimension).
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the apparatus of Frenne, so that the mapping on a real and imaginary part dimension of a modulation symbol constellation is based on bit positions, as taught by EN 302.755. The modification would have implemented channel coding/modulation system for generic data streams (EN 302.755 [Page 9 Scope]).
For claim 26, Frenne and EN 302.755 teach the one or more NTCRM of claim 25. The reference further discloses wherein the coded bits are mapped across bit positions in the modulation symbol (Frenne [Para. 0071], it may be considered to use a mapping across Pre-DFTS-OFDM time first, then across layer. Frenne [Para. 0073], it may be considered to provide a mapping within symbols of a CBB or data block, then across layers. [Para. 0074 and 0075] and [FIG. 1], The input coded bit sequence may be mapped to modulation symbols according to: Input coded bit sequence->Bits_mod_symb_0a, bits_mod_symb_0b, bits_mod_symb_1a, bits_mod_symb_1b, . . ..[Examiner’s Note: Bits are mapped within symbols and across symbols]. Frenne [Para. 0086], the bits of a data block may be modulated to provide N modulation symbols. The modulation may be block-wise mapped to layers. In some variants, a time domain mapping like a pre-DFT-time mapping may be performed before a layer domain mapping [Examiner’s Note: Paragraphs 0071, 0073-0075 and 0086 teach the sequence of first mapping across bit positions in a modulation symbol, then mapping in a pre-DFT-time domain, and then layer mapping]), then across modulation symbols in the pre-DFT time domain (Frenne [Para. 0071], it may be considered to use a mapping across Pre-DFTS-OFDM time first, then across layer. Frenne [Para. 0073], it may be considered to provide a mapping within symbols of a CBB or data block, then across layers. Frenne [Para. 0086], the bits of a data block may be modulated to provide N modulation symbols. The modulation may be block-wise mapped to layers. In some variants, a time domain mapping like a pre-DFT-time mapping may be performed before a layer domain mapping), and then across the MIMO layers (Frenne [Para. 0071], it may be considered to use a mapping across Pre-DFTS-OFDM time first, then across layer. Frenne [Para. 0073], it may be considered to provide a mapping within symbols of a CBB or data block, then across layers. Frenne [Para. 0086], the bits of a data block may be modulated to provide N modulation symbols. The modulation may be block-wise mapped to layers. In some variants, a time domain mapping like a pre-DFT-time mapping may be performed before a layer domain mapping).
For claim 27, Frenne and EN 302.755 teach the one or more NTCRM of claim 25. The reference further discloses wherein the coded bits are mapped across the pre-DFT time domain (Frenne [Para. 0071], a mapping across Pre-DFTS-OFDM time first, then across layer, then across time (OFDM symbols)), then across the bit positions in the modulation symbol (Frenne [Para. 0080], modulation may be performed, e.g. to map bit to modulation symbols. Frenne [Para. 0087], a mapping may be according to Encoder → Modulation → codeword (CW) to Layer mapping), and then across the MIMO layers (Frenne [Para. 0086], the bits of a data block may be modulated to provide modulation symbols. The modulation may be block-wise mapped to layers. N modulation symbols and with M layers. With M=2, N/2 first modulated symbols may be mapped to layer 0, the N/2 last modulated symbols to layer 1. Frenne [Para. 0087], a mapping may be according to Encoder → Modulation → CW to Layer mapping …. → MIMO precoding).
For claim 28, Frenne and EN 302.755 teach the one or more NTCRM of claim 25. The reference further discloses wherein the coded bits are mapped across the bit position in the modulation symbol (Frenne [Para. 0074], The input coded bit sequence may be mapped to modulation symbols according to: Frenne [Para. 0075] and [FIG. 1], Input coded bit sequence->Bits_mod_symb_0a, bits_mod_symb_0b, bits_mod_symb_1a, bits_mod_symb_1b, . . ..[Examiner’s Note: Bits are mapped within symbols and across symbols]), then across the pre-DFT time domain (Frenne [Para. 0080], modulation may be performed, e.g. to map bit to modulation symbols. Frenne [Para. 0086], the bits of a data block may be modulated to provide modulation symbols. The modulation may be block-wise mapped to layers. A time domain mapping like a pre-DFT-time mapping may be performed before a layer domain mapping. Frenne [Para. 0087], a mapping may be according to Encoder → Modulation → codeword (CW) to Layer mapping. Frenne [Para. 0088], A codeword may in general comprise the modulation symbols representing a data block, and a data block may be considered to be represented by a codeword), and then across the MIMO layers (Frenne [Para. 0086], the bits of a data block may be modulated to provide modulation symbols. The modulation may be block-wise mapped to layers. N modulation symbols and with M layers. With M=2, N/2 first modulated symbols may be mapped to layer 0, the N/2 last modulated symbols to layer 1. [Para. 0087], a mapping may be according to Encoder → Modulation → CW to Layer mapping …. → MIMO precoding).
For claim 29, Frenne and EN 302.755 teach the one or more NTCRM of claim 25. The reference further discloses wherein the coded bits are first mapped across the pre-DFT time domain (Frenne [Para. 0069], a mapping of a single codeword to multiple layers using DFTS-OFDM is used. [Para. 0071], a mapping across Pre-DFTS-OFDM time first, then across layer), then across the MIMO layers (Frenne [Para. 0071], a mapping across Pre-DFTS-OFDM time first, then across layer), and then across the bit positions in the modulation symbols (Frenne [Para. 0083], The transmission chain may provide mapping as: Information bits→Encoder (+CRC) (providing error coding), providing N coded bits→N coded bits to Layer mapping→Modulation per layer→DFT-S precoding per layer MIMO precoding. Frenne [Para. 0084], encoded bits of the data block may be distributed across the two (or more) layers first, then a modulation may be applied per layer. Frenne [Para. 0074], The input coded bit sequence may be mapped to modulation symbols according to: Frenne [Para. 0075] and [FIG. 1], Input coded bit sequence->Bits_mod_symb_0a, bits_mod_symb_0b, bits_mod_symb_1a, bits_mod_symb_1b, . . ..).
For claim 35, Freene disclose the one or more NTCRM of claim 24. The reference further discloses wherein the device is a user equipment (UE) and the control information is uplink control information (UCI); or
wherein the device is a next generation Node B (gNB) and the control information is downlink control information (DCI) (Frenne [Para. 0010], The transmission of the data block may be downlink, if the transmitting radio node is a network node. Frenne [Para. 0095] and [FIG. 3], a network node 100, for example a gNB. [Para. 0026], the data signaling comprises control information. The control information may be DCI).
For claim 41, Frenne teaches an apparatus to be implemented in a next generation Node B (gNB) ([Para. 0095] and [FIG. 3], a network node 100, a gNB); the apparatus comprising: a processor circuitry to generate downlink control information (DCI) ([Para. 0095] and [FIG. 3], processing circuitry 120. The node 100, respectively its circuitry, may be adapted to perform any of the methods of operating a network node or a radio node as described herein. [Para. 0026], the data signaling comprises control information. The control information may be DCI); and encoder circuitry coupled to the processor circuitry ([Para. 0095], The node 100, respectively its circuitry, may be adapted to perform any of the methods of operating a network node or a radio node as described herein; in particular, it may comprise corresponding circuitry, e.g. processing circuitry and modules. [Para. 0150], An error correction coding scheme may be used for determining the error correction bits based on polar coding); the encoder circuitry to: encode bits of the DCI using Polar code to obtain coded bits ([Para. 0153], Transmitting signaling, in particular control signaling may comprise encoding. Encoding may comprise forward error correction encoding. Forward error correction coding may comprise polar coding. [Para. 0026], the data signaling comprises control information. The control information may be DCI); and map the coded bits for transmission based on a multiple input, multiple output (MIMO) layer index ([Para. 0150], a code block may comprise error correction bits. An error correction coding scheme may be used for determining the error correction bits based on polar coding. [Para. 0069], a mapping of a single codeword or code block to multiple layers using Discrete Fourier Transform-Spread-Orthogonal Frequency Division Multiplexing (DFT-S-OFDM) is used. A mapping may comprise multiple mappings, e.g. sub- or partial mappings, which may be represented to be provided in an order. [Para. 0071], it may be considered to use a mapping across Pre-DFT-S-OFDM time first, then across layer, then across time (OFDM symbols). Mapping across time may be linear (in increasing order), but other approaches may be used [Examiner’s Note: Time is the time index and mapping of bits or symbols in code word in increasing order of time is mapping in time index]. [Para. 0073], In a further alternative, it may be considered to provide a mapping within symbols of a data block, then across layers. [Para. 0074] and [FIG. 1], An input coded bit sequence (representing the content of the data block) may be provided. The input coded bit sequence may be mapped to modulation symbols [Examiner’s Note: Mapping in a modulation symbol can be performed before mapping across layers]. [Para. 0086], the bits of a data block may be modulated to provide N modulation symbols. The modulation may be block-wise mapped to layers. In some variants, a time domain mapping like a pre-DFT-time mapping may be performed before a layer domain mapping. [Para. 0085], MIMO precoding may be defined to preserve PAPR, e.g. two layers may not be combined through the same power amplifier/antenna port), a time index in a pre-discrete Fourier transform (DFT) time domain ([Para. 0071], it may be considered to use a mapping across Pre-DFT-S-OFDM time first, then across layer, then across time (OFDM symbols). Mapping across time may be linear (in increasing order). [Para. 0086], the bits of a data block may be modulated to provide N modulation symbols. The modulation may be block-wise mapped to layers. In some variants, a time domain mapping like a pre-DFT-time mapping may be performed before a layer domain mapping), and bit positions in a modulation symbol with quadrature amplitude modulation (QAM) ([Para. 0074], The input coded bit sequence may be mapped to modulation symbols according to: [Para. 0075] and [FIG. 1], Input coded bit sequence->Bits_mod_symb_0a, bits_mod_symb_0b, bits_mod_symb_1a, bits_mod_symb_1b, . . .. [Para. 0037], The modulation and/or coding scheme may in particular refer to the modulation (e.g., n-QAM)).
Although teaching mapping of coded bits across bit positions in modulation symbols, Frenne does not explicitly disclose and map the coded bits for transmission based on a multiple input, multiple output (MIMO) layer index, a time index in a pre-discrete Fourier transform (DFT) time domain, a real and imaginary part dimension of a modulation symbol constellation, and bit positions in a modulation symbol with quadrature amplitude modulation (QAM).
EN 302.755 teaches and map the coded bits for transmission based on a multiple input, multiple output (MIMO) layer index, a time index in a pre-discrete Fourier transform (DFT) time domain, a real and imaginary part dimension of a modulation symbol constellation, and bit positions in a modulation symbol with quadrature amplitude modulation (QAM) ([Page 46], the words of width Nsubstreams are split into two cell words of width ηMOD= Nsubstreams /2 at the output of the demultiplexer. The first ηmod = Nsubstreams /2 bits [b0,do..bNsubstreams/2-1,do] form the first of a pair of output cell words [y0,2do.. yηmod-1, 2do] and the remaining output bits [bNsubstreams/2, do..bNsubstreams-1,do] form the second output cell word [y0, 2do+1..yηmod-1,2do+1] fed to the constellation mapper [Examiner’s Note: The cell words correspond to modulation symbols. The first cell word comprises the bits in even positions and the second in odd positions]. [Page 47], Table 14(d): Constellation mapping for real part of 16-QAM are bits, y0,q and y2,q mapped in real part dimension. Table 14(e) Constellation mapping for imaginary part of 16-QAM are bits, y1,q and y3,q, mapped in imaginary part dimension [Examiner’s Note: The mapping is based on bit positions as the bit indexes indicate])
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the apparatus of Frenne, so that the mapping is based on a real and imaginary part dimension of a modulation symbol constellation, as taught by EN 302.755. The modification would have implemented channel coding/modulation system for generic data streams (EN 302.755 [Page 9 Scope]).
For claim 42, Frenne and EN 302.755 teach the apparatus of claim41. The reference further discloses wherein the coded bits (Frenne [Para. 0153], Transmitting signaling, in particular control signaling comprises encoding. Encoding may comprise forward error correction encoding. Forward error correction coding may comprise polar coding) are mapped: across bit positions in the modulation symbol (Frenne [Para. 0074], The input coded bit sequence may be mapped to modulation symbols according to: Frenne [Para. 0075] and [FIG. 1], Input coded bit sequence->Bits_mod_symb_0a, bits_mod_symb_0b, bits_mod_symb_1a, bits_mod_symb_1b, . . ..[Examiner’s Note: Bits are mapped within symbols and across symbols]), then across the QAM modulation symbols in the pre-DFT time domain (Frenne [Para. 0080], modulation may be performed, e.g. to map bit to modulation symbols. [Para. 0086], the bits of a data block may be modulated to provide modulation symbols. The modulation may be block-wise mapped to layers. A time domain mapping like a pre-DFT-time mapping may be performed before a layer domain mapping. Frenne [Para. 0087], a mapping may be according to Encoder → Modulation → codeword (CW) to Layer mapping. [Para. 0088], A codeword may in general comprise the modulation symbols representing a data block, and a data block may be considered to be represented by a codeword.. [Examiner’s Note: Bits in code block are mapped across modulation symbols of a codeword and are mapped in pre-DFT time domain]), and then across the MIMO layers (Frenne [Para. 0086], the bits of a data block may be modulated to provide modulation symbols. The modulation may be block-wise mapped to layers. N modulation symbols and with M layers. With M=2, N/2 first modulated symbols may be mapped to layer 0, the N/2 last modulated symbols to layer 1. Frenne [Para. 0087], a mapping may be according to Encoder → Modulation → CW to Layer mapping …. → MIMO precoding);
across the pre-DFT time domain (Frenne [Para. 0071], a mapping across Pre-DFTS-OFDM time first, then across layer, then across time (OFDM symbols), then across the bit positions in the modulation symbols (Frenne [Para. 0080], modulation may be performed, e.g. to map bit to modulation symbols. Frenne [Para. 0087], a mapping may be according to Encoder → Modulation → codeword (CW) to Layer mapping), and then across the MIMO layers (Frenne [Para. 0086], the bits of a data block may be modulated to provide modulation symbols. The modulation may be block-wise mapped to layers. N modulation symbols and with M layers. With M=2, N/2 first modulated symbols may be mapped to layer 0, the N/2 last modulated symbols to layer 1. Frenne [Para. 0087], a mapping may be according to Encoder → Modulation → CW to Layer mapping …. → MIMO precoding);
across the bit position in modulation symbols (Frenne [Para. 0074], The input coded bit sequence may be mapped to modulation symbols according to: Frenne [Para. 0075] and [FIG. 1], Input coded bit sequence->Bits_mod_symb_0a, bits_mod_symb_0b, bits_mod_symb_1a, bits_mod_symb_1b, . . ..[Examiner’s Note: Bits are mapped within symbols and across symbols]), then across the pre-DFT time domain (Frenne [Para. 0080], modulation may be performed, e.g. to map bit to modulation symbols. Frenne [Para. 0086], the bits of a data block may be modulated to provide modulation symbols. The modulation may be block-wise mapped to layers. A time domain mapping like a pre-DFT-time mapping may be performed before a layer domain mapping. Frenne [Para. 0087], a mapping may be according to Encoder → Modulation → codeword (CW) to Layer mapping. Frenne [Para. 0088], A codeword may in general comprise the modulation symbols representing a data block, and a data block may be considered to be represented by a codeword), and then across the MIMO layers Frenne ([Para. 0086], the bits of a data block may be modulated to provide modulation symbols. The modulation may be block-wise mapped to layers. N modulation symbols and with M layers. With M=2, N/2 first modulated symbols may be mapped to layer 0, the N/2 last modulated symbols to layer 1. Frenne [Para. 0087], a mapping may be according to Encoder → Modulation → CW to Layer mapping …. → MIMO precoding);
or across the pre-DFT time domain (Frenne [Para. 0069], a mapping of a single codeword to multiple layers using DFTS-OFDM is used. [Para. 0071], a mapping across Pre-DFTS-OFDM time first, then across layer), then across the MIMO layers (Frenne [Para. 0071], a mapping across Pre-DFTS-OFDM time first, then across layer), and then across the bit positions in the modulation symbols (Frenne [Para. 0083], The transmission chain may provide mapping as: Information bits→Encoder (+CRC) (providing error coding), providing N coded bits→N coded bits to Layer mapping→Modulation per layer→DFT-S precoding per layer MIMO precoding. Frenne [Para. 0084], encoded bits of the data block may be distributed across the two (or more) layers first, then a modulation may be applied per layer. Frenne [Para. 0074], The input coded bit sequence may be mapped to modulation symbols according to: Frenne [Para. 0075] and [FIG. 1], Input coded bit sequence->Bits_mod_symb_0a, bits_mod_symb_0b, bits_mod_symb_1a, bits_mod_symb_1b, . . ..).
Claims 30 and 43 are rejected under 35 U.S.C. 103 as being unpatentable over Frenne et al. (US20240048422A1, hereinafter Frenne) in view of ETSI EN 302 755 (ETSI EN 302 755 V1.4.1, hereinafter EN 302.755), and further in view of Liu et al. (WO2019047162A, hereinafter Liu).
For claim 30, Frenne and EN 302.755 teach the one or more NTCRM of claim 24. Although teaching mapping based on a time in a pre-discrete Fourier transform (DFT) time domain and MIMO layers, the references do not explicitly teach wherein the coded bits are mapped to the MIMO layers based on a quality of the MIMO layers.
Liu is directed to providing techniques for mapping transmissions to different layers in wireless communications. More specifically, Liu teaches wherein the coded bits are mapped to the MIMO layers based on a quality of the MIMO layers ([Para. 0042], a bit encoding component 240 for encoding bits of a codeword for transmission in the wireless network such that repeated bits can be transmitted over a different layer than corresponding original bits. This can improve reliability of communications by transmitting the repeated portions of the codeword over layers that may have different signal-to-interference-and-noise ratios (SINRs). [Para. 0053], bit encoding component 240 can encode the multiple bits of a codeword to multiple modulation symbols. Bit encoding component 240 can map the symbols to one or more of multiple layers. Each layer may correspond to a MIMO layer over which symbols can be transmitted using different MCS, based on a different SINR).
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the apparatus of Frenne and EN 302.755, so that the coded bits are mapped to MIMO layers based on quality of the layers, as taught by Liu. The modification would have improved reliability of the transmissions (Liu [Para. 0025]).
For claim 43, Frenne and EN 302.755 teach the apparatus of claim41. Although teaching mapping based on a time in a pre-discrete Fourier transform (DFT) time domain, MIMO layers and bit positions in a modulation symbol, the references do not explicitly disclose wherein the coded bits are mapped to the MIMO layers based on a quality of the MIMO layers.
Liu is directed to providing techniques for mapping transmissions to different layers in wireless communications. More specifically, Liu teaches wherein the coded bits are mapped to the MIMO layers based on a quality of the MIMO layers ([Para. 0042], a bit encoding component 240 for encoding bits of a codeword for transmission in the wireless network such that repeated bits can be transmitted over a different layer than corresponding original bits. This can improve reliability of communications by transmitting the repeated portions of the codeword over layers that may have different signal-to-interference-and-noise ratios (SINRs). [Para. 0053], bit encoding component 240 can encode the multiple bits of a codeword to multiple modulation symbols. Bit encoding component 240 can map the symbols to one or more of multiple layers. Each layer may correspond to a MIMO layer over which symbols can be transmitted using different MCS, based on a different SINR); or wherein the coded bits are block interleaved before being mapped to the MIMO layers.
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the apparatus of Frenne and EN 302.755, so that the coded bits are mapped to MIMO layers based on quality of the layers, as taught by Liu. The modification would have improved reliability of the transmissions (Liu [Para. 0025]).
Claim 31 is rejected under 35 U.S.C. 103 as being unpatentable over Frenne et al (US20240048422A1, hereinafter Frenne) in view of ETSI EN 302 755 (ETSI EN 3 302 755 V1.4.1, hereinafter EN 302.755), and further in view of 3GPP TS 38.212 (3GPP TS 38.212 version 16.2.0 Release 16, hereinafter TS 38.212).
For claim 31, Freene and EN 302.755 teach the one or more NTCRM of claim 24. The reference further teaches wherein the coded bits are block interleaved before being mapped to the MIMO layers ( Frenne [Para. 0078 and 0079], Time domain interleaving could be performed before a bit (of the input coded bits) to layer mapping. Frenne [Para. 0090], An interleaver , e.g. time domain interleaver, may in general be adapted to permutate an input sequence and/or to change its order. An input sequence may be a bit sequence in time domain. An interleaver may provide an output mapped to one or more target domain/s. A target domain may be a layer domain or a time domain. A time domain may be a pre-DFT time domain or sequence. Frenne [Para. 0083], The transmission chain may provide mapping as: Information bits→Encoder (providing error coding), providing N coded bits→N coded bits to Layer mapping→Modulation per layer→DFT-S precoding per layer MIMO precoding).
Although teaching interleaving before mapping to MIMO layers, Frenne and EN 302.755 do not explicitly disclose wherein the coded bits are block interleaved before being mapped to the MIMO layers.
TS 38.212 teaches wherein the coded bits are block interleaved before being mapped to the MIMO layers ([Page 13, Clause 5.3.1 Polar coding, first paragraph,], After encoding the bits are denoted by d0, d1, d2, …, dN-1. [Page 27, Subsection 5.4.1 Rate matching for Polar code], The rate matching for Polar code is defined per coded block and consists of sub-block interleaving. The output bit sequence after rate matching is denoted as f0, f1, f2, …, fE-1. [Page 27, Clause 5.4.1.1 Sub-block interleaving, first paragraph], The bits input to the sub-block interleaver are the coded bits d0, d1, d2, …, dN-1. The coded bits d0, d1, d2, …, dN-1 are divided into 32 sub-blocks. The bits output from the sub-block interleaver are denoted as y0, y1, y2, …, yN-1, which are generated by the given algorithm for the sub-blocks).
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the apparatus of Frenne and EN 302.755, so that the coded bits are segmented and block interleaved and the block interleaved segmented blocks are then serially concatenated, as taught by TS 38.212. The modification would have allowed the coding, multiplexing and mapping to physical channels for 5G NR (TS 38.212 [Page 7 Scope]).
Claim 32 is rejected under 35 U.S.C. 103 as being unpatentable over Frenne et al (US20240048422A1, hereinafter Frenne) in view of ETSI EN 302 755 (ETSI EN 3 302 755 V1.4.1, hereinafter EN 302.755) and 3GPP TS 38.212 (3GPP TS 38.212 version 16.2.0 Release 16, hereinafter TS 38.212), and further in view of Ye et al. (US20200099471A1, hereinafter Ye) and Palanki et al. (US20090327843A1, hereinafter Palanki).
For claim 32, Frenne, EN 302.755 and TS 38.212 teach the one or more NTCRM of claim 31. Although teaching block interleaving before mapping to MIMO layers, the references do not explicitly teach wherein the coded bits are block interleaved according to a bit reversal index.
Ye is directed to providing sub-block wise interleaving for polar coding systems, procedures, and signaling. More specifically, Ye teaches wherein the coded bits are block interleaved according to a bit reversal index ([Para. 0191], In an example, c(i), i=0, . . . , N−M bits may be divided into q/2 blocks. The M bits may be evenly divided. BL(k) may indicate a k-th block. After division, each block may be interleaved. An interleaver may be a bit reversal interleaver).
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the apparatus of Frenne, EN 302.755 and TS 38.212, so that the coded bits are block interleaved by bit reversal interleaver, as taught by Ye. The modification would have provided performance improvement (Ye [Para. 0207 and FIG. 36]).
Although teaching block interleaving coded bits by bit reversal interleaver, Frenne, EN 302.755, TS 38.212 and Ye do not explicitly disclose wherein the coded bits are block interleaved according to a bit reversal index.
Palanki is directed to providing pruned bit-reversal interleaver. More specifically, Palanki teaches wherein the coded bits are block interleaved according to a bit reversal index ([Para. 0039], FIG. 3 illustrates the operation of a 4-bit reversal interleaver on a coded packet with 16 code bits. The 16 code bits in the coded packet are denoted as b0, b1, b2, . . . , b15, where code bit bi is at bit index i in the coded packet. [Para. 0040], For each code bit bi, where i=0, 1, . . . 15, bit index i of code bit bi is expressed in binary form using four binary bits. The four binary bits are then reversed so that the first, second, third and fourth binary bits for index i are moved to the fourth, third, second and first bit positions, respectively. The four reversed bits form a bit-reversed value of j=π(i), where π(i) denotes the bit reversal operation on the binary representation of i. Code bit bi is then provided at bit index j in the interleaved packet. For example, bit index i=3 is expressed in binary form as ‘0011’, the reversed bits are ‘1100’, and the bit-reversed value is j=12. Code bit b3 in the coded packet is then mapped to bit index 12 in the interleaved packet [Examiner’s Note: A coded packet is a block]).
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the apparatus of Frenne, EN 302.755, TS 38.212 and Ye, so that a block is interleaved according to bit reversal index, as taught by Palanki. The modification would have performed interleaving efficiently for blocks of different sizes (Palanki [Para. 0008]).
Claim 33 is rejected under 35 U.S.C. 103 as being unpatentable over Frenne et al (US20240048422A1, hereinafter Frenne) in view of ETSI EN 302 755 (ETSI EN 3 302 755 V1.4.1, hereinafter EN 302.755), and further in view of Khoshnevisan et al. (US20200127758A1, hereinafter Khoshnevisan).
For claim 33, Frenne and EN 302.755 teach the one or more NTCRM of claim 24. The reference further teaches wherein to map the coded bits includes to (Frenne [Para. 0069], a mapping of a single codeword to multiple layers using DFTS-OFDM is used), load all of the first group of bits in a first MIMO layer of a single symbol (Frenne [Para. 0083], mapping as: Information bits→Encoder → coded bits to Layer mapping→Modulation per layer→DFT-S precoding per layer MIMO precoding. [Para. 0086], a time domain mapping like a pre-DFT-time mapping may be performed before a layer domain mapping, then a symbol domain mapping (e.g., to OFDM symbols or DFT-s-OFDM symbols) [Examiner’s Note: Mapping to MIMO layer is performed before symbol domain mapping. Therefore, MIMO layers mapped into each DFT-s-OFDM symbol]); load all of the second group of bits in the first MIMO layer of the single symbol (Frenne [Para. 0086], a time domain mapping like a pre-DFT-time mapping may be performed before a layer domain mapping, then a symbol domain mapping (e.g., to OFDM symbols or DFT-s-OFDM symbols)); load all of the first group of bits in the second MIMO layer of the single symbol (Frenne [Para. 0086], a time domain mapping like a pre-DFT-time mapping may be performed before a layer domain mapping, then a symbol domain mapping (e.g., to OFDM symbols or DFT-s-OFDM symbols)); and load all of the second group of bits in the second MIMO layer of the single symbol (Frenne [Para. 0086], a time domain mapping like a pre-DFT-time mapping may be performed before a layer domain mapping, then a symbol domain mapping (e.g., to OFDM symbols or DFT-s-OFDM symbols)).
Although teaching MIMO layers being mapped into each DFT-s-OFDM symbol, Frenne and EN 302.755 do not explicitly disclose in order: divide the bits into at least a first group and a second group based on a significance of the bits; load all of the first group of bits in a first MIMO layer of a single symbol; load all of the second group of bits in the first MIMO layer of the single symbol; load all of the first group of bits in the second MIMO layer of the single symbol; and load all of the second group of bits in the second MIMO layer of the single symbol.
Khoshnevisan is directed to providing systematic bit priority mapping interleaving for layers with different modulation orders. More specifically, Khoshnevisan teaches in order: divide the bits into at least a first group and a second group based on a significance of the bits ([Para. 0066], map systematic bits of a communication to the most significant bits of each modulated symbol. [Para. 0069], the first row corresponds to the most significant bit of the modulated symbol, and is filled entirely with systematic bits, and the last row correspond to the least significant bit of the modulated symbol, and is filled entirely with parity bits [Examiner’s Note: Bits are divided into two groups that comprise most significant bits and least significant bits respectively]); load all of the first group of bits in a first MIMO layer of a single symbol ([Para. 0102] and [FIG. 11], in a first set of symbols of a first sub-band (e.g., shown as sub-band 1), a greater number of systematic bits (e.g., shown as 4 systematic bits) may be mapped to a corresponding number of most significant bits (e.g., the 4 most significant bits) in a first set of layers (e.g., Layer 1 and Layer 2) having a higher reliability); load all of the second group of bits in the first MIMO layer of the single symbol ([Para. 0069] and [FIG. 11], the last row correspond to the least significant bit of the modulated symbol, and is filled entirely with parity bits [Examiner’s Note: Parity bits are the least significant bits which constitute the second group of bits. As FIG 11 shows, the parity bits are loaded next to systematic bits in the first set of layers (layers 1 and 2)]); load all of the first group of bits in the second MIMO layer of the single symbol ([Para. 0102], a lesser number of systematic bits (e.g., shown as 2 systematic bits) may be mapped to a corresponding number of most significant bits (e.g., the 2 most significant bits) in a second set of layers (e.g., Layer 3) having a lower reliability); and load all of the second group of bits in the second MIMO layer of the single symbol ([Para. 0069] and [FIG. 11], the last row corresponds to the least significant bit of the modulated symbol, and is filled entirely with parity bits [Examiner’s Note: As FIG 11 shows, the parity bits are loaded next to systematic bits in the second set of layers (layer 3)]).
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the apparatus of Frenne and EN 302.755, so that the systematic bits are mapped as the most significant bits of a modulation symbol across layers, as taught by Khoshnevisan. The modification would have increased reliability due to an increased likelihood of correct demodulation of the systematic bits (Khoshnevisan Para. 0066]).
Claim 34 is rejected under 35 U.S.C. 103 as being unpatentable over Frenne et al (US20240048422A1, hereinafter Frenne) in view of ETSI EN 302 755 (ETSI EN 3 302 755 V1.4.1, hereinafter EN 302.755), and further in view of 3GPP TS 38.212 (3GPP TS 38.212 version 16.2.0 Release 16, hereinafter TS 38.212) and Seo et al. (US20200145990A1, hereinafter Seo).
For claim 34, Freene and EN 302.755 teach the one or more NTCRM of claim 24. The references further teach wherein to map the coded bits includes to (Frenne [Para. 0069], a mapping of a single codeword to multiple layers using DFTS-OFDM is used): and perform a codeword-to-layer mapping based on the concatenated interleaved bits (Frenne [Para. 0069], a mapping of a single codeword to multiple layers using DFTS-OFDM is used. Frenne [Para. 0078 and 0079], Time domain interleaving could be performed before a bit (of the input coded bits) to layer mapping. Frenne [Para. 0090], An interleaver , e.g. time domain interleaver, may in general be adapted to permutate an input sequence and/or to change its order. An input sequence may be a bit sequence in time domain. An interleaver may provide an output mapped to one or more target domain/s. A target domain may be a layer domain or a time domain. A time domain may be a pre-DFT time domain or sequence).
Although teaching codeword-to-layer mapping based on interleaved bits, Frenne and EN 302.755 do not explicitly disclose apply a first block interleaving to odd bits of the coded bits; apply a second block interleaving to even bits of the coded bits; serially concatenate the interleaved bits; and perform a codeword-to-layer mapping based on the concatenated interleaved bits.
TS 38.212 teaches apply a first block interleaving to odd bits of the coded bits; ([Page 13, Clause 5.3.1 Polar coding, first paragraph,], After encoding the bits are denoted by d0, d1, d2, …, dN-1. [Page 27, Subsection 5.4.1 Rate matching for Polar code], The rate matching for Polar code is defined per coded block and consists of sub-block interleaving. The output bit sequence after rate matching is denoted as f0, f1, f2, …, fE-1. [Page 27, Clause 5.4.1.1 Sub-block interleaving, first paragraph], The bits input to the sub-block interleaver are the coded bits d0, d1, d2, …, dN-1. The coded bits d0, d1, d2, …, dN-1 are divided into 32 sub-blocks. The bits output from the sub-block interleaver are denoted as y0, y1, y2, …, yN-1, which are generated by the given algorithm for the sub-blocks); apply a second block interleaving to even bits of the coded bits ([Page 27, Clause 5.4.1.1 Sub-block interleaving, first paragraph], The bits input to the sub-block interleaver are the coded bits d0, d1, d2, …, dN-1. The coded bits d0, d1, d2, …, dN-1 are divided into 32 sub-blocks. The bits output from the sub-block interleaver are denoted as y0, y1, y2, …, yN-1, which are generated by the given algorithm for the sub-blocks); serially concatenate the interleaved bits ([Page 33, Clause 5.5 Code block concatenation, first and second paragraphs], The input bit sequence for the code block concatenation block are the sequences frk , for 1 ,..., 0 = C - 1 and k = 1 ,..., 0 = Er - 1, where Er is the number of rate matched bits for the r-th code block. The output bit sequence from the code block concatenation block is the sequence gk for k = 1, …, G – 1. The code block concatenation consists of sequentially concatenating the rate matching outputs for the different code blocks); and perform a codeword-to-layer mapping based on the concatenated interleaved bits ([Page 33, Clause 5.5 Code block concatenation, first and second paragraphs], The input bit sequence for the code block concatenation block are the sequences frk , for r = 0 ,..., C - 1 and k = 0 ,..., Er - 1, where Er is the number of rate matched bits for the r-th code block. The output bit sequence from the code block concatenation block is the sequence gk for k = 1, …, G – 1. The code block concatenation consists of sequentially concatenating the rate matching outputs for the different code blocks [Examiner’s Note: f0, f1, f2, …, fE- is the block interleaved output sequence from rate matching. When r = 1, f0k and f1k are two sequences each of which is a block interleaved output of rate matching. Sequence gk for k = 1, …, G – 1 is generated by the given algorithm from the sequences frk. Frenne teaches codeword-to-layer mapping based the interleaved bits]).
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the apparatus of Frenne and EN 302.755, so that the coded bits are segmented and block interleaved and the segmented blocks are then serially concatenated, as taught by TS 38.212. The modification would have allowed the coding, multiplexing and mapping to physical channels for 5G NR (TS 38.212 [Page 7 Scope]).
Although teaching applying block interleaving to segments of coded bits, Frenne, EN 302.755 and TS 38.212 do not explicitly disclose apply a first block interleaving to odd bits of the coded bits; apply a second block interleaving to even bits of the coded bits.
Seo is directed to providing method and apparatus for transmitting uplink control information in wireless communication system. More specifically, Seo teaches apply a first block interleaving to odd bits of the coded bits ([Para. 0178] and [FIG. 16], bits of which a bit index is an odd number in the UCI bit stream are arranged in the 2nd segment in an orderly manner), apply a second block interleaving to even bits of the coded bits ([Para. 0178], bits of which a bit index i is an even number in the UCI bit stream are arranged in the 1st segment in an orderly manner. [Para. 0181], the interleaving can be expressed such that 2 bits obtained from each of bits of the 1st and 2nd segments which are channel-coded are concatenated alternately).
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the apparatus of Frenne, EN 302.755 and TS 38.212, so that the bit sequence is segmented into odd bits and even bits, as taught by Seo. The modification would have allowed effectively and reliably transmitting various types of UCI (Seo [Para. 0007]).
Claim 36 is rejected under 35 U.S.C. 103 as being unpatentable over Frenne et al (US20240048422A1, hereinafter Frenne) in view of 3GPP TS 38.212 (3GPP TS 38.212 version 16.2.0 Release 16, hereinafter TS 38.212) and 3GPP TS 36.212 (3GPP TS 36.212 version 8.3.0, hereinafter TS 36.212).
For claim 36, Frenne teaches one or more non-transitory computer-readable media (NTCRM) having instructions, stored thereon ([Para. 0195], a computer processor and a memory coupled to the processor, wherein the memory is encoded with one or more programs or program products that execute the services, functions and steps disclosed herein. [Para. 0128], Examples for memories comprise volatile and non-volatile memory Random Access Memory (RAM), and/or Read-Only-Memory (ROM), and/or flash memory), that when executed by one or more processors ([Para. 0058], a program product comprising instructions causing processing circuitry to control and/or perform a method as described herein), cause a device of a wireless cellular network to ([Para. 0094], a wireless device or terminal 10 or a UE (User Equipment, configured for cellular communication with a network): encode bits of control information using Polar code ([Para. 0153], Transmitting signaling, in particular control signaling comprises encoding. Encoding may comprise forward error correction encoding. Forward error correction coding may comprise polar coding), perform a codeword-to-layer mapping based on the concatenated interleaved bits ([Para. 0069], a mapping of a single codeword to multiple layers using DFTS-OFDM is used. [Para. 0078 and 0079], Time domain interleaving could be performed before a bit (of the input coded bits) to layer mapping. [Para. 0090], An interleaver , e.g. time domain interleaver, may in general be adapted to permutate an input sequence and/or to change its order. An input sequence may be a bit sequence in time domain. An interleaver may provide an output mapped to one or more target domain/s. A target domain may be a layer domain or a time domain. A time domain may be a pre-DFT time domain or sequence [Examiner’s Note: The interleaved bits are concatenated as TS 36.212 teaches below]), and transmit the control information based on the codeword-to-layer mapping ([Para. 0098], transmitting signaling is based on a SC-FDM (DFTS-OFDM. SC-FDM and DFTS-OFDM may be used interchangeably. [Para. 0069], a mapping of a single codeword or code block to multiple layers using DFTS-OFDM is used. [Para. 0027], data block is mapped to allocation units to be carried by data signaling. [Para. 0026], the data signaling comprises control information).
Although teaching encoding control information, layer mapping and transmission, Frenne does not explicitly disclose apply, via a first interleaver, a first block interleaving to first segments of the coded bits; apply, via a second interleaver, a second block interleaving to second segments of the coded bits.
TS 38.212 teaches apply, via a first interleaver, a first block interleaving to first segments of the coded bits; ([Page 13, Clause 5.3.1 Polar coding, first paragraph,], After encoding the bits are denoted by d0, d1, d2, …, dN-1. [Page 27, Subsection 5.4.1 Rate matching for Polar code], The rate matching for Polar code is defined per coded block and consists of sub-block interleaving. The output bit sequence after rate matching is denoted as f0, f1, f2, …, fE-1. [Page 27, Clause 5.4.1.1 Sub-block interleaving, first paragraph], The bits input to the sub-block interleaver are the coded bits d0, d1, d2, …, dN-1. The coded bits d0, d1, d2, …, dN-1 are divided into 32 sub-blocks. The bits output from the sub-block interleaver are denoted as y0, y1, y2, …, yN-1, which are generated by the given algorithm for the sub-blocks [Examiner’s Note: Sub-blocks correspond to the segments]); apply, via a second interleaver, a second block interleaving to second segments of the coded bits ([Page 27, Clause 5.4.1.1 Sub-block interleaving, first paragraph], The bits input to the sub-block interleaver are the coded bits d0, d1, d2, …, dN-1. The coded bits d0, d1, d2, …, dN-1 are divided into 32 sub-blocks. The bits output from the sub-block interleaver are denoted as y0, y1, y2, …, yN-1, which are generated by the given algorithm for the sub-blocks).
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the apparatus of Frenne, so that the coded bits are segmented and block interleaved, as taught by TS 38.212. The modification would have allowed the coding, multiplexing and mapping to physical channels for 5G NR (TS 38.212 [Page 7 Scope]).
Although teaching segmenting coded bits and block interleaving the segments, Frenne and TS 38.212 do not explicitly disclose serially concatenate the interleaved bits by interlace concatenation that includes taking bits from an output of the first interleaver and an output of the second interleaver in alternating fashion, to obtain concatenated interleaved bits.
TS 36.212 teaches serially concatenate the interleaved bits by interlace concatenation that includes taking bits from an output of the first interleaver and an output of the second interleaver in alternating fashion ([Page 15], The rate matching for turbo coded transport channels is defined per coded block and consists of interleaving the three information bit streams
d
k
(
1
)
and
d
k
(
2
)
, followed by the collection of bits and the generation of a circular buffer as depicted in Figure 5.1.4-1. The bit stream
d
k
(
1
)
is interleaved according to the sub-block interleaver defined in subclause 5.1.4.1.1 with an output sequence defined as
v
0
(
1
)
…
v
K
Π
(
1
)
. The bit stream
d
k
(
2
)
is interleaved according to the sub-block interleaver defined in subclause 5.1.4.1.1 with an output sequence defined as
v
0
(
2
)
…
v
K
Π
(
2
)
. The sequence of bits
e
k
for transmission is generated according to subclause 5.1.4.1.2. [Pages 16-17], 5.1.4.1.2 Bit collection, selection and transmission. The circular buffer of length
K
w
= 3
K
Π
for the coded block is generated as follows:
W
k
Π
+
2
k
=
v
k
(
1
)
W
k
Π
+
2
k
+
1
=
v
k
(
2
)
[Examiner’s Note:
d
k
(
1
)
and
d
k
(
2
)
are block interleaved respectively as Figure 5.1.4-1 illustrates. Output of block interleaving is
v
0
(
1
)
…
v
K
Π
(
1
)
and
v
0
(
2
)
…
v
K
Π
(
2
)
. Bit collection is the concatenation. The output of bit collection is W. W takes even bits from
v
0
(
1
)
…
v
K
Π
1
and odd bits from
v
0
(
2
)
…
v
K
Π
(
2
)
. Therefore, W is the concatenation of the interleaved bits alternately.
e
k
is the bit sequence for transmission after rate matching on W]), to obtain concatenated interleaved bits ([Pages 16-17], 5.1.4.1.2 Bit collection, selection and transmission. The circular buffer of length
K
w
= 3
K
Π
for the coded block is generated as follows:
W
k
Π
+
2
k
=
v
k
(
1
)
W
k
Π
+
2
k
+
1
=
v
k
(
2
)
).
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the apparatus of Frenne and TS 38.212, so that the coded bits are segmented and block interleaved, as taught by TS 38.212. The modification would have implemented the coding, multiplexing and mapping to physical channels for E-UTRA (TS 36.212 [Page 6 Scope]).
Claims 37-38 are rejected under 35 U.S.C. 103 as being unpatentable over Frenne et al (US20240048422A1, hereinafter Frenne) in view of 3GPP TS 38.212 (3GPP TS 38.212 version 16.2.0 Release 16, hereinafter TS 38.212) and 3GPP TS 36.212 (3GPP TS 36.212 version 8.3.0, hereinafter TS 36.212), and further in view of Seo et al. (US20200145990A1, hereinafter Seo).
For claim 37, Frenne, TS 38.212 and TS 36.212 teach the one or more NTCRM of claim 36. The references further teach wherein the first segments correspond to individual odd bits of the coded bits and the second segments correspond to individual even bits of the coded bits (TS 38.212 [Page 27, Clause 5.4.1.1 Sub-block interleaving, first paragraph], The bits input to the sub-block interleaver are the coded bits d0, d1, d2, …, dN-1. The coded bits d0, d1, d2, …, dN-1 are divided into 32 sub-blocks. The bits output from the sub-block interleaver are denoted as y0, y1, y2, …, yN-1, which are generated by the given algorithm for the sub-blocks [Examiner’s Note: TS 38.212. teaches dividing bits into segments]).
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the apparatus of Frenne and TS 36.212, so that the coded bits are segmented and block interleaved, as taught by TS 38.212. The modification would have allowed the coding, multiplexing and mapping to physical channels for 5G NR (TS 38.212 [Page 7 Scope]).
Although teaching dividing coded bits into segments, Frenne, TS 38.212 and TS 36.212 do not explicitly disclose wherein the first segments correspond to individual odd bits of the coded bits and the second segments correspond to individual even bits of the coded bits.
Seo is directed to providing method and apparatus for transmitting uplink control information in wireless communication system. More specifically, Seo teaches wherein the first segments correspond to individual odd bits of the coded bits and the second segments correspond to individual even bits of the coded bits ([Para. 0178] and [FIG. 16], bits of which a bit index i is an even number in the UCI bit stream are arranged in the 1st segment in an orderly manner, and bits of which a bit index is an odd number in the UCI bit stream are arranged in the 2nd segment in an orderly manner [Examiner’s Note: The first segment of odd bits and second segment of even bits in Seo correspond to bit sequence in TS 38.212 that is input to the interleaver to be divided into sub-blocks]).
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the apparatus of Frenne, TS 38.212 and TS 36.212, so that the bit sequence is segmented into odd bits and even bits, as taught by Seo. The modification would have allowed effectively and reliably transmitting various types of UCI (Seo [Para. 0007]).
For claim 38, Frenne, TS 38.212 and TS 36.212 teach the one or more NTCRM of claim 36. The references further teach wherein the first segments correspond to sub-blocks of odd bits of the coded bits and the second segments correspond to sub-blocks of even bits of the coded bits (TS 38.212 [Page 27, Clause 5.4.1.1 Sub-block interleaving, first paragraph], The bits input to the sub-block interleaver are the coded bits d0, d1, d2, …, dN-1. The coded bits d0, d1, d2, …, dN-1 are divided into 32 sub-blocks. The bits output from the sub-block interleaver are denoted as y0, y1, y2, …, yN-1, which are generated by the given algorithm for the sub-blocks [Examiner’s Note: TS 38.212. teaches dividing bits into segments]).
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the apparatus of Frenne and TS 36.212, so that the coded bits are segmented and block interleaved, as taught by TS 38.212. The modification would have allowed the coding, multiplexing and mapping to physical channels for 5G NR (TS 38.212 [Page 7 Scope]).
Although teaching dividing coded bits into segments, Frenne, TS 38.212 and TS 36.212 do not explicitly disclose wherein the first segments correspond to sub-blocks of odd bits of the coded bits and the second segments correspond to sub-blocks of even bits of the coded bits.
Seo is directed to providing method and apparatus for transmitting uplink control information in wireless communication system. More specifically, Seo teaches wherein the first segments correspond to sub-blocks of odd bits of the coded bits and the second segments correspond to sub-blocks of even bits of the coded bits ([Para. 0178] and [FIG. 16], bits of which a bit index i is an even number in the UCI bit stream are arranged in the 1st segment in an orderly manner, and bits of which a bit index is an odd number in the UCI bit stream are arranged in the 2nd segment in an orderly manner [Examiner’s Note: The first segment of odd bits and second segment of even bits in Seo correspond to bit sequence in TS 38.212 that is input to the interleaver to be divided into sub-blocks]).
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the apparatus of Frenne, TS 38.212 and TS 36.212, so that the bit sequence is segmented into odd bits and even bits, as taught by Seo. The modification would have allowed effectively and reliably transmitting various types of UCI (Seo [Para. 0007]).
Claims 39-40 are rejected under 35 U.S.C. 103 as being unpatentable over Frenne et al (US20240048422A1, hereinafter Frenne) in view of 3GPP TS 38.212 (3GPP TS 38.212 version 16.2.0 Release 16, hereinafter TS 38.212) and 3GPP TS 36.212 (3GPP TS 36.212 version 8.3.0, hereinafter TS 36.212), and further in view of Pisoni et al. (US20050175112A1, hereinafter Pisoni).
For claim 39, Frenne, TS 38.212 and TS 36.212 teach the one or more NTCRM of claim 36. The references further teach wherein the coded bits are divided into sub-blocks of successive bits (TS 38.212 [Page 27, Clause 5.4.1.1 Sub-block interleaving, first paragraph], The bits input to the sub-block interleaver are the coded bits d0, d1, d2, …, dN-1. The coded bits d0, d1, d2, …, dN-1 are divided into 32 sub-blocks). The bits output from the sub-block interleaver are denoted as y0, y1, y2, …, yN-1, which are generated by the given algorithm for the sub-blocks [Examiner’s Note: TS 38.212. teaches dividing bits into segments]).
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the apparatus of Frenne and TS 36.212, so that the coded bits are segmented and block interleaved, as taught by TS 38.212. The modification would have allowed the coding, multiplexing and mapping to physical channels for 5G NR (TS 38.212 [Page 7 Scope]).
Although teaching dividing coded bits into segments, Frenne, TS 38.212 and TS 36.212 do not explicitly disclose wherein the first segments correspond to odd sub-blocks of the sub-blocks and the second segments correspond to even sub-blocks of the sub-blocks.
Pisoni is directed to providing time domain equalization using frequency domain operations. More specifically, Pisoni teaches wherein the first segments correspond to odd sub-blocks of the sub-blocks and the second segments correspond to even sub-blocks of the sub-blocks ([Para. 0097], The suppressor is arranged to receive first and second frequency domain sub-blocks from the signal divider unit 35. The signal divider unit 35 is arranged to generate an even sub-block diag(A) and an odd sub-block diag(A) and to direct the even sub-block to an input of the first multiplier unit 38. Simultaneously the odd sub-block is directed to an input of the transformer unit 37).
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the apparatus of Frenne, TS 38.212 and TS 36.212, so that sub-blocks are separated into odd sub-blocks and even sub-blocks, as taught by Pisoni. The modification would have avoided computationally heavy evaluation of a matrix multiplied by a vector (Pisoni [Para. 0124]).
For claim 40, Frenne, TS 38.212, TS 36.212 and Pisoni teach the one or more NTCRM of claim 39. Further, the references teach wherein a number of the sub- blocks is 2N (Frenne [Para. 0010] modulation scheme of QPSK is used [Examiner Note: In QPSK, 2 bits are modulated into 1 symbol. Each bit can be considered as sub-block. Therefore, the number of sub-blocks is twice the number of symbols for transmission]), wherein N is equal to a number of symbols for the transmission (Frenne [Para. 0010], [Examiner Note: In QPSK, 2 bits are modulated into 1 symbol. Each bit can be considered as sub-block. Therefore, the number of sub-blocks is twice the number of symbols for transmission]).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/S.L./Examiner, Art Unit 2417
/REBECCA E SONG/Supervisory Patent Examiner, Art Unit 2417
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