DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 08/30/2023 has been considered by the examiner.
Response to Amendment
Receipt is acknowledged of applicant' s amendment filed 08/30/2023. Claims 19-22 and 25-26 cancelled by applicant. Claims 1-18 and 23-24 are pending and an action on the merits is as follows.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the
effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-8 and 23-24 are rejected under 35 U.S.C. 103 as being unpatentable over Park et al. (US 20200321292 A1) (Park, hereafter) in view of Zhang et al.,( WO 2021195973 A1, machine translation and foreign translation, 10-2021) (Zhang ,hereafter).
Regarding claims 1 and 23 Park, which is the closest prior art, discloses a display device comprising static electricity blocking lines (description, paragraphs [005 l]-[0172], and figures 1-18): a display panel (10 )may comprise a first substrate (110), and the first substrate (110) comprises a display area (DA) and a non-display area (NA). An encapsulation layer (EN) seals the display area (DA). The non-display area (NA) may comprise a static electricity blocking line (EP), and the static electricity blocking line (EP) may be provided in the non-display area (NA) in a closed-loop form surrounding the display area (DA). The static electricity blocking line EP may comprise a first static electricity blocking line (EP1) and a second static electricity blocking line (EP2). The first static electricity blocking line (EP1) and the second static electricity blocking line (EP2) are covered by the encapsulation layer (EN). A plurality of pixels (PX) are provided in the display area (DA) of the display panel (10), and each pixel (PX) comprises a transistor, a capacitor, and a light-emitting element. Dam bodies (DM1) and (DM2) may be provided in the non-display area (NA). A first inorganic layer 391 and a second inorganic layer (393) of the encapsulation layer (EN) may extend above the dam bodies (DM1) and (DM2), such that the dam bodies (DM1) and (DM2) can be covered thereby. The bottom surface of the dam body (DM1) may directly contact the first static electricity blocking line (EP1) and a third insulating layer (181). The bottom surface of the dam body (DM2) may directly contact the second static electricity blocking line (EP2) and the third insulating layer (181). Park fails to explicitly disclose wherein a conductive ring is embedded in the surface of one side of the base substrate (claim 1); wherein the driving substrate comprises a silicon substrate, a driving circuit is at least partially embedded in the silicon substrate, a conductive ring is embedded in the first surface of the silicon substrate, and an isolation layer is embedded in the first surface of the silicon substrate (claim 23)
Zhang discloses a display panel and a method of manufacturing as shown in Figure 1, the display substrate includes a substrate 1 and a multilayer metal lead disposed on the substrate 1. 6 is the first metal lead layer furthest from the substrate 1 As shown in Figure 7, a driving transistor is embedded in the substrate 1, wherein 2 is the source of the driving transistor and 3 is the drain of the driving transistor; The first metal lead layer 6 is connected to the source 2, drain 6 and polysilicon gate 4 of the driving transistor through conductive connection lines 5 (π61,π65).
Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the display panel and driving baseplate of Park as disclosed by Zhang wherein a conductive ring is embedded in the surface of one side of the base substrate wherein the driving substrate comprises a silicon substrate, a driving circuit is at least partially embedded in the silicon substrate, a conductive ring is embedded in the first surface of the silicon substrate, and an isolation layer is embedded in the first surface of the silicon substrate the motivation being to provide a device compact in size(Park, π04).
Regarding claims 2 and 3, Park fails to explicitly disclose wherein an orthographic projection of the isolation dam on the substrate covers an orthographic projection of the conducting ring on the substrate(claim 2);; wherein an outer edge of an orthographic projection of the isolation dam on the substrate is located on a side of an outer edge of an orthographic projection of the conducting ring on the substrate away from the active area; and an inner edge of the orthographic projection of the isolation dam on the substrate is located on a side of an inner edge of the orthographic projection of the conducting ring on the substrate close to the active area(claim 3).
Zhang discloses a display panel and a method of manufacturing as shown in Figure 1, the display substrate includes a substrate 1 and a multilayer metal lead disposed on the substrate 1. 6 is the first metal lead layer furthest from the substrate 1 As shown in Figure 7, a driving transistor is embedded in the substrate 1, wherein 2 is the source of the driving transistor and 3 is the drain of the driving transistor; The first metal lead layer 6 is connected to the source 2, drain 6 and polysilicon gate 4 of the driving transistor through conductive connection lines 5 (π61,π65).
Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the display panel and driving baseplate of Park as disclosed by Zhang wherein an orthographic projection of the isolation dam on the substrate covers an orthographic projection of the conducting ring on the substrate(claim 2);; wherein an outer edge of an orthographic projection of the isolation dam on the substrate is located on a side of an outer edge of an orthographic projection of the conducting ring on the substrate away from the active area; and an inner edge of the orthographic projection of the isolation dam on the substrate is located on a side of an inner edge of the orthographic projection of the conducting ring on the substrate close to the active area motivation being to provide a device compact in size(Park, π04).
Regarding claims 4-6, Park fails explicitly disclose wherein an outer edge of an orthographic projection of the isolation dam on the substrate is retracted by a preset distance relative to an outer edge of the substrate towards a side close to the active area, and wherein the preset distance is greater than 0 (claim 4); wherein the preset distance is greater than or equal to 20 microns, and less than or equal to 100 microns (claim 5);wherein in a first direction, a size of the isolation dam is greater than or equal to 0.1 times a size of the peripheral area, and less than or equal to 0.2 times the size of the peripheral area, and the first direction is a direction in which the peripheral area is away from the active area (claim 6);
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the environment Park wherein the preset distance is greater than 0 ; wherein the preset distance is greater than or equal to 20 microns, and less than or equal to 100 microns ;wherein in a first direction, a size of the isolation dam is greater than or equal to 0.1 times a size of the peripheral area, and less than or equal to 0.2 times the size of the peripheral area, and the first direction is a direction in which the peripheral area is away from the active area to improve machine safety since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
Regarding claims 7-8, the limitations, wherein the isolation dam is a closed circular structure surrounding the active area(claim 7);wherein edges of an orthographic projection of the isolation dam on the substrate are provided with at least one first interior angle, and edges of an orthographic projection of the conducting ring on the substrate are provided with at least one second interior angle; wherein the first interior angle and the second interior angle are both round corner(claim 8) etc do not appear to contain any additional features which define more than slight constructional changes which come within the scope of the customary (design) practice followed by persons skilled in the art, especially as the advantages thus achieved can be readily contemplated in advance. Alternatively, these limitations are not deemed patentable since the applicant’s disclosure fails to show such limitations to solve any problems or to yield any unobvious advantage that is not within the scope of the teachings applied. Therefore, such limitations would be a matter of design alternative.
Therefore it would have been obvious to one of ordinary skill to modify the display panel of Park as noted above , since matters of design choice requires routine skill.
Regarding claim 24, Park discloses wherein the isolation layer (DM) comprises a plurality of isolation portions (DM1) (DM2), the plurality of isolation portions are disposed at intervals along a second direction, and the second direction is a direction in which the functional area away from the drive area.
Allowable Subject Matter
Claims 9 and 18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claims 10-17 objected to due to their dependency upon claim 9.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure can be found in the 892
WO 2020248257 A1-isolation dams and display panel
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TRACIE Y GREEN whose telephone number is (571)270-3104. The examiner can normally be reached Mon-Thursday, 10am-8pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, James R Greece can be reached at (571)272-3711. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
TRACIE Y. GREEN
Primary Examiner
Art Unit 2875
/TRACIE Y GREEN/Primary Examiner, Art Unit 2875