Prosecution Insights
Last updated: April 19, 2026
Application No. 18/548,551

Encapsulated MEMS Switching Element, Device and Production Method

Non-Final OA §102§103
Filed
Aug 31, 2023
Examiner
SAEED, AHMED M
Art Unit
2831
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Siemens Aktiengesellschaft
OA Round
1 (Non-Final)
81%
Grant Probability
Favorable
1-2
OA Rounds
2y 2m
To Grant
93%
With Interview

Examiner Intelligence

Grants 81% — above average
81%
Career Allow Rate
597 granted / 737 resolved
+13.0% vs TC avg
Moderate +12% lift
Without
With
+12.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
19 currently pending
Career history
756
Total Applications
across all art units

Statute-Specific Performance

§103
46.3%
+6.3% vs TC avg
§102
47.4%
+7.4% vs TC avg
§112
1.8%
-38.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 737 resolved cases

Office Action

§102 §103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant elected Group I (claims 1-11) and canceled Group II (claims 12-13) in the response filed on 11/21/25. Claim Objections Claim 1, line 5, “an cover” it contains grammatical error, and should be changed to -a cover-. Claim 8, line 7, “an cover” it contains grammatical error, and should be changed to -a cover-. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 2 and 4-11 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Sridhar (US. Pat. 6,621,135). Regarding claim 1, Sridhar teaches a microelectromechanical switching element comprising: a carrier substrate with a carrier layer 24, an electrically insulating layer 56, and a semiconductor layer (52, 54) (col. 3, lines 45-60); a deflectable bending element (52, 54) formed by a freed subregion of the semiconductor layer; and an cover substrate (20, 22) connected to the carrier substrate; wherein the carrier layer defines a first cutout (cutout defined by 24 and 22) in the region of the bending element; and the cover substrate comprises a second cutout (area between the cover 20 and the layer 24) and/or an encircling spacer layer in the region of the bending element; the first cutout and the second cutout define a superordinate hollow space in which the bending element is arranged so as to be deflectable; the superordinate hollow space is delimited by the carrier layer and by the cover substrate to provide a hermetically encapsulation from the external environment (col. 6, lines 37-42); and the carrier substrate comprises a silicon-on-insulator layer system (Figs. 1-2 and col. 3, lines 15-30). Regarding claim 8, Sridhar teaches an apparatus comprising: an array of multiple microelectromechanical switching elements (col. 5, lines 13-20), wherein each microelectromechanical switching element comprises: a carrier substrate 24 with a carrier layer 24, an electrically insulating layer 56, and a semiconductor layer 52/54 (col. 3, lines 45-60); a deflectable bending element (52, 54) formed by a freed subregion of the semiconductor layer; and an cover substrate (20, 22) connected to the carrier substrate; wherein the carrier layer defines a first cutout (cutout defined by 24 and 22) in the region of the bending element; and the cover substrate comprises a second cutout (area between the cover 20 and the layer 24) and/or an encircling spacer layer in the region of the bending element; the first cutout and the second cutout define a superordinate hollow space in which the bending element is arranged so as to be deflectable; the superordinate hollow space is delimited by the carrier layer and by the cover substrate to provide a hermetically encapsulation from the external environment (col. 6, lines 37-42); and the carrier substrate comprises a silicon-on-insulator layer system (Figs. 1-2 and col. 3, lines 15-30). Regarding claim 2, Sridhar teaches the switching element wherein a deflection direction of the bending element (52, 54) is oriented perpendicularly with respect to the layer plane of the carrier substrate (the carrier substrate is planar, while the bending element is deflectable downward/upward, see Figs. 1, 6). Regarding claim 4, Sridhar teaches the switching element wherein the hermetic encapsulation of the superordinate hollow space includes a permanent, fluid-tight, areal connection between the carrier substrate 24 and the cover substrate 20 (the anodic bonding between the carrier substrate 24 and the cover 20/22 creates a permanent, fluid-tight and areal connection, see col. 6, lines 37-42, and col. 5, lines 65-67). Regarding claim 5, Sridhar teaches the switching element wherein the cover substrate 20 comprises an electrically insulating cover substrate comprising glass or silicon (the glass cover is inherently electrically insulating, see col. 6, lines 48-50). Regarding claim 6, Sridhar teaches the switching element wherein: a switching contact 58 is arranged on the bending element (52, 54); and the cover substrate (20, 22) bears at least one mating contact (32, 34) which is able to be contacted with the switching contact of the bending element by a deflection of the bending element 52/54 (Fig. 1 and coil. 4, lines 1-15). Regarding claim 7, Sridhar teaches the switching element wherein the cover substrate (20, 22) comprises a control electrode 44 to influence the deflection of the bending element 52/54 (Fig. 1 and coil. 4, lines 1-15). Regarding claim 9, Sridhar teaches the apparatus comprising a switching apparatus (contacts 52/54 and 32/34 forms a switch, see (Fig. 1 and coil. 4, lines 1-15). Regarding claim 10, Sridhar teaches the apparatus comprising a surface- mountable component (the solder ball terminal 36/38 indicate that the MEMS device is mountable to external devices such as PCB, see Fig. 1 and col. 3, lines 35-40). Regarding claim 11, Sridhar teaches the apparatus wherein the cover substrate (20, 22) and/or the carrier substrate 24 comprises one or more lead throughs (28, 40, 42, 48, 50, 68) for electrical contacting of the at least one switching element (30, 36, 38, 46, 66, see Fig. 1). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Sridhar in view of Wilson (US20100065946). Regarding claim 3, Sridhar does not teach the cutout in the carrier layer being formed by a prefabricated cavity in the silicon-on-insulator layer (SOI) system. However, Wilson teaches a method for manufacturing a silicon-on-insulator wafer (paragraphs 2, 11, 51), in which a cavity 20b is formed in the handle wafer (carrier) 12b as part of the SOI wafer fabrication itself (Fig. 1b, 5a, and paragraph 36, 51). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to use a prefabricated cavity SOI substrate as thought by Wilson in the MEMS device of Sridhar to provide a defined cutout beneath the movable element while reducing backside processing and improving manufacturability. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to AHMED M SAEED whose telephone number is (571)270-7976. The examiner can normally be reached 10-8pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Renee Luebke can be reached at (571) 272-2009. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /AHMED M SAEED/Primary Examiner, Art Unit 2833
Read full office action

Prosecution Timeline

Aug 31, 2023
Application Filed
Jan 29, 2026
Non-Final Rejection — §102, §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12596223
LIGHTING KEYBOARD AND BACKLIGHT MODULE THEREOF
2y 5m to grant Granted Apr 07, 2026
Patent 12597572
LAYER-STRUCTURED, OPEN-DESIGN KEYBOARD
2y 5m to grant Granted Apr 07, 2026
Patent 12592348
TERMINAL MODULE
2y 5m to grant Granted Mar 31, 2026
Patent 12587194
CAPACITIVE BUTTON
2y 5m to grant Granted Mar 24, 2026
Patent 12580367
ADJUSTABLE PANEL ASSEMBLY AND ELECTRIC APPLIANCE WITH THE SAME
2y 5m to grant Granted Mar 17, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
81%
Grant Probability
93%
With Interview (+12.4%)
2y 2m
Median Time to Grant
Low
PTA Risk
Based on 737 resolved cases by this examiner. Grant probability derived from career allow rate.

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