DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 03/12/2026 has been entered.
Remarks/Arguments
2 Applicant's arguments filed 09/15/2025 have been fully considered but they are not persuasive.
On pages 11 of the Remarks, the applicant argues “least the following elements of claim 17, "a delay device, wherein the delay device is adapted to: divide an input signal (SO) into a first input signal (SO-1) and a second input signal (SO-2); delay the first input signal (SO-1) by a first delay time (TD-1) to obtain a first delayed input signal (SO-1'); delay the second input signal (SO-2) by a second delay time (TD-2) to obtain a second delayed input signal (SO-2'), wherein the second delay time (TD-2) is different from the first delay time (TD-1); and output the first delayed input signal (SO-1') to a first input (E1) of the six-port circuit and to output the second delayed input signal (SO-2') to a second input (E2) of the six-port circuit."” the Examiner respectfully disagrees with the applicant’s arguments for the following reasons.
HALDER discloses divide an input signal (S0) (Fig. 1-4 Item 13 discloses resonator 13 a s a double-gate circuit or, if applicable, also as a multi-gate circuit. in Paragraph [0033]), into a first input signal (S0-1) (Fig. 1-4 Item 13 Top) and a second input signal (S0-2) (Fig. 1-4 Item 15b discloses FIG. 4 with the additional references “a” and “b.” Each of the partial systems comprises an oscillator 12 a, 12 b, a delay lines 15 a, 15 b, a six-gate circuit 14 a, 14 b in Paragraph [0099]),
On pages 11 of the Remarks, the applicant argues “least the following elements of claim 17, "a first surface acoustic wave (SAW) delay line adapted to delay (202) the first input signal (SO-1) by the first delay time (TD-1); and a second SAW delay line adapted to delay the second input signal (SO-2) by the second delay time (TD-2), wherein the delay device comprises a circuit board, wherein the first surface acoustic wave delay line and the second surface acoustic wave delay line are arranged on the circuit board"."” the Examiner respectfully disagrees with the applicant’s arguments for the following reasons.
LURZ teaches a second SAW delay line (Fig. 1-4 item 1200, 1202, & 1204 discloses resonance frequency of at least one resonator SAW1, SAWN in Paragraph [0112]) adapted to delay the second input signal (Fig. 1-4 item 1204 discloses a second partial delay line 1204 in the delay line 1200 in Paragraph [0109]) by the second delay time (Fig. 1-4 item 1204), wherein the delay device (Fig. 1-4 item 1200) comprises a circuit board (Fig. 1-4 item 1200,1202, & 1204 discloses delay circuit 1200 with a first partial delay line 1202 and a second partial delay line 1204 in the delay line 1200in Paragraph [0109]), wherein the first surface acoustic wave delay line (Fig. 1-4 item 1202 discloses a first partial delay line 1202 0in Paragraph [0109]) and the second surface acoustic wave delay line (Fig. 1-4 item 1204 discloses a second partial delay line 1204 in the delay line 1200 in Paragraph [0109]) are arranged on the circuit board (Fig. 1-4 item 1200 discloses delay circuit on the circuit board ( 1200 1200 in Paragraph [0109]).
On pages 12 of the Remarks, the applicant argues “iii. The Lurz reference fails to add to the disclosure of the Halder reference
to make obvious the elements of claim 17
In paragraph 23, the Office Action asserts that the Lurz reference teaches the delay device comprises a circuit board stating that:
"(Fig. 1-4 item 1200 discloses delay line 1200 would be supported on substrate or circuit board comprises two optionally selectable delay line lengths in Paragraph
[0109])." the Examiner respectfully disagrees with the applicant’s arguments for the following reasons.
LURZ teaches comprises a circuit board (Fig. 1-4 item 1200,1202, & 1204 discloses delay circuit 1200 with a first partial delay line 1202 and a second partial delay line 1204 in the delay line 1200 is considered a circuit board in Paragraph [0109]), wherein the first surface acoustic wave delay line (Fig. 1-4 item 1202 discloses a first partial delay line 1202 0in Paragraph [0109]) and the second surface acoustic wave delay line (Fig. 1-4 item 1204 discloses a second partial delay line 1204 in the delay line 1200 in Paragraph [0109]) are arranged on the circuit board (Fig. 1-4 item 1200 discloses delay circuit on the circuit board ( 1200 1200 in Paragraph [0109]).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103(a) which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
3 Claims 17, 19-33, and 35-38 are rejected under 35 U.S.C. 103(a) as being unpatentable over HALDER et al. (US 2014/0347035 A1) in view of LURZ et al. (US 20180106841 A1)
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4 Regarding to claim 17, HALDER discloses an apparatus (Fig. 1-4 Item 10 discloses measuring system 10 in Paragraph [0032]), comprising:
a six-port circuit (Fig. 1-4 Item 14 discloses six-gate circuit 14 can be configured in different ways. As example therefor, we point to the aforementioned IEEE Publication “Multi-Port Technology for Microwave and Optical Communications in Paragraph [0043]);
a delay device (Fig. 1-4 Item 15 discloses a delay line 15, wherein the latter represents a length d. The resonator 13 output is connected to the six-gate circuit 14, in Paragraph [0042]), wherein the delay device is adapted to:
divide an input signal (S0) (Fig. 1-4 Item 13 discloses resonator 13 a s a double-gate circuit or, if applicable, also as a multi-gate circuit. in Paragraph [0033]), into a first input signal (S0-1) (Fig. 1-4 Item 13 Top) and a second input signal (S0-2) (Fig. 1-4 Item 13bottom);
delay the first input signal (S0-1) by a first delay time (TD-1) to obtain a first delayed input signal (S0-1′) (Fig. 1-4 Item 15 discloses delay line 15 can also be configured in different ways. As example in Paragraph [0045]);
delay the second input signal (S0-2) (Fig. 1-4 Item 15 discloses two signals received at the six-gate circuit 14 have the resonance frequency fx in Paragraph [0055]) by a second delay time (TD-2) to obtain a second delayed input signal (S0-2′), wherein the second delay time (TD-2) is different from the first delay time (TD-1) (Fig. 1-4 Item 15 discloses two signals received at the six-gate circuit 14, the two signals arrive at a phase difference dφ which is proportional to the unknown resonance frequency fx in Paragraph [0055]); and
output the first delayed input signal (SO-1') to a first input (E1) of the six-port circuit and to output the second delayed input signal (SO-2') to a second input (E2) of the same six-port circuit; (Fig. 1-4 Item 14 & 23 discloses a six-gate circuit 14 control 23 then realizes a computation as follows. It is assumed that the frequency f1 can be preset with the aid of the control 23, that the value is transmitted to the six-gate circuit 14 and that the length of the delay line 15 is not known. This unknown length is henceforth characterized with the reference dx in Paragraph [0073]);
wherein the delay device (Fig. 1-4 Item 15 discloses a delay line 15, wherein the latter represents a length d. The resonator 13 output is connected to the six-gate circuit 14, in Paragraph [0042]), comprises:
a first surface acoustic wave (SAW) delay line (Fig. 1-4 Item 15 discloses line 15 can preferably be embodied as SAW component, that is to say by utilizing acoustic surface waves in Paragraph [0045]) adapted to delay (202) the first input signal (SO-1) by the first delay time (Fig. 1-4 Item 15 discloses delay line 15 can also be configured in different ways. As example in Paragraph [0045]); and
However HALDER does not explicitly teach a second different SAW delay line adapted to delay the second input signal (SO-2) by the second delay time (TD-2), wherein the delay device comprises a circuit board,
wherein the first surface acoustic wave delay line and the second surface acoustic wave delay line are arranged on the circuit board.
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However, LURZ teaches a second different (Fig. 1 and 4 discloses an electrical signal s1 that is supplied to the delay line 1200 at its input 1200 a is delayed by a first, comparatively short delay time, or a second, comparatively long delay in Paragraph [01109]) SAW delay line (Fig. 1 and 4 item 150,1200- 1206, term E2 of 6 port 110 discloses SAW power divider with delay lines 1200-1206 in Paragraph [0112]) adapted to delay the second input signal (Fig. 1 and 5 item S1 low shows a second delay signal connected to E2 of port six ) by the second delay time (TD-2), wherein the delay device comprises a circuit board (Fig. 1-4 item 1200,1202, & 1204 discloses delay circuit 1200 with a first partial delay line 1202 and a second partial delay line 1204 in the delay line 1200in Paragraph [0109]),,
wherein the first surface acoustic wave delay line (FIG. 4 item s1 high) and the second surface acoustic wave delay line (FIG. 4 item s1 low includes 1200-1206) are arranged on the circuit board (Fig. 1-4 item 1200 discloses delay circuit on the circuit board 1200 1200 in Paragraph [0109]).
It would have been obvious to one skilled in the art before the effective filing date of the invention to modify the common feature of a measuring system with a six-gate circuit and a delay line as taught by HALDER to further utilize the signals can be detected at different sampling times, which timewise are spaced apart maximally approximately 100 ns (nanoseconds) as taught by LURZ in order to check for interference signals in Paragraph [0071]),
5 Regarding to claim 19, HALDER discloses the apparatus of claim 17, wherein the delay device comprises one or more of:
a first conductor structure (LS-1) adapted to delay the first input signal (S0-1) by the first delay time (TD-1) (Fig. 1-4 Item 15 a discloses FIG. 4, the delay line 15 a, the six-gate circuit 14 a and the changeover switch 22 a in Paragraph [0105]); and
However HALDER does not explicitly teach a second different conductor structure adapted to delay the second input signal (S0-2) by the second delay time (TD-2)
However, LURZ teaches a second different conductor structure (Fig. 1 and 4 discloses wo switches 1206 a, 1206 b,in Paragraph [01109]) adapted to delay the second input signal (S0-2) by the second delay time (TD-2) (Fig. 1 and 4 discloses an electrical signal s1 that is supplied to the delay line 1200 at its input 1200 a is delayed by a first, comparatively short delay time, or a second, comparatively long delay in Paragraph [01109])
It would have been obvious to one skilled in the art before the effective filing date of the invention to modify the common feature of a measuring system with a six-gate circuit and a delay line as taught by HALDER to further utilize the signals can be detected at different sampling times, which timewise are spaced apart maximally approximately 100 ns (nanoseconds) as taught by LURZ in order to check for interference signals in Paragraph [0071]),
6 Regarding to claim 20, HALDER discloses the apparatus of claim 19, wherein the delay device comprises
a power splitting device adapted to split the input signal (S0) into the first input signal (S0-1) and the second input signal (S0-2) (Fig. 1-4 Item 12 discloses output signal from the oscillator 12 is a sine oscillation with changeable frequency and a specifiable amplitude in Paragraph [0032]),
7 Regarding to claim 21, HALDER discloses the apparatus of claim 20, wherein the first SAW delay line Fig. 1-4 Item 15 discloses line 15 can preferably be embodied as SAW component, that is to say by utilizing acoustic surface waves in Paragraph [0045]) is implemented as a discrete SAW delay line (Fig. 1-4 Item 15 discloses a delay line 15, wherein the latter represents a length d. The resonator 13 output is connected to the six-gate circuit 14, in Paragraph [0042]), and
However HALDER does not explicitly teach wherein the second SAW delay line implemented as a second different discrete SAW delay line.
However, LURZ teaches wherein the second SAW delay line implemented as a second different discrete SAW delay line. (Fig. 1 and 4 discloses an electrical signal s1 that is supplied to the delay line 1200 at its input 1200 a is delayed by a first, comparatively short delay time, or a second, comparatively long delay in Paragraph [01109])
It would have been obvious to one skilled in the art before the effective filing date of the invention to modify the common feature of a measuring system with a six-gate circuit and a delay line as taught by HALDER to further utilize the signals can be detected at different sampling times, which timewise are spaced apart maximally approximately 100 ns (nanoseconds) as taught by LURZ in order to check for interference signals in Paragraph [0071]),
8 Regarding to claim 22, HALDER discloses the apparatus of claim 17, wherein the circuit board includes one or more of the following elements arranged on the circuit board:
a power splitting device adapted to split the input signal (S0) into the first input signal (S0-1) and the second input signal (S0-2) (Fig. 1-4 Item 12 discloses output signal from the oscillator 12 is a sine oscillation with changeable frequency and a specifiable amplitude in Paragraph [0032]),
However HALDER does not explicitly teach wherein the circuit board includes one or more of the following elements arranged on the circuit board:
a first conductor structure (LS-1) adapted to delay the first input signal (S0-1) by the first delay time (TD-1); or
a second different conductor structure (LS-2) adapted to delay (202) the second input signal (S0-2) by the second delay time (TD-2).
However, LURZ teaches wherein the circuit board (Fig. 1-4 item 1200 discloses delay line 1200 would be supported on substrate or circuit board comprises two optionally selectable delay line lengths in Paragraph [0109]) wherein the circuit board includes one or more of the following elements arranged on the circuit board:
a first conductor structure (LS-1) adapted to delay the first input signal (S0-1) by the first delay time (TD-1) (Fig. 1-4 item 1206 discloses the delay line 1200. With the aid of two switches 1206 a, 1206 b, for example controllable with the arithmetic unit 130 in Paragraph [0109]); or
a second different conductor (Fig. 1 and 4 discloses wo switches 1206 a, 1206 b in Paragraph [01109]) structure (LS-2) adapted to delay (202) the second input signal (S0-2) by the second delay time (TD-2(Fig. 1-4 item 1206 discloses the delay line 1200. With the aid of two switches 1206 a, 1206 b, for example controllable with the arithmetic unit 130 in Paragraph [0109]);
It would have been obvious to one skilled in the art before the effective filing date of the invention to modify the common feature of a measuring system with a six-gate circuit and a delay line as taught by HALDER to further utilize the signals can be detected at different sampling times, which timewise are spaced apart maximally approximately 100 ns (nanoseconds) as taught by LURZ in order to check for interference signals in Paragraph [0071]),
9 Regarding to claim 23, HALDER discloses the apparatus of claim 17.
However HALDER does not explicitly teach wherein an amount of a difference between the first delay time (TD-1) and the second delay time (TD-2) is at least one of:
between about 1 nanosecond (ns) and about 1000 ns;
between 10 ns and 200 ns; or 100 ns.
However, LURZ teaches wherein an amount of a difference between the first delay time (TD-1) and the second delay time (TD-2) is at least one of:
between about 1 nanosecond (ns) and about 1000 ns;
between 10 ns and 200 ns; or 100 ns (Fig. 1-4 discloses output signals b3, b4, and/or the signals B.sub.3, B.sub.4 which timewise are spaced apart maximally approximately 100 ns (nanoseconds), especially preferred approximately 10 ns b in Paragraph [0070]),
It would have been obvious to one skilled in the art before the effective filing date of the invention to modify the common feature of a measuring system with a six-gate circuit and a delay line as taught by HALDER to further utilize the signals can be detected at different sampling times, which timewise are spaced apart maximally approximately 100 ns (nanoseconds) as taught by LURZ in order to check for interference signals in Paragraph [0071]),
10 Regarding to claim 24, HALDER discloses the apparatus of claim 17.
However HALDER does not explicitly teach wherein the first delay time (TD-1) and/or the second delay time (TD-2) is at least one of:
between about 0.5 microseconds (μs) and about 10 μs;
between 1 μs and 3 μs; or 2 μs.
However, LURZ teaches wherein the first delay time (TD-1) and/or the second delay time (TD-2) is at least one of:
between about 0.5 microseconds (μs) and about 10 μs;
between 1 μs and 3 μs; or 2 μs (Fig. 1-4 discloses output signals b3, b4, and/or the signals B.sub.3, B.sub.4 which timewise are spaced apart maximally approximately 100 ns (nanoseconds), especially preferred approximately 10 ns b in Paragraph [0070]),
It would have been obvious to one skilled in the art before the effective filing date of the invention to modify the common feature of a measuring system with a six-gate circuit and a delay line as taught by HALDER to further utilize the signals can be detected at different sampling times, which timewise are spaced apart maximally approximately 100 ns (nanoseconds) as taught by LURZ in order to check for interference signals in Paragraph [0071]),
11 Regarding to claim 25, HALDER discloses the apparatus of claim 17, further comprising:
at least one SAW resonator adapted to provide the input signal (S0). (Fig. 1-4 Item 13 discloses resonator 13 is preferably a so-called SAW resonator and/or an AOW resonator (SAW=surface acoustic wave; AOW=acoustic surface wave) top signal in Paragraph [0033]);
12 Regarding to claim 26, HALDER discloses the apparatus of claim 17, wherein the six-point circuit (Fig. 1-4 Item 14 discloses six-gate circuit 14 can be configured in different ways. As example therefor, we point to the aforementioned IEEE Publication “Multi-Port Technology for Microwave and Optical Communications in Paragraph [0043]) is adapted to superimpose the first delayed input signal (S0-1′) (Fig. 1-4 Item 15 a discloses FIG. 4, the delay line 15 a, the six-gate circuit 14 a and the changeover switch 22 a in Paragraph [0105]) and the second delayed input signal (S0-2′) (Fig. 1-4 Item 15 b discloses FIG. 4, which includes the oscillator 12 b, the delay line 15 b, the six-gate circuit 14 b in Paragraph [0106]) on one another at four different phase shifts of 0°, 90°, 180°, 270°, to obtain at least four phase shifted output signals (SA1, SA2, SA3, SA4), wherein the at least one output signal of the six-port circuit is one of the four phase shifted output signals (SA1, SA2, SA3, SA4) (Fig. 1-4 Item 15 discloses the delay line 15 includes the two signals arrive at a phase difference dφ which is proportional to the unknown resonance frequency fx in Paragraph [0055]),
13 Regarding to claim 27, HALDER discloses a measuring system, comprising:
a six-port circuit (Fig. 1-4 Item 14 discloses six-gate circuit 14 can be configured in different ways. As example therefor, we point to the aforementioned IEEE Publication “Multi-Port Technology for Microwave and Optical Communications in Paragraph [0043]);
a delay device (Fig. 1-4 Item 15 discloses a delay line 15, wherein the latter represents a length d. The resonator 13 output is connected to the six-gate circuit 14, in Paragraph [0042]), wherein the delay device is adapted to:
divide an input signal (S0) (Fig. 1-4 Item 13 discloses resonator 13 a s a double-gate circuit or, if applicable, also as a multi-gate circuit. in Paragraph [0033]), into a first input signal (S0-1) (Fig. 1-4 Item 13 Top) and a second input signal (S0-2) (Fig. 1-4 Item 13bottom);
delay the first input signal (S0-1) by a first delay time (TD-1) to obtain a first delayed input signal (S0-1′) (Fig. 1-4 Item 15 a discloses FIG. 4, the delay line 15 a, the six-gate circuit 14 a and the changeover switch 22 a in Paragraph [0105]);
delay the second input signal (S0-2) by a second delay time (TD-2) to obtain a second delayed input signal (S0-2′), wherein the second delay time (TD-2) is different from the first delay time (TD-1) (Fig. 1-4 Item 15 b discloses FIG. 4, which includes the oscillator 12 b, the delay line 15 b, the six-gate circuit 14 b in Paragraph [0106]), and
output the first delayed input signal (S0-1′) to a first input (E1) of the six-port circuit and to output the second delayed input signal (S0-2′) to a second input (E2) of the same six-port circuit (Fig. 1-4 Item 14 & 23 discloses a six-gate circuit 14 control 23 then realizes a computation as follows. It is assumed that the frequency f1 can be preset with the aid of the control 23, that the value is transmitted to the six-gate circuit 14 and that the length of the delay line 15 is not known. This unknown length is henceforth characterized with the reference dx in Paragraph [0073]);
a computing device adapted to determine a first quantity (G1) characterizing a frequency of the input signal (S0) in dependence on at least one output signal of the six-port circuit (Fig. 1-4 Item 14 & 23 discloses a six-gate circuit 14 control 23 then realizes a computation as follows. It is assumed that the frequency f1 can be preset with the aid of the control 23, that the value is transmitted to the six-gate circuit 14 and that the length of the delay line 15 is not known. This unknown length is henceforth characterized with the reference dx in Paragraph [0073]); and
at least one signal source adapted to provide the input signal (S0) (Fig. 1-4 Item 12 discloses output signal from the oscillator 12 is a sine oscillation with changeable frequency and a specifiable amplitude in Paragraph [0032]).
wherein the delay device (Fig. 1-4 Item 15 discloses a delay line 15, wherein the latter represents a length d. The resonator 13 output is connected to the six-gate circuit 14, in Paragraph [0042]), comprises:
a first surface acoustic wave (SAW) delay line (Fig. 1-4 Item 15 discloses line 15 can preferably be embodied as SAW component, that is to say by utilizing acoustic surface waves in Paragraph [0045]) adapted to delay (202) the first input signal (SO-1) by the first delay time (Fig. 1-4 Item 15 discloses delay line 15 can also be configured in different ways. As example in Paragraph [0045]); and
However HALDER does not explicitly teach a second distinct SAW delay line adapted to delay the second input signal (SO-2) by the second delay time (TD-2), wherein the delay device comprises a circuit board, wherein the first surface acoustic wave delay line and the second surface acoustic wave delay line are arranged on the circuit board.
However, LURZ teaches a second distinct SAW delay line (Fig. 1-4 item 1200, 1202, & 1204 discloses resonance frequency of at least one resonator SAW1, SAWN connect to E2 in Paragraph [0112]) adapted to delay the second input signal (Fig. 1-4 item 1204 discloses a second partial delay line 1204 in the delay line 1200 in Paragraph [0109]) by the second delay time (Fig. 1-4 item 1204), wherein the delay device (Fig. 1-4 item 1200) comprises a circuit board (Fig. 1-4 item 1200,1202, & 1204 discloses delay circuit 1200 with a first partial delay line 1202 and a second partial delay line 1204 in the delay line 1200in Paragraph [0109]), wherein the first surface acoustic wave delay line (Fig. 1-4 item s1 top signal connect to E1 0in Paragraph [0109]) and the second surface acoustic wave delay line (Fig. 1-4 item 1204 discloses a second partial delay line 1204 in the delay line 1200 in Paragraph [0109]) are arranged on the circuit board (Fig. 1-4 item 1200 discloses delay circuit on the circuit board ( 1200 1200 in Paragraph [0109]).
It would have been obvious to one skilled in the art before the effective filing date of the invention to modify the common feature of a measuring system with a six-gate circuit and a delay line as taught by HALDER to further utilize the signals can be detected at different sampling times, which timewise are spaced apart maximally approximately 100 ns (nanoseconds) as taught by LURZ in order to check for interference signals in Paragraph [0071]),
14 Regarding to claim 28, HALDER discloses the measuring system, comprising: measuring system of claim 27, wherein the at least one signal source includes at least one SAW resonator adapted to provide the input signal (S0) (Fig. 1-4 Item 13 discloses resonator 13 is preferably a so-called SAW resonator and/or an AOW resonator (SAW=surface acoustic wave; AOW=acoustic surface wave) top signal in Paragraph [0033]);
15 Regarding to claim 29, HALDER discloses the measuring system of claim 27, wherein the measuring system is adapted to measure at least one of the following quantities:
a) mechanical stresses, characterizable and/or associable with bending and/or compression and/or strain and/or torsion;
b) torque;
c) force as a force sensor and/or force transducer and/or load cell and/or force plate;
d) temperature; e) pressure; (Fig. 1-4 Item 10 discloses measuring system 10 can thus be used at least for measuring the temperature or the pressure or the elongation in Paragraph [0061]),
f) vibration; g) shock; h) resonances; I) shear forces; j) transverse forces; k) elasticity; l) deformation; or m) contraction.
16 Regarding to claim 30, HALDER discloses the measuring system of claim 28, wherein the measuring system comprises:
at least one signal generator (SG) (Fig. 1-4 Item 12 discloses output signal from the oscillator 12 is a sine oscillation with changeable frequency and a specifiable amplitude in Paragraph [0032]) adapted to provide an excitation signal (AS) for the at least one SAW resonator (Fig. 1-4 Item 13 discloses resonator 13 is preferably a so-called SAW resonator and/or an AOW resonator (SAW=surface acoustic wave; AOW=acoustic surface wave) top signal in Paragraph [0033]) and/or a reference signal (RS) for the six-port circuit (Fig. 1-4 Item 14 discloses six-gate circuit 14 can be configured in different ways. As example therefor, we point to the aforementioned IEEE Publication “Multi-Port Technology for Microwave and Optical Communications in Paragraph [0043]).
17 Regarding to claim 31, HALDER discloses the measuring system of claim 30, wherein the measuring system comprises:
a coupling device (Fig. 1-4 Item 14 & 23 discloses a six-gate circuit 14 control 23) adapted to output the excitation signal (AS) to the at least one SAW resonator (Fig. 1-4 Item 13 discloses resonator 13 is preferably a so-called SAW resonator and/or an AOW resonator (SAW=surface acoustic wave; AOW=acoustic surface wave) top signal in Paragraph [0033]) and to receive an output signal (AS′) of the at least one SAW resonator and to output the output signal (AS′) of the at least one SAW resonator to at least one of the first input (Fig. 1-4 Item 15 a discloses FIG. 4, the delay line 15 a, the six-gate circuit 14 a and the changeover switch 22 a in Paragraph [0105]) and the second input (E1, E2) ) (Fig. 1-4 Item 15 b discloses FIG. 4, which includes the oscillator 12 b, the delay line 15 b, the six-gate circuit 14 b in Paragraph [0106]) of the six-port circuit (110) (Fig. 1-4 Item 14 discloses six-gate circuit 14 can be configured in different ways. As example therefor, we point to the aforementioned IEEE Publication “Multi-Port Technology for Microwave and Optical Communications in Paragraph [0043]) and/or to the delay device (120; e4) (Fig. 1-4 Item 15 discloses a delay line 15, wherein the latter represents a length d. The resonator 13 output is connected to the six-gate circuit 14, in Paragraph [0042]).
18 Regarding to claim 32, HALDER discloses the measuring system of claim 27, wherein the six-point circuit (Fig. 1-4 Item 14 discloses six-gate circuit) is adapted to superimpose the first delayed input signal (S0-1′) (Fig. 1-4 Item 15 a discloses FIG. 4, the delay line 15 a) and the second delayed input signal (S0-2′) (Fig. 1-4 Item 15 d discloses FIG. 4, the delay line 15 b) on one another at four different phase shifts of 0°, 90°, 180°, 270°, to obtain at least four phase shifted output signals (SA1, SA2, SA3, SA4), wherein the at least one output signal of the six-port circuit (Fig. 1-4 Item 14 discloses six-gate circuit) is one of the four phase shifted output signals (SA1, SA2, SA3, SA4) (Fig. 1-4 Item 15 discloses the delay line 15 includes the two signals arrive at a phase difference dφ which is proportional to the unknown resonance frequency fx in Paragraph [0055]).
19 Regarding to claim 33, HALDER discloses a method of operating an apparatus having a six-port circuit (Fig. 1-4 Item 14 discloses six-gate circuit), a delay device (Fig. 1-4 Item 15 discloses a delay line 15), and a computing device (Fig. 1-4 Item 14 & 23 discloses a six-gate circuit 14 control 23), comprising:
dividing an input signal (S0) into a first input signal (S0-1) and a second input signal (S0-2) using the delay device (Fig. 1-4 Item 13 discloses resonator 13 a s a double-gate circuit or, if applicable, also as a multi-gate circuit. in Paragraph [0033]),
delaying the first input signal (S0-1) by a first delay time (TD-1) (Fig. 1-4 Item 15 a discloses FIG. 4, the delay line 15 a) using a first surface acoustic wave (SAW) delay line (Fig. 1-4 Item 15 discloses line 15 can preferably be embodied as SAW component, that is to say by utilizing acoustic surface waves in Paragraph [0045]) of the delay device to obtain a first delayed input signal (S0-1′) (Fig. 1-4 Item 15 a discloses FIG. 4, the delay line 15 a, the six-gate circuit 14 a and the changeover switch 22 a in Paragraph [0105]);
outputting the first delayed input signal (S0-1′) to a first input (E1) of the six-port circuit using the delay device (Fig. 1-4 Item 15 a discloses FIG. 4, the delay line 15 a, the six-gate circuit 14 a and the changeover switch 22 a in Paragraph [0105]);
outputting the second delayed input signal (S0-2′) to a second input (E2) of the same six-port circuit using the delay device (Fig. 1-4 Item 15 b discloses FIG. 4, which includes the oscillator 12 b, the delay line 15 b, the six-gate circuit 14 b in Paragraph [0106]);
determining a first quantity (G1) characterizing a frequency of the input signal (S0) in dependence on at least one output signal of the six-port circuit using the computing device (Fig. 1-4 Item 14 & 23 discloses a six-gate circuit 14 control 23 then realizes a computation as follows. It is assumed that the frequency f1 can be preset with the aid of the control 23, that the value is transmitted to the six-gate circuit 14 and that the length of the delay line 15 is not known. This unknown length is henceforth characterized with the reference dx in Paragraph [0073]);
However HALDER does not explicitly teach delaying the second input signal (S0-2) by a second delay time (TD-2) using a second distinct SAW delay line of the delay device to obtain a second delayed input signal (S0-2'), wherein the second delay time (TD-2) is different from the first delay time (TD-1) and wherein the first surface acoustic wave delay line and the second surface acoustic wave delay line are arranged on the circuit board of the delay device;
having a circuit board, a second SAW delay line of the delay device to obtain a second delayed input signal (SO-2'), wherein the second delay time (TD-2) is different from the first delay time (TD-1) and wherein the first surface acoustic wave delay line and the second surface acoustic wave delay line are arranged on the circuit board of the delay device;
However, LURZ teaches delaying the second input signal (S0-2) by a second delay time (TD-2) using a second distinct SAW delay line (Fig. 1-4 item 1200, 1202, & 1204 discloses resonance frequency of at least one resonator SAW1, SAWN connect to E2 in Paragraph [0112]) of the delay device (Fig. 1-4 item 1200 discloses delay line 1204 in the delay line 1200 in Paragraph [0109]) is to obtain a second delayed input signal (S0-2'), wherein the second delay time (TD-2) (Fig. 1-4 item s1 bottom with delay lines 1200-1206 connects to term E2 of 5 port device) is different from the first delay time (TD-1) (Fig. 1-4 item s1 top connects to term E1 of 5 port device) and wherein the first surface acoustic wave delay line (Fig. 1-4 item s1 top) and the second surface acoustic wave delay line (Fig. 1-4 item s1 bottom 1200-1206) are arranged on the circuit board of the delay device;
having a circuit board (Fig. 1-4 item 1200 discloses delay circuit on the circuit board ( 1200 1200 in Paragraph [0109])., a second SAW delay line (Fig. 1-4 item 1200, 1202, & 1204 discloses resonance frequency of at least one resonator SAW1, SAWN in Paragraph [0112]) of the delay device to obtain a second delayed input signal (Fig. 1-4 item 1204 discloses a second partial delay line 1204 in the delay line 1200 in Paragraph [0109]), wherein the second delay time (Fig. 1-4 item 1204 discloses a second partial delay line 1204 in the delay line 1200 in Paragraph [0109]) is different from the first delay time (Fig. 1-4 item 1202 discloses a first partial delay line 1202 0in Paragraph [0109]) and wherein the first surface acoustic wave delay line (Fig. 1-4 item 1202 discloses a first partial delay line 1202 0in Paragraph [0109]) and the second surface acoustic wave delay line (Fig. 1-4 item 1204 discloses a second partial delay line 1204 in the delay line 1200 in Paragraph [0109]) are arranged on the circuit board of the delay device (Fig. 1-4 item 1200 discloses delay circuit on the circuit board ( 1200 1200 in Paragraph [0109]).
It would have been obvious to one skilled in the art before the effective filing date of the invention to modify the common feature of a measuring system with a six-gate circuit and a delay line as taught by HALDER to further utilize the signals can be detected at different sampling times, which timewise are spaced apart maximally approximately 100 ns (nanoseconds) as taught by LURZ in order to check for interference signals in Paragraph [0071]),
20 Regarding to claim 35, HALDER discloses the method of claim 34, further comprising at least one of the following:
a) switching on or initializing of the apparatus (Fig. 1-4 Item 22 discloses changeover switch 22 is connected to the six-gate circuit 14, meaning on the one hand directly and on the other hand via the delay line 15 b in Paragraph [0063]);
b) switching on or initializing of a measurement system comprising the apparatus (Fig. 1-4 Item 22 discloses the measuring system 20 according to FIG. 2, a changeover switch 22 is provided between the resonator 13 and the six-gate circuit 14. in Paragraph [0063]);
c) determining a main resonance of a resonator (Fig. 1-4 Item 13 discloses changeover switch 22 is provided between the resonator 13 and the six-gate circuit 14 in Paragraph [0063]);
d) performing a power calibration (Fig. 1-4 Item 12 discloses output signal from the oscillator 12 is a sine oscillation with changeable frequency and a specifiable amplitude in Paragraph [0032]),
e) performing a linearization (Fig. 1-4 Item 22 discloses the start of the procedure, the changeover switch 22 is switched by the control 23 to the switching state where the output of the oscillator 12 is connected to the six-gate circuit in Paragraph [0071]),
f) determining the first quantity or the frequency of the input signal (S0), optionally adjusting a frequency of an excitation signal (AS) sent to the resonator (Fig. 1-4 Item 14 & 23 discloses a six-gate circuit 14 control 23 then realizes a computation as follows. It is assumed that the frequency f1 can be preset with the aid of the control 23, that the value is transmitted to the six-gate circuit 14 and that the length of the delay line 15 is not known. This unknown length is henceforth characterized with the reference dx in Paragraph [0073]).
21 Regarding to claim 36, HALDER discloses the method of claim 33, further comprising:
using the apparatus for at least one of the following elements or in at least one of the following fields:
a) determining a first quantity characterizing a frequency of the input signal (S0);
b) measuring mechanical stresses, for example characterizable or associable with bending and/or compression and/or strain and/or torsion;
c) measuring a torque;
d) measuring a force;
e) measuring a temperature (Fig. 1-4 Item 10 discloses measuring system 10 can thus be used at least for measuring the temperature or the pressure or the elongation in Paragraph [0061]);
f) measuring a pressure (Fig. 1-4 Item 10 discloses measuring system 10 can thus be used at least for measuring the temperature or the pressure or the elongation in Paragraph [0061]);
g) measuring vibration or vibrations;
h) measuring shock;
i) measuring resonances (Fig. 1-4 Item 10 discloses the determined resonance frequency fx. The measuring system 10 in Paragraph [0061]);
j) using in a vehicle;
k) using in an e-bike or pedelec electric cycle;
l) using in a working machine and/or using in a gearbox, power take-off shaft, axle, steering column, load-bearing body component, damper, shock absorber; m) using in an electric drive;
n) using in a structure or building and/or using for statics, structural components, bridge monitoring, wind load, earthquake monitoring, detection of geological changes, snow load, load, building monitoring;
o) using in power generation for power plant applications, wind turbines, rotor blade monitoring, pitch adjustment, hydropower;
p) using in weight detection and/or using for scales, industrial weighing, overload protection;
q) using in temperature measurement and/or temperature monitoring and/or using for ovens, cooking, food preparation and/or processing;
r) using in elevators or freight/passenger elevators; s) using in industrial applications or using in mechanical engineering or using for measurement technology for test stands;
t) using for monitoring, control and/or regulation of turbines, pumps, presses, punches, forming;
u) using in medical devices and/or exoskeletons, prostheses, operating tables, beds;
v) using in aerospace devices and/or using for landing gear load, wing monitoring, rudder monitoring;
w) using for shipping or marine applications;
x) using for railroad applications and/or for track construction, drive technology, train load;
y) using for implementation of safety device;
z) using for cleaning devices and/or washing machine, drum monitoring, dryer; aa) using for fluid technology and/or using for valves, flaps, pipes;
bb) using for quality assurance and/or for process monitoring;
cc) using for determination and/or evaluation of chemical compositions of fluids, including liquids and/or gases.
22 Regarding to claim 37, HALDER discloses the apparatus of claim 17.
However HALDER does not explicitly teach wherein the first SAW delay line and the second SAW delay line are implemented as separate components on the circuit board.
wherein the first surface acoustic wave delay line (Fig. 1-4 item 1202 discloses a first partial delay line 1202 0in Paragraph [0109]) and the second surface acoustic wave delay line (Fig. 1-4 item 1204 discloses a second partial delay line 1204 in the delay line 1200 in Paragraph [0109]) are arranged on the circuit board of the delay device (Fig. 1-4 item 1200 discloses delay circuit on the circuit board (1200 1200 in Paragraph [0109]).
It would have been obvious to one skilled in the art before the effective filing date of the invention to modify the common feature of a measuring system with a six-gate circuit and a delay line as taught by HALDER to further utilize the signals can be detected at different sampling times, which timewise are spaced apart maximally approximately 100 ns (nanoseconds) as taught by LURZ in order to check for interference signals in Paragraph [0071]),
23 Regarding to claim 38, HALDER discloses the apparatus of claim 27.
However HALDER does not explicitly teach wherein the first SAW delay line and the second SAW delay line are implemented as separate components on the circuit board.
wherein the first surface acoustic wave delay line (Fig. 1-4 item 1202 discloses a first partial delay line 1202 0in Paragraph [0109]) and the second surface acoustic wave delay line (Fig. 1-4 item 1204 discloses a second partial delay line 1204 in the delay line 1200 in Paragraph [0109]) are arranged on the circuit board of the delay device (Fig. 1-4 item 1200 discloses delay circuit on the circuit board (1200 1200 in Paragraph [0109]).
It would have been obvious to one skilled in the art before the effective filing date of the invention to modify the common feature of a measuring system with a six-gate circuit and a delay line as taught by HALDER to further utilize the signals can be detected at different sampling times, which timewise are spaced apart maximally approximately 100 ns (nanoseconds) as taught by LURZ in order to check for interference signals in Paragraph [0071]),
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BRENT J ANDREWS whose telephone number is (571)272-6101. The examiner can normally be reached 10am-5pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Judy Nguyen can be reached at (571)272-2258. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/BRENT J ANDREWS/Examiner, Art Unit 2858
/JUDY NGUYEN/Supervisory Patent Examiner, Art Unit 2858
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