DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claim 34 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by Zhang et al. (CN 113451386 A, cited by Applicant), Zhang hereinafter.
Examiner’s note
The following rejection is based on a foreign reference CN 113451386 A. For examination purpose reference is been made to a copy of a machine translation of the applied reference, which is hereby provided.
Regarding claim 34, Zhang discloses a display substrate, comprising: a base substrate (BS, ¶ [125], fig. 6); and a first metal layer (Ca, ¶ [126], fig. 15), a second metal layer (Cb, ¶ [126], fig. 15), a first conductive layer (LY1, ¶ [254], fig. 15), and a second conductive layer (LY2, ¶ [254], fig. 15) which are disposed on the base substrate (BS) in sequence, wherein the display substrate further comprises a first sub-pixel (101, ¶ [257]) and a second sub-pixel (102) which are on the base substrate (BS) and adjacent in a first direction; the first sub-pixel (101) comprises a first pixel circuit (100a, ¶ [126]), and the second sub-pixel (102) comprises a second pixel circuit (100a); the first pixel circuit (100a) and the second pixel circuit (100a) each comprise a capacitor (Cst, ¶ [126]) which comprises a first capacitor electrode (Cb, figs. 6 & 15) in the second metal layer (Cb) and a second capacitor electrode (Ca, figs. 6 & 15) in the first metal layer (Ca); the first capacitor electrode (Cb) of the first pixel circuit (100a) and the first capacitor electrode (Cb) of the second pixel circuit (100a) are connected to each other into an integrated capacitor electrode block (see fig. 10); the capacitor electrode block has a first opening (H1, ¶ [183], fig. 10) and a second opening (H2, ¶ [183], fig. 10); an orthographic projection of the first opening (H1) on the base substrate (BS) is overlapped with an orthographic projection of the second capacitor electrode (Ca) of the first pixel circuit (100a) on the base substrate (BS) (see fig. 15), and an orthographic projection of the second opening (H2) on the base substrate (BS) is overlapped with an orthographic projection of the second capacitor electrode (Ca) of the second pixel circuit (100a) on the base substrate (BS) (see fig. 15); and an area of the orthographic projection of the first opening (H1) on the base substrate (BS) is different from an area of the orthographic projection of the second opening (H2) on the base substrate (BS) (see fig. 10).
Allowable Subject Matter
Claims 1-3, 7, 15, 18-20, 29-31, 33 and 56 allowed.
The following is an examiner’s statement of reasons for allowance:
Regarding claim 1, the references of Prior Art of record fails to teach or suggest the combination of the limitations as set forth in claim 1, and specifically comprising the limitation directed to the first side surface of the first conductive structure comprises a protruding curved surface, and the second conductive structure covers at least a portion of the protruding curved surface; the first conductive structure comprises a connection portion located in the first depression structure and connected to the protruding curved surface; and in a direction parallel to a surface of the base substrate, the protruding curved surface protrudes towards a middle of the first depression structure relative to the connection portion, in combination with the remaining limitations. This limitation has not been found, taught, suggested or render obvious by the prior art of the record with a reasonable expectation of success, which it makes this claim allowable over the prior art.
Regarding claims 2-3, 7, 15 and 56, the claims are allowable for the reasons given in claim 1 because of their dependency status from claim 1.
The closest prior art of the record, US 20050176241 A1; cited by Applicant, discloses a protruding curved surface (205a, ¶ [24], fig. 2C) of the invention of the instant application. However, the prior art does not that the protruding curved surface (205a) protrudes towards a middle of the first depression structure (at 203) relative to the connection portion (of 205) (see fig. 2D).
Regarding claim 18, the references of Prior Art of record fails to teach or suggest the combination of the limitations as set forth in claim 18, and specifically comprising the limitation directed to the first insulating layer comprises a first depression structure and a second depression structure spaced apart from each other; the first conductive structure further comprises a second side surface located between the bottom surface and the top surface, and the first side surface is opposite to the second side surface; and at least a portion of the first conductive structure is respectively located in the first depression structure and the second depression structure, in combination with the remaining limitations. This limitation has not been found, taught, suggested or render obvious by the prior art of the record with a reasonable expectation of success, which it makes this claim allowable over the prior art.
Regarding claims 19-20, 29-31 and 33, the claims are allowable for the reasons given in claim 18 because of their dependency status from claim 18.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Claims 35-37, 40, 42 and 45 are objected to as being dependent upon a rejected base claim, but would be allowable if at least one the limitations indicated below were included in the base claim.
Regarding claim 35, the references of Prior Art of record fails to teach or suggest the combination of the limitations as set forth in claim 35, and specifically comprising the limitation directed to the second conductive layer comprises a reset voltage line, a first data line, a second data line, a first power line, and a second power line which are extended along a second direction, and the first direction is different from the second direction; each of the first pixel circuit and the second pixel circuit comprises a driving transistor and a data writing transistor; the reset voltage line is configured to provide a reset voltage for pixel electrodes or gate electrodes of the driving transistors of the first pixel circuit and the second pixel circuit; the first data line and the second data line are configured to provide data voltages for the data writing transistors of the first pixel circuit and the second pixel circuit, respectively; the first power line is configured to provide a power voltage for the driving transistor of the first pixel circuit, and the second power line is configured to provide a power voltage for the driving transistor of the second pixel circuit; the reset voltage line is between the first data line and the second data line; the first data line and the second data line are both between the first power line and the second power line; and the first power line and the second power line each have a closed hollowed-out region.
Regarding claim 36, the claim is allowable for the reasons given in claim 35 because of their dependency status from claim 35.
Regarding claim 37, the references of Prior Art of record fails to teach or suggest the combination of the limitations as set forth in claim 37, and specifically comprising the limitation directed to a connection electrode correspondingly connected to the first sub-pixel comprises a first protrusion; the display substrate further comprises a reset voltage line extended in the second direction, and the reset voltage line is connected to the first sub-pixel to provide a reset voltage; and an orthographic projection of the first protrusion on the base substrate is between an orthographic projection of the connection electrode correspondingly connected to the first sub-pixel on the base substrate and an orthographic projection of the reset voltage line on the base substrate; along the first direction, a distance of the first protrusion to the reset voltage line is smaller than a distance of the first protrusion to the connection electrode correspondingly connected to the first sub-pixel.
Regarding claims 40, 42 and 45, the claims are allowable for the reasons given in claim 37 because of their dependency status from claim 37.
Conclusion
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/JOSE M DIAZ/Examiner, Art Unit 2875
/ANNE M HINES/Primary Examiner, Art Unit 2875