Prosecution Insights
Last updated: May 29, 2026
Application No. 18/551,438

SEMICONDUCTOR PACKAGE

Final Rejection §102§112
Filed
Sep 20, 2023
Priority
Mar 30, 2021 — JP 2021-058029 +1 more
Examiner
SOWARD, IDA M
Art Unit
2898
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Sony Semiconductor Solutions Corporation
OA Round
2 (Final)
93%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 93% — above average
93%
Career Allowance Rate
1247 granted / 1338 resolved
+25.2% vs TC avg
Moderate +6% lift
Without
With
+5.5%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
24 currently pending
Career history
1370
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
48.6%
+8.6% vs TC avg
§102
28.8%
-11.2% vs TC avg
§112
21.6%
-18.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1338 resolved cases

Office Action

§102 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . This Office Action is in response to the Applicant’s amendment filed March 27, 2026. Drawings The objection to the drawings has been withdrawn due to the amendment filed. Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. The following title is suggested: SEMICONDUCTOR PACKAGE INCLUDING INNER LEAD PORTIONS WITH BULGING ISLAND PORTIONS. Claim Rejections - 35 USC § 112 (PREVIOUSLY PRESENTED) The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 1 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. In regard to claim 1 (previously claim 3), what direction is the wiring direction in? Claims 2-6 are rejected as being dependent upon rejected claim 1. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-2 and 4-6 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Crane, JR. et al. (US 2003/0162319 A1). In regard to claim 1, Crane, JR. et al. teach a semiconductor package 10, comprising: a package main body portion 210a; a bed portion 220 on a center side of the package main body portion 210a; a semiconductor chip 100 mounted on the bed portion 220; and an inner lead portion 310 that surrounds a periphery of an outer edge side of the bed portion 220, wherein the inner lead portion 310 includes a plurality of inner leads 300 configured to establish connection with the semiconductor chip 100, each inner lead 300 of the plurality of inner leads 300 has a plurality of island portions (at 300) that bulges laterally with respect to a wiring direction of the plurality of inner leads 300, and the wiring direction is along a length of the each inner lead 300 of the plurality of inner leads 300 (Figures 1, 3 and 18, pages 2-5, paragraphs [0046]-[0077]). In regard to claim 2, Crane, JR. et al. teach the plurality of inner leads 300 disposed in a spiral shape to surround a periphery of the semiconductor chip 100 (Figures 1, 3 and 18, pages 2-5, paragraphs [0046]-[0077]). In regard to claim 4, Crane, JR. et al. teach the each inner lead 300 of the plurality of inner leads 300 arranged side by side in a rectangular shape or a square shape in a plurality of concentric layers, the plurality of concentric layers is turns around four sides of outer edge sides of the bed portion 220 having a substantially rectangular shape or a square shape, and the each inner lead 300 of the plurality of inner leads 300 has a configuration in which an entire length in each winding is: over the four sides of the outer edge sides of the bed portion 220; over three sides of the outer edge sides of the bed portion 220; over two sides of the outer edge sides of the bed portion 220; or formed in units of each side of the outer edge sides of the bed portion 220 (Figures 1, 3 and 18, pages 2-5, paragraphs [0046]-[0077]). In regard to claim 5, Crane, JR. et al. teach an island portion (at 300) of the plurality of island portions (at 300) having any one of a circular shape, an elliptical shape, a rhombus shape, or a rectangular shape (Figures 1, 3 and 18, pages 2-5, paragraphs [0046]-[0077]). In regard to claim 6, Crane, JR. et al. teach the package main body portion 210a including ceramic (Figures 1, 3 and 18, pages 2-5, paragraphs [0046]-[0077]). Response to Arguments Applicant’s arguments with respect to claim(s) 1-2 and 4-6 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The following patents are cited to further show the state of the art with respect to semiconductor packages: Hamzehdoost et al. (5,491,362) Ito et al. (US 2003/0178723 A1) Ito et al. (US 2005/0189627 A1) Kikuchi et al. (US 2005/0258519 A1) Malladi et al. (5,972,736) Marcantonio (5,796,170) McMahon (US 2001/0006828 A1) Minamio et al. (US 2004/0080026 A1) Sawai et al. (5,814,883) Scherer (4,477828). THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to IDA M SOWARD whose telephone number is (571)272-1845. The examiner can normally be reached Monday through Thursday, 7am to 5:30pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Leonard Chang can be reached on 571-570-3691. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. IMSApril 22, 2026 /IDA M SOWARD/Primary Examiner, Art Unit 2898
Read full office action

Prosecution Timeline

Sep 20, 2023
Application Filed
Nov 18, 2025
Non-Final Rejection (signed) — §102, §112
Dec 29, 2025
Non-Final Rejection mailed — §102, §112
Mar 27, 2026
Response Filed
Apr 27, 2026
Final Rejection mailed — §102, §112 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
93%
Grant Probability
99%
With Interview (+5.5%)
2y 1m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 1338 resolved cases by this examiner. Grant probability derived from career allowance rate.

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