DETAILED ACTION
Status of Application
This action is a Non-Final Rejection. This action is in response to the application filed on September 29, 2023.
Claims 1-5 have been canceled.
Claims 6-10 have been added.
Claims 6-10 are pending and rejected.
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on September 29, 2023 has been considered by the examiner.
Claim Objections
Claim 1 is objected to for the following reason: The equations provided in claim 1 are blurry. A clearer copy should be provided.
Claim Interpretation
Applicant should be aware that there is claim language that does not serve to differentiate the claims from the prior art and/or provide an additional element that can be a consideration for eligibility1. See MPEP 2103(c).
Contingent Limitations
Contingent limitations are generally not given patentable weight. For example, if a claim states that a step occurs if a condition is met, the broadest reasonable interpretation of the claim does not require that the contingent step occurs because the condition may not be satisfied. System claims differ in that even if a condition that is required to perform a function is not met, the structure for performing the contingent limitation is given patentable weight. See MPEP 2111.04(II); see also Ex parte Schulhauser, Appeal 2013-007847 (PTAB April 28, 2016).
The following limitations are contingent:
10. The multilevel distributed parallel computing method for integrated circuit board simulation according to claim 9, wherein the multilevel distributed parallel computing method also comprises judging whether current results meets convergence conditions according to the convergence conditions specified by the users; If errors are large, according to the available computing resources, selecting dynamically a number of frequency points and allocating to the computing nodes; If the errors approach the convergence conditions, estimating the number of frequency points to be solved, and allocating dynamically node computing resources according to the number of frequency points and the computing nodes, so that multiple computing nodes can solve the system matrix of a certain frequency point simultaneously. (If the errors are not large, the “selecting” does not occur. Similarly, if the errors do not approach the convergence conditions, the “estimating” does not occur.)
Intended Use
Intended use language is generally not given patentable weight. See MPEP 2114(II) ("A claim containing a 'recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus’ if the prior art apparatus teaches all the structural limitations of the claim. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987).”); see also MPEP 2103(C). Examples of claim limitations that are often found to precede intended use include “adapted to,” “capable of,” “sufficient to,” “whereby,” and “for.”
The following limitations include intended use limitations:
10. The multilevel distributed parallel computing method for integrated circuit board simulation according to claim 9, wherein the multilevel distributed parallel computing method also comprises judging whether current results meets convergence conditions according to the convergence conditions specified by the users; If errors are large, according to the available computing resources, selecting dynamically a number of frequency points and allocating to the computing nodes; If the errors approach the convergence conditions, estimating the number of frequency points to be solved, and allocating dynamically node computing resources according to the number of frequency points and the computing nodes, so that multiple computing nodes can solve the system matrix of a certain frequency point simultaneously.
Claim Rejections - 35 USC § 112(a)
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 6-10 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. This rejection is based on the lack of written description for the claims, which are indefinite, as described below. The scope of claim terms, limitations, and the claims as a whole cannot be determined and the Specification does not provide sufficient written description to properly interpret the claims.
Claim Rejections - 35 USC § 112(b)
The following is a quotation 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 6-10 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention.
The claims are generally narrative and indefinite, failing to conform with current U.S. practice. They appear to be a literal translation into English from a foreign document and are replete with grammatical and idiomatic errors. Therefore, the claims cannot be properly construed. Each of the method claims should recite method steps or further narrow a previously recited method step. Each claim term should be either defined in the Specification or understood by one having ordinary skill in the art. The following are examples of indefiniteness issues found in the claims:
Claim 6 recites “in the step (S300), calculating and solving comprises specifically solving distribution of electric fields and magnetic fields in the solution area at each of the computing nodes by a finite element method and extracting performance parameters of a circuit according to distribution of electromagnetic fields in a solution area for subsequent simulations.” There is a lack of antecedent basis for “the computing nodes.”
Claim 6 recites “by introducing a barycentric coordinate system and taking a tetrahedron unit year as an example, four vertices of each tetrahedron can be expressed as….” The phrase "as an example" renders the claim indefinite because it is unclear whether the limitation(s) following the phrase are part of the claimed invention. See MPEP § 2173.05(d). It is also unclear whether “can be’ is intended to limit the scope of the claim.
Claim 6 recites “among which,
PNG
media_image1.png
200
400
media_image1.png
Greyscale
represents a length of an ith edge; a unit vector e1 is defined as a unit vector pointing from a node 1 to a node 2, and a gradient relative to gravity center coordinates can be described by following formulas….” It is unclear whether “can be” is intended to limit the scope of the claim.
Claim 6 recites the following limitations:
among which,
PNG
media_image1.png
200
400
media_image1.png
Greyscale
represents a length of an ith edge; a unit vector e1 is defined as a unit vector pointing from a node 1 to a node 2, and a gradient relative to gravity center coordinates can be described by following formulas
PNG
media_image2.png
33
360
media_image2.png
Greyscale
;
among which,
PNG
media_image3.png
200
400
media_image3.png
Greyscale
represents a length of an ith edge; a unit vector e1 is defined as a unit vector pointing from a node 1 to a node 2, and a gradient relative to gravity center coordinates is described by following formulas
PNG
media_image4.png
200
400
media_image4.png
Greyscale
;
These limitations are the same except the first one recites “can be” and the second one instead recites “is.”
Claim 6 recites “wherein an integral region in the equation is divided into several sub-regions Ωn, and a matrix equation is obtainable by using the finite element analysis method; a left term of the matrix equation comprises two terms.” It is unclear what equation is being referenced.
Claim 6 recites “according to the above equations, a sparse matrix equation Ax=b is obtained; the matrix equation is solved by multi frontal algorithm; by running solution resources used in this step in a local computer or multi-computer parallel, which is dynamically adjusted according to fitting results.” It is unclear which “above equations” are being referenced. Additionally, it is unclear what “is dynamically adjusted according to fitting results.”
Claim 10 recites “If errors are large, according to the available computing resources, selecting dynamically a number of frequency points and allocating to the computing nodes.” The term “large” is a relative term which renders the claim indefinite. The term “large” is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention.
Both individual limitations and the claims as a whole are indefinite. For purposes of examination, the claims were interpreted as best understood.
Claim Rejections - 35 USC § 101
35 U.S.C. § 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 6-10 are rejected under 35 U.S.C. § 101 as being directed to non-statutory subject matter because the claimed invention is directed to an abstract idea without significantly more.
Step 1: Does the Claim Fall within a Statutory Category? (see MPEP 2106.03)
Yes, with respect to claims 6-10, which recite a method and, therefore, are directed to the statutory class of process.
Step 2A, Prong One: Is a Judicial Exception Recited? (see MPEP 2106.04(a))
The following claims identify the limitations that recite the abstract idea in regular text and that recite additional elements in bold:
6. A multilevel distributed parallel computing method for integrated circuit board simulation, wherein the method comprises following steps:
(S100), calculating a number of nodes;
(S200), allocating tasks;
(S300), calculating and solving; and
(S400), judging convergence;
in the step (S300), calculating and solving comprises specifically solving distribution of electric fields and magnetic fields in the solution area at each of the computing nodes by a finite element method and extracting performance parameters of a circuit according to distribution of electromagnetic fields in a solution area for subsequent simulations;
wherein in the step (S300) the finite element method is used, specifically a finite element wave equation as shown here:
PNG
media_image5.png
200
400
media_image5.png
Greyscale
wherein the distribution in the solution area in step S300 comprises grid division of the solution area; the grid division of the solution area comprises tetrahedron division; and the tetrahedron division is as follows:
by introducing a barycentric coordinate system and taking a tetrahedron unit year as an example, four vertices of each tetrahedron can be expressed as:
PNG
media_image6.png
200
400
media_image6.png
Greyscale
; the tetrahedron comprises six edges with serial numbers 1, 2, 3, 4, 5 and 6, and the edges are placed as a vector basis function:
PNG
media_image7.png
200
400
media_image7.png
Greyscale
;
among which,
PNG
media_image1.png
200
400
media_image1.png
Greyscale
represents a length of an ith edge; a unit vector e1 is defined as a unit vector pointing from a node 1 to a node 2, and a gradient relative to gravity center coordinates can be described by following formulas
PNG
media_image2.png
33
360
media_image2.png
Greyscale
; among which,
PNG
media_image3.png
200
400
media_image3.png
Greyscale
represents a length of an ith edge; a unit vector e1 is defined as a unit vector pointing from a node 1 to a node 2, and a gradient relative to gravity center coordinates is described by following formulas
PNG
media_image4.png
200
400
media_image4.png
Greyscale
;
wherein an integral region in the equation is divided into several sub-regions Ωn, and a matrix equation is obtainable by using the finite element analysis method; a left term of the matrix equation comprises two terms:
PNG
media_image8.png
200
400
media_image8.png
Greyscale
a right term of the matrix equation is as follows:
PNG
media_image9.png
200
400
media_image9.png
Greyscale
according to the above equations, a sparse matrix equation Ax=b is obtained; the matrix equation is solved by multi frontal algorithm; by running solution resources used in this step in a local computer or multi-computer parallel, which is dynamically adjusted according to fitting results;
wherein the multilevel distributed parallel computing method also comprises recovering the solution results and fitting frequency response with a formula
PNG
media_image10.png
200
400
media_image10.png
Greyscale
, where cn is a residue term and an is a pole;
a fitting process comprises multiplying a left end and a right end of the defined frequency response by an unknown function
PNG
media_image11.png
48
213
media_image11.png
Greyscale
simultaneously, and an overdetermined matrix equation about unknown quantities cn, d, h, and
PNG
media_image12.png
23
24
media_image12.png
Greyscale
is obtained by substituting a few frequency points into the unknown function:
PNG
media_image13.png
67
371
media_image13.png
Greyscale
an unknown quantity obtained by solving the unknown function is used to describe a formula of the frequency response:
PNG
media_image14.png
200
400
media_image14.png
Greyscale
using a solution of σ (s)=0 as a new pole, a new overdetermined matrix equation can be generated to solve unknown quantities cn, d, and h.
7. The multilevel distributed parallel computing method for integrated circuit board simulation according to claim 6, wherein in step (S100) calculating the number of nodes comprises specifically determining the number of nodes opened on corresponding computing nodes by taking user parameters and mesh generation results as inputs and estimating memory consumption and user control.
8. The multilevel distributed parallel computing method for integrated circuit board simulation according to claim 6, wherein in the step (S200) allocating tasks comprises specifically, selecting appropriate simulation frequency points from simulation segments as required by users according to the number of nodes determined in the step (S100) and distributing to the computing nodes.
9. The multilevel distributed parallel computing method for integrated circuit board simulation according to claim 6, wherein in the step (S400), the convergence judgment comprises specifically judging whether current results meet convergence conditions according to convergence conditions specified by the users.
10. The multilevel distributed parallel computing method for integrated circuit board simulation according to claim 9, wherein the multilevel distributed parallel computing method also comprises judging whether current results meets convergence conditions according to the convergence conditions specified by the users; If errors are large, according to the available computing resources, selecting dynamically a number of frequency points and allocating to the computing nodes; If the errors approach the convergence conditions, estimating the number of frequency points to be solved, and allocating dynamically node computing resources according to the number of frequency points and the computing nodes, so that multiple computing nodes can solve the system matrix of a certain frequency point simultaneously.
Yes. But for the recited additional elements as shown above in bold, the remaining limitations of the claims recite mathematical concepts. The claims are directed to solving equations for related to computing nodes. The claims recite mathematical concepts such as mathematical formulas or equations and mathematical calculations. Thus, the claims recite an abstract idea.
Step 2A, Prong Two: Is the Abstract Idea Integrated into a Practical Application? (see MPEP 2106.04(d))
No. The claims as a whole merely use a computer as a tool to perform the abstract idea. The computing components (i.e., additional elements that are in bold above) are recited at a high level of generality and are merely invoked as a tool to implement the steps. For example, if a computer is used to implement the claimed process, only a programmed general purpose computing device is needed. Simply implementing the abstract idea on a generic computer is not a practical application of the abstract idea. Furthermore, the abstract idea is merely being linked to a particular technological environment, i.e., an integrated circuit environment. Employing well known technology within an integrated circuit environment to execute the abstract idea, even when limiting the use of the abstract idea to this environment, does not integrate the exception into a practical application or add significantly more. Additionally, there is no improvement to the functioning of a computer or technology. Therefore, the abstract idea is not integrated into a practical application.
Step 2B: Does the Claim Provide an Inventive Concept? (see MPEP 2106.05)
No. As discussed with respect to Step 2A, Prong 2, the additional elements in the claims, both individually and in combination, amount to no more than tools to perform the abstract idea. Merely performing the abstract idea using a computer cannot provide an inventive concept. Therefore, the claims do not provide an inventive concept.
As such, the claims are not patent eligible.
35 USC § 102 and 103
As best understood, the claims were found to be novel and non-obvious in light of the prior art.
Relevant Prior Art
The following references are relevant to Applicant’s invention:
Lee, U.S. Patent Number 6,154,716. This reference teaches a system for simulating electronic circuits. Specifically, this reference states, at column 1, lines 9-20, “The complexity of modem integrated circuits and the high cost of fabricating prototypes has led to the development of a class of computer programs that simulate the operation of a circuit. Simulation tools for analog and microwave circuits that are accurate and reliable are required to meet design specifications. Simulators are often helpful for determining steady state properties of circuits such as bias voltages to be applied to the various components. Thus, by the use of a simulator it is possible to verify the proper operation of a circuit before resources are committed to the fabrication of prototypes.”
Phillips et al., U.S. Patent Number 7,428,477 B1. This reference teaches simulation electrical circuits.
Hobro, U.S. Patent Application Publication Number 2018/0217873 A1. This reference teaches domain decomposition in parallel numerical computer modelling.
Harkness, U.S. Patent Application Publication Number 2015/0178423 A1. This reference teaches a finite element simulation.
Email Communications
Per MPEP 502.03, Applicant may authorize email communications by filing Form PTO/SB/439, available at https://www.uspto.gov/sites/default/files/documents/sb0439.pdf, via the USPTO patent electronic filing system.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ELIZABETH H ROSEN whose telephone number is (571) 270-1850 and email address is elizabeth.rosen@uspto.gov. The examiner can normally be reached Monday - Friday, 10 AM ET - 7 PM ET.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Michael Anderson, can be reached at 571-270-0508. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/ELIZABETH H ROSEN/Primary Examiner, 3693
1 See MPEP 2106.04(d)(2) (“Examiners should keep in mind that in order to qualify as a "treatment" or "prophylaxis" limitation for purposes of this consideration, the claim limitation in question must affirmatively recite an action that effects a particular treatment or prophylaxis for a disease or medical condition. An example of such a limitation is a step of "administering amazonic acid to a patient" or a step of "administering a course of plasmapheresis to a patient." If the limitation does not actually provide a treatment or prophylaxis, e.g., it is merely an intended use of the claimed invention or a field of use limitation, then it cannot integrate a judicial exception under the "treatment or prophylaxis" consideration. For example, a step of "prescribing a topical steroid to a patient with eczema" is not a positive limitation because it does not require that the steroid actually be used by or on the patient, and a recitation that a claimed product is a "pharmaceutical composition" or that a "feed dispenser is operable to dispense a mineral supplement" are not affirmative limitations because they are merely indicating how the claimed invention might be used.”)
Prosecution Insights