DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
The following is a final office action in response to communications received 10/15/2025. Claims 1, 2, 4, 7, 8, 13-20 have been amended. Therefore, claims 1-20 are pending and addressed below.
Claim Objections
Claim 14 is objected to because of the following informalities: Amended claim 14 recites being dependent on claim 16. This dependency is not proper as the claim should depend on the preceding claim. Appropriate correction is required.
Allowable Subject Matter
The following is an examiner’s statement of reasons for allowance:
The prior art of record do not teach or suggest … decrypt the encrypted ROM datum to produce a decrypted ROM datum using the cryptographic circuitry that performs the decryption operation based on the ROM address corresponding to the encrypted ROM datum; and forward the decrypted ROM datum to an interconnect, the cryptographic circuitry comprising: keystream circuitry configured to produce multiple keys respectively based on the multiple ROM addresses, the multiple keys including at least one key that is produced based on the ROM address corresponding to the encrypted ROM datum: and data combination circuitry coupled to the keystream circuitry, the data combination circuitry configured to produce the decrypted ROM datum based on the encrypted ROM datum and the at least one key…in combination and relationship with the rest of claim as being claimed in claim 1.
Therefore, claims 2-12 are allowable as being dependent upon independent claim 1.
Claim 14 is also objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 13, 15-20 are rejected under 35 U.S.C. 103 as being unpatentable over Chhabra et al (Pub. No. US 2019/0042476) in view of Yuchen (CN 101582109) (from Applicant’s IDS).
As per claim 13, Chhabra discloses a method for secure read-only memory (ROM), the method comprising: obtaining a ROM read request including a ROM address relating to a ROM array that includes encrypted ROM data stored at multiple ROM addresses (see par. 55, 65-66); reading an encrypted ROM datum from the ROM array using the ROM address corresponding to the encrypted ROM datum; after the reading of the encrypted ROM datum, decrypting the encrypted ROM datum to produce a decrypted ROM datum using the encrypted ROM datum and the at least one key (…the MAC manager may detect a read operation corresponding to the data stored in the system memory…for example, the MAC manager may detect an attempt to execute an instruction based on the encrypted data stored in system memory…see par. 65…the MAC may be associated with target data to be stored via the write operation, and may be based at least in part on (a) a VM-specific cryptographic key and (b) a physical memory address in which the target data is stored via the write operation…see par. 101). Chhabra does not explicitly disclose generating at least one key based on the ROM address; decrypting the encrypted ROM datum…using the at least one key; and forwarding the decrypted ROM datum to an interconnect. However Yuchen discloses generating at least one key based on the ROM address (…after the first receiving module obtains the location information and the second receiving module obtains the decrypted master key, the key generation module performs an XOR operation on the decrypted master key and the location information…obtain the session key corresponding to the location information…see par. 27, 31); decrypting the encrypted ROM datum…using the at least one key (see par. 40-41); and forwarding the decrypted ROM datum to an interconnect (…use the session key corresponding to the location information to decrypted the read data and transmit the decrypted data to interface chip…see par. 46). Therefore one ordinary skill in the art would have found it obvious before the effective filling date of the claimed invention to use Yuchen in Chhabra for including the above limitations because one ordinary skill in the art would recognize it would further provide higher security for data in the SSD…see Yuchen, par. 8.
As per claim 15, the combination of Chhabra and Yuchen discloses wherein the decrypting comprises: performing at least one logical operation that includes the at least one key and the encrypted ROM datum to produce the decrypted ROM datum (Yuchen: see par. 31). The motivation for claim 15 is the same motivation as in claim 13 above.
As per claim 16, the combination of Chhabra and Yuchen discloses wherein the decrypting comprises manipulating, prior to the performing of the at least one logical operation, bits of the encrypted ROM datum to produce a manipulated encrypted ROM; and the performing includes performing the at least one logical operation using the at least one key and the manipulated encrypted ROM datum to produce the decrypted ROM datum (Chhabra: see par. 52-54).
As per claim 17, Chhabra discloses an integrated circuit including security circuitry for secure read- only memory (ROM), the security circuitry comprising: a ROM array including encrypted ROM data at multiple ROM addresses (…the memory device may comprise random access memory (RAM) and/or read-only memory (ROM) in a fixed or removable format. Memory comprising RAM may include volatile memory configured to hold information during the operation of host computing device such as, for example, static RAM (SRAM) or Dynamic RAM (DRAM). Memory comprising ROM may include non-volatile (NV) memory circuitry configured based on BIOS, UEFI, etc. to provide instructions when host computing device is activated, programmable memories such as electronic programmable ROMs (EPROMS), Flash, etc…see par. 54-55); and a ROM controller coupled to the ROM array, the ROM controller configured to cryptographically tie a respective ROM address of the multiple ROM addresses to a respective decrypted ROM datum corresponding to a respective encrypted ROM datum of the encrypted ROM data (see par. 60, 69, 101) by:
obtaining a ROM read request including a ROM address (see par. 60);
reading an encrypted ROM datum of the encrypted ROM data from the ROM array using the ROM address that corresponds to the encrypted ROM datum; after the reading of the encrypted ROM datum, decrypting the encrypted ROM datum to produce a decrypted ROM datum using the encrypted ROM datum and the at least one key (…the MAC manager may detect a read operation corresponding to the data stored in the system memory…for example, the MAC manager may detect an attempt to execute an instruction based on the encrypted data stored in system memory…see par. 65…the MAC may be associated with target data to be stored via the write operation, and may be based at least in part on (a) a VM-specific cryptographic key and (b) a physical memory address in which the target data is stored via the write operation…see par. 101). Chhabra does not explicitly disclose generating at least one key based on the ROM address; decrypting the encrypted ROM datum…using the at least one key; and forwarding the decrypted ROM datum to an interconnect. However Yuchen discloses generating at least one key based on the ROM address (…after the first receiving module obtains the location information and the second receiving module obtains the decrypted master key, the key generation module performs an XOR operation on the decrypted master key and the location information…obtain the session key corresponding to the location information…see par. 27, 31); decrypting the encrypted ROM datum…using the at least one key (see par. 40-41); and forwarding the decrypted ROM datum to an interconnect (…use the session key corresponding to the location information to decrypted the read data and transmit the decrypted data to interface chip…see par. 46). Therefore one ordinary skill in the art would have found it obvious before the effective filling date of the claimed invention to use Yuchen in Chhabra for including the above limitations because one ordinary skill in the art would recognize it would further provide higher security for data in the SSD…see Yuchen, par. 8.
As per claim 18, the combination of Chhabra and Yuchen discloses wherein: the ROM controller comprises cryptographic circuitry configured to perform the decrypting of the encrypted ROM datum using the encrypted ROM datum and the at least one key that is generated based on the ROM address (…Chhabra: see par. 52-54, 60, 69).
As per claim 19, the combination of Chhabra and Yuchen discloses wherein the cryptographic circuitry is configured to: perform the decrypting of the encrypted ROM datum to produce the decrypted ROM datum using at least one logical operation that includes the at least one key and the encrypted ROM datum (Yuchen: see par. 31). The motivation for claim 19 is the same motivation as in claim 17 above.
As per claim 20, the combination of Chhabra and Yuchen discloses wherein the cryptographic circuitry is configured to: produce the decrypted ROM datum using the at least one key by applying the at least one key to a version of the encrypted ROM datum, the version corresponding to a manipulated version of the encrypted ROM datum that is stored in the ROM array (Yuchen: see par. 49-51). The motivation for claim 20 is the same motivation as in claim 17 above.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure (see PTO-form 892).
The following Patents and Papers are cited to further show the state of the art at the time of Applicant’s invention with respect to an integrated circuit that includes security circuitry in which ROM security can be implemented.
Kloth (Pub. No. US 2021/0312055); “Security Booting a Processing Chip”;
-Teaches autonomous hardware used as part of a manufacturing time procedure associates a flash chip with a particular processing chip by encrypting data stored in an external memory with a key unique to the particular processing chip, and writing the encrypted data to the flash chip…see par. 61.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to GHAZAL B SHEHNI whose telephone number is (571)270-7479. The examiner can normally be reached Mon-Fri 9am-5pm PCT.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Philip Chea can be reached at 5712723951. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/GHAZAL B SHEHNI/Primary Examiner, Art Unit 2499