DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
The claims are replete with errors. The claims should be revised carefully to correct the numerous errors. Examples of some unclear, inexact, or verbose limitations in the claims are:
Claim 1, lines 2, recites “a first first electrically-conductive region.” In lines 5 and 8, respectively, “a second first electrically-conductive region” and “a third first electrically-conductive region” are recited. The double ordinal numbers in these recitations do not make sense. For purposes of a prior art search the Examiner is interpreting the shared “first electrically-conductive region” of the recitations to mean - - electrically-conductive region of a first type - - .
Claim 1, lines 5-7, recites “a second first electrically-conductive region provided at the interface of the first surface and around the first first electrically-conductive region and coupled to a second electrode.” The run-on nature of this clause including two “and”s makes the relationship of elements unclear. For purposes of a prior art search, the Examiner is interpreting the “second first electrically-conductive region” to be further limited three times in this clause 1) provided at the interface of the first surface, 2) provided around the first first electrically-conductive region, and 3) coupled to a second electrode. Similar issue present in at least claim 1, lines 8-10.
Claim 4 recites “the gate electrode and the wiring layer are electrically coupled to each other.” However these elements were previously provided in alternative language in claim 3, making it unclear whether the limitation of claim 4 is required under the condition of only one being used to form the electrically-conductive film. Similar issue present in claims 5-10.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1, 17, and 20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 39-40 of U.S. Patent No. 12,543,389. Although the claims at issue are not identical, they are not patentably distinct from each other because claim 39-40 of U.S. Patent No. 12,543,389 merely includes additional elements to instant claim 1.
Regarding claims 17 and 20, claims 39-40 of U.S. Patent No. 12,543,389 do not include the detector element to be used in array of elements for an x-ray imager; however, the Examiner is taking Official Notice that it is well known in the art to use a semiconductor detector element as the detector elements in an x-ray array imager. Therefore, it would have been obvious to one of ordinary skill at the time of the invention to have the light-receiving element disclosed in claims 39-40 of U.S. Patent No. 12,543,389 be used as the elements in an x-ray imaging array for the expected result of detecting photons.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-10 is/are rejected under 35 U.S.C. 102(a) as being anticipated by Segal et al. (A New Structure for controlling dark current due to surface generation in drift detectors,” Nuclear Instruments and Methods in Physics Research A, Vol. 414, 1998, p.p. 307-316).
Regarding claims 1-2, Segal teaches a light-receiving element (Abstract) comprising:
a semiconductor substrate (n- bulk silicon; Fig. 7) including a photoelectric conversion region;
a first first electrically-conductive region (inner p-ring; Fig. 7) provided at an interface of a first surface of the semiconductor substrate and coupled to a first electrode (Fig. 1);
a second first electrically-conductive region (outer p-ring; Fig. 7) provided at the interface of the first surface and around the first first electrically-conductive region and coupled to a second electrode (Fig. 1);
a third first electrically-conductive region (floating p-rings; Fig. 7) provided at the interface of the first surface and around the second first electrically-conductive region and being in an electrically floating state; and
an electrically-conductive film (n-type polysilicon and p-type polysilicon; Fig. 7) provided above the first surface at least between the first first electrically-conductive region and the second first electrically-conductive region.
Regarding claims 3-10, Segal teaches an insulating layer (deposited oxide layer and thermally-grown oxide layer; Fig. 7) provided on a side of the first surface of the semiconductor substrate, wherein the electrically-conductive film is formed by a wiring layer provided in the insulating layer (Fig. 7).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 16-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over by Segal et al. (A New Structure for controlling dark current due to surface generation in drift detectors,” Nuclear Instruments and Methods in Physics Research A, Vol. 414, 1998, p.p. 307-316).
Regarding claim 16, Segal does not teach the semiconductor substrate is configured by an intrinsic semiconductor. However, the Examiner is taking Official Notice that it is well known in the art to have the material of a semiconductor substrate be an intrinsic semiconductor. Therefore, it would have been obvious to one of ordinary skill at the time of the invention to have the semiconductor substrate be configured by an intrinsic semiconductor, since it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416.
Regarding claims 17 and 20, Segal teaches an x-ray light-receiving element (Abstract) comprising:
a semiconductor substrate (n- bulk silicon; Fig. 7) including a photoelectric conversion region;
a first first electrically-conductive region (inner p-ring; Fig. 7) provided at an interface of a first surface of the semiconductor substrate and coupled to a first electrode (Fig. 1);
a second first electrically-conductive region (outer p-ring; Fig. 7) provided at the interface of the first surface and around the first first electrically-conductive region and coupled to a second electrode (Fig. 1);
a third first electrically-conductive region (floating p-rings; Fig. 7) provided at the interface of the first surface and around the second first electrically-conductive region and being in an electrically floating state; and
an electrically-conductive film (n-type polysilicon and p-type polysilicon; Fig. 7) provided above the first surface at least between the first first electrically-conductive region and the second first electrically-conductive region.
Segal does not explicitly teach the x-ray light-receiving element to be one of a plurality of light-receiving elements. However, the Examiner is taking Official Notice that it is well known in the art to have a plurality light-receiving elements/sensors for the benefit of increasing the amount of information that can be obtained at the same time and imaging a scene. Therefore, it would have been obvious to one of ordinary skill at the time of the invention to have the x-ray light-receiving element to be one of a plurality of light-receiving elements for the benefit of increasing the amount of information that can be obtained at the same time and imaging a scene.
Regarding claim 18, Segal does not explicitly teach the imager configuration of a pixel region in which a plurality of pixels are arranged; and a peripheral region provided around the pixel region, wherein the semiconductor substrate includes a depletion region in the pixel region and includes a neutral region in the peripheral region. However, the Examiner is taking Official Notice that the imager configuration of a pixel region in which a plurality of pixels are arranged; and a peripheral region provided around the pixel region, wherein the semiconductor substrate includes a depletion region in the pixel region and includes a neutral region in the peripheral region are well known imager configurations. Therefore, it would have been obvious to one of ordinary skill at the time of the invention to have the imager configuration of a pixel region in which a plurality of pixels are arranged; and a peripheral region provided around the pixel region, wherein the semiconductor substrate includes a depletion region in the pixel region and includes a neutral region in the peripheral region to achieve the predictable result of providing an imager and imaging a scene.
Regarding claim 19, Segal, as modified above, further teaches the light-receiving elements are provided for the respective pixels, and the light-receiving element comprises a p-n junction light-receiving element that applies a reverse bias between the first surface of the semiconductor substrate and a second surface opposed to the first surface (Fig.1).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Sato et al. (US 2013/0270666) teaches a photodiode array (for example Figs. 1-2, 6, 9) including a first, second, and third semiconductor layers (1, 2, and 3) and ring-shaped electrodes (5).
Claims 11-15 have been rejected under 35 USC 112b, as explained above, but have not been rejected under 35 USC 102 nor 103.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Carolyn Fin whose telephone number is (571)270-1286. The examiner can normally be reached Monday, Wednesday, and Thursday.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Uzma Alam can be reached at 571-272-3995. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/CAROLYN FIN/Examiner, Art Unit 2884
Prosecution Insights