DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-20 are pending in this application. Claims 1 and 11 are currently amended. Claims 2-10 and 12-20 were previously presented.
Response to Arguments
Applicant's arguments filed 04/13/2026 have been fully considered but they are not persuasive.
On pages 7-8 of Remarks filed 04/13/2026, applicant argues
As shown and described, Kumar discloses an "input connector 302" that receives an "input power signal" that is received at "fuse 306" and provides the supply to "output connector 304." (Kumar at 0051; Fig. 3.) The Action takes the position that the ground line is the "second power line" of claim 1. However, the connection wire required to close a complete circuit is a standard practice in circuit diagrams and does not disclose a "second power line."
Examiner disagrees respectfully. The ground line is commonly considered as return power line in the art. Such a situation is shown in fig.1 of instant application. Additionally, prior art Kumar (US 20190056708 A1) recites in specification paragraph [0051], “Each connector 302 and 304 includes any suitable structure configured to receive or provide an electrical signal, such as a 24 VDC signal.” This further supports that the ground line can be considered as the “second power line”.
On page 8 of Remarks filed 04/13/2026, applicant argues
However, if the "second power line" is the ground line in FIG. 3 (which it cannot be), the diodes are not connected to the ground line. Thus, Kumar does not disclose every feature of claim 1.
Examiner disagrees respectfully. The anodes of diodes 334 is clearly connected to ground in fig.3 of prior art Kumar (US 20190056708 A1). The cathodes of diodes 336 is clearly connected to first power line between 302 and 304. Claim 1 lines 10-11 recites “a voltage clamping unit connected between the first power line, the second power line, the first signal line and the second signal line”. These conditions are satisfied by the connection of diodes 334 and 336 as shown in fig.3 of Kumar. Additionally, diodes 334 is indirectly connected to first power line via diodes 336; and diodes 336 are indirectly connected to second power line via negative signal input 314 or voltage limiting circuit 310. Hence applicant’s arguments are moot.
Similar response is applicable to claims 2-20.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-4 and 6-9 are rejected under 35 U.S.C. 102(a)(1) and 102(a)(2) as being anticipated by Kumar (US 20190056708 A1).
Regarding claim 1, Kumar teaches an intrinsically safe circuit ([0002], disclosure relates to an intrinsic safety (IS) barrier with an associated energy limiting apparatus) for a load ([0054], use in a HazLoc area), comprising:
energy input ports ([0051], connector 302 and 304 includes any suitable structure configured to receive or provide an electrical signal) and energy output ports ([0051], connector 302 and 304 includes any suitable structure configured to receive or provide an electrical signal);
a first power line (e.g. line connected between 302 and 304 via 306, fig.3) and a second power line (e.g. line connected to ground between 302 and 304, fig.3) connected in parallel between the energy input ports and energy output ports (e.g. parallel connection of line between 302 and 304 via 306, and ground connection between 302 and 304, fig.3) and configured to deliver energy from the energy input ports to the energy output ports ([0051], receive an input power signal … provide a voltage-clamped output power);
signal input ports (e.g. ports at second input connector 314, fig.3) and signal output ports (e.g. ports at output connector 316, fig.3);
a first signal line (e.g. positive line connected to second input connector 314, fig.3) and a second signal line (e.g. negative line connected to second input connector 314, fig.3) connected in parallel between the signal input ports and signal output ports (e.g. connection of lines from 314 to 316 are parallel, fig.3) and configured to deliver signals between the signal input ports and signal output ports ([0055], connector 314 and 316 includes any suitable structure configured to receive or provide a data signal);
a voltage clamping unit (e.g. diodes 334-336, fig.6) connected between the first power line, the second power line, the first signal line and the second signal line (e.g. connection of diodes 334-336 to signal and power lines, fig.3) and configured to clamp a voltage between any two of the first power line, the second power line, the first signal line and the second signal line ([0060], allows the same voltage limiting circuit 310 to clamp the overvoltage in the power and signal paths); and
a current limiting unit (e.g. fuses 306 and 318, fig.3) connected in at least three of the first power line (e.g. fuse 306, fig.3), the first signal line ([0056], input data signal pass through the input connector 314 and are received at respective fuses 318) and the second signal line ([0056], input data signal pass through the input connector 314 and are received at respective fuses 318), and configured to limit currents flowing through any two of the first power line ([0052], he fuse 306 and to limit the current passing through the control circuit 308), the first signal line ([0056], break in order to prevent excessive current) and the second signal line ([0056], break in order to prevent excessive current).
Regarding claim 2, Kumar teaches the intrinsically safe circuit according to claim 1, further comprising: a voltage converter (i.e. isolated power supply 312. Fig.3) connected between the energy input ports and the first and second power lines ([0054], positioned between (i) the in-rush control circuit 308 and the voltage limiting circuit 310 and (ii) the output connector 304) and configured to adjust a voltage to be output by the intrinsically safe circuit ([0054], provides a voltage-clamped output power rail).
Regarding claim 3, Kumar teaches the intrinsically safe circuit according to claim 2, wherein the voltage converter is a step-down converter ([0054], isolated power supply 312 includes a transformer. In particular embodiments, the isolated power supply 312 is designed to comply with an IEC 60079-xx standard).
Regarding claim 4, Kumar teaches the intrinsically safe circuit according to claim 1, wherein the voltage clamping unit comprises a Zener diode ([0065], Any suitable Zener diodes 410 could be used here).
Regarding claim 6, Kumar teaches the intrinsically safe circuit according to claim 1, wherein the current limiting unit comprises a fuse (e.g. fuse 306, fuses 318, fig.3).
Regarding claim 7, Kumar teaches the intrinsically safe circuit according to claim 1, further comprising: a power line surge unit (e.g. voltage limiting circuit 310, fig.3) connected between a power supply and the energy input ports (e.g. 310 is coupled between power input and isolated power supply, fig.3) and configured to provide a surge protection for the first and second power lines ([0060], clamp the overvoltage in the power and signal paths).
Regarding claim 8, Kumar teaches the intrinsically safe circuit according to claim 1, further comprising: a signal line surge unit (e.g. unit comprising protection control circuit 320 in combination with 334, fig.3) connected between a signal source and the signal input ports (e.g. 320 is connected between signal inputs and ports at 314, fig.3) and configured to provide a surge protection for the first and second signal lines ([0060], the same voltage limiting circuit 310 to clamp the overvoltage in the power and signal paths).
Regarding claim 9, Kumar teaches the intrinsically safe circuit according to claim 1, further comprising: a communication unit (e.g. functional circuit 420, fig.4) connected to the energy output ports and the signal output ports (e.g. connection to signal and power output ports as seen in fig.4) and configured to exchange signals between the load and a signal source ([0070], The functional circuit 420 processes the incoming data signal from the signal isolator 418 into a form suitable for transmission out of the intrinsic safety barrier 200).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Kumar (US 20190056708 A1), and further in view of Kitchener (US 20100195255 A1).
Regarding claim 10, Kumar (US 20190056708 A1) teaches the intrinsically safe circuit according to claim 9.
Kumar does not teach, wherein the communication unit comprises a Modbus device.
Kitchener teaches in a similar field of endeavor of intrinsically safe communications circuit, wherein a communication unit comprises a Modbus device ([0018], [0018] The electrical circuit can be adapted to carry any type of analogue or digital signal, for example Ethernet, Power over Ethernet (PoE), Fieldbus, HART or Modbus and so on).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have optionally included the communication unit comprises a Modbus device in Kumar, as taught by Kitchener, as it provides the advantage of speed, scalability and IT integration for the communication unit of intrinsically safe circuit.
Claims 11-15 and 17-20 are rejected under 35 U.S.C. 103 as being unpatentable over Kumar (US 20190056708 A1), and further in view of Nilsson (WO 2020126003 A1).
Regarding claim 11, Kumar teaches a sensor circuit ([0021], the system 100 includes one or more sensors) comprising:
an intrinsically safe circuit according to claim 1,
Kumar does not teach, a flexible probe configured to measure a height of a liquid level; and
the intrinsically safe circuit being electrically connected to the flexible probe and configured to supply energy to the flexible probe.
Nilsson teaches in a similar field of endeavor of intrinsically safe connection, a flexible probe (i.e. probe 8, figs.1-4) configured to measure a height of a liquid level (page 2, Radar level gauge (RLG) systems are in wide use for determining the filling level of a product contained in a tank); and
the intrinsically safe circuit being electrically connected to the flexible probe and configured to supply energy to the flexible probe (page 1, radar level gauge having an explosion proof (e.g. Ex-d) compartment with an intrinsically safe (e.g. Ex-ia) connection).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have optionally included the flexible probe configured to measure a height of a liquid level; and the intrinsically safe circuit being electrically connected to the flexible probe and configured to supply energy to the flexible probe in Kumar, as taught by Nilsson, as it provides the advantage of simple design, reduced energy consumption, while maintaining intrinsically safe requirements.
Regarding claim 12, Kumar and Nilsson teach the sensor circuit according to claim 11, wherein the flexible probe comprises a housing made of thermoplastic construction or flexible membranes (Nilsson, page 6, The probe can be e.g. a coaxial wire probe, a twin wire probe, or a single wire probe).
Regarding claim 13, it is rejected for the same reasons as stated above for claim 2.
Regarding claim 14, it is rejected for the same reasons as stated above for claim 3.
Regarding claim 15, it is rejected for the same reasons as stated above for claim 4.
Regarding claim 17, it is rejected for the same reasons as stated above for claim 6.
Regarding claim 18, it is rejected for the same reasons as stated above for claim 7.
Regarding claim 19, it is rejected for the same reasons as stated above for claim 8.
Regarding claim 20, it is rejected for the same reasons as stated above for claim 9.
Allowable Subject Matter
Claims 5 and 16 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 5, Kumar (US 20190056708 A1) teaches the intrinsically safe circuit according to claim 4, wherein the first power line is a positive voltage line ([0039], DC power (such as 24 VDC)), and the second power line is a negative voltage line (e.g. since the negative power line is connected to ground, it can represent negative voltage line, fig.3); the voltage clamping unit comprises a first Zener diode (e.g. zener diode in 410, fig.4), a second Zener diode (e.g. zener diode in 410 or 436a or 430, fig.4), and a third Zener diode (e.g. zener diode in 410 or 436a or 430, fig.4);
an anode of the first Zener diode is connected to the second power line (e.g. anode of a zener diode in 410 is connected to ground, fig.4), and a cathode of the first Zener diode is connected to the first power line (e.g. cathode of a zener diode in 410 is connected to positive power line between power input and 408, fig.4).
Kumar does not teach, an anode of the second Zener diode is connected to the second power line, and a cathode of the second Zener diode is connected to the first signal line;
an anode of the third Zener diode is connected to the second power line, and a cathode of the third Zener diode is connected to the second signal line.
Prior art Huczko (US 5694283 A), Baluja (US 20240175741 A1) and Uhlenberg (US 20070183108 A1) have been found to be the closest prior art.
However, none of the prior art, taken singly or in combination, teach “an anode of the second Zener diode is connected to the second power line, and a cathode of the second Zener diode is connected to the first signal line;
an anode of the third Zener diode is connected to the second power line, and a cathode of the third Zener diode is connected to the second signal line.”
Regarding claim 16, it is allowed for the same reasons as stated above for claim 5.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SREEYA SREEVATSA whose telephone number is (571)272-8304. The examiner can normally be reached M-F 8am-5pm ET.
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/SREEYA SREEVATSA/Primary Examiner, Art Unit 2838 05/06/2026
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