DETAILED ACTION
Summary
This Office Action is in response to the Amendments to the Claims and Remarks filed September 10, 2025.
In view of the Amendments to the Claims filed September 10, 2025, the rejections of claims 1-11 under 35 U.S.C. 112(b) previously presented in the Office Action sent June 10, 2025 have been withdrawn.
In view of the Amendments to the Claims filed September 10, 2025, the rejections of claims 1-11 under 35 U.S.C. 102(a)(1) and 35 U.S.C. 103 previously presented in the Office Action sent June 10, 2025 have been substantially maintained and modified only in response to the Amendments to the Claims.
Claims 1-11 are currently pending.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chen et al. (CN 109494261 A included in Applicant submitted IDS filed November 21, 2024).
With regard to claim 1, Chen et al. discloses a gallium oxide back-passivated solar cell, wherein the solar cell comprises
a P- type silicon substrate (1, Fig. 2 and see Abstract), the P-type silicon substrate is provided with
a front coating (7/10/8, Fig. 2) and
a back coating (the combination of components 2, 4, and 5 depicted in Fig. 2 cited to read on the claimed “back coating” as it is a coating, or covering, on the back surface of the cited P- type silicon substrate 1)
on surfaces of opposite sides, respectively (see Fig. 2 on top and bottom surfaces, respectively);
the front coating comprises an emitter (7, Fig. 2),
a front silicon oxide layer (10, Fig. 2 and see [0027]) and
a front silicon nitride layer (8, Fig. 2 and see [0153])
stacked in sequence outward from a surface of the P-type silicon substrate (see Fig. 2), and the back coating consists of
a silicon oxide passivation layer (2, Fig. 2 and see [0020]),
a gallium oxide passivation layer (4, Fig. 2) and
a back passivation layer (5, Fig. 2)
stacked in sequence outward from a surface of the P-type silicon substrate (see Fig. 2).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Wan et al. (CN 112002771 A included in Applicant submitted IDS filed November 21, 2024) in view of Chen et al. (CN 109494261 A included in Applicant submitted IDS filed November 21, 2024).
With regard to claim 1, Wan et al. discloses a gallium oxide back-passivated solar cell, wherein the solar cell comprises
a P- type silicon substrate (1, Fig. 1 and see Abstract), the P-type silicon substrate is provided with
a front coating (2/3/4/5, Fig. 1) and
a back coating (the combination of components 6 and 5 depicted in Fig. 1 cited to read on the claimed “back coating” as it is a coating, or covering, on the back surface of the cited P- type silicon substrate 1)
on surfaces of opposite sides, respectively (see Fig. 1 on top and bottom surfaces, respectively);
the front coating comprises an emitter (2/3, Fig. 1),
a front silicon oxide layer (4, Fig. 1 and see [0047]) and
a front silicon nitride layer (5, Fig. 1 and see [0047])
stacked in sequence outward from a surface of the P-type silicon substrate (see Fig. 1), and the back coating consists of
a gallium oxide passivation layer (6, Fig. 1 and see [0047]) and
a back passivation layer (5, Fig. 1 and see [0047])
stacked in sequence outward from a surface of the P-type silicon substrate (see Fig. 1).
Wan et al. discloses the back coating consists of a gallium oxide passivation layer and a back passivation layer (recall 6/5, Fig. 1), but does not disclose wherein the back coating additionally consists of a silicon oxide passivation layer.
However, Chen et al. discloses a gallium oxide back-passivated solar cell (see Title and Abstract) and teaches a back coating can consists of a silicon oxide passivation layer (see 2, Fig. 2 and see [0020]), a gallium oxide passivation layer 4, and a back passivation layer 5.
Chen et al. teaches the inclusion of the silicon oxide passivation layer provides for passivation and a diffusion blocking effect (see [0139]).
Thus, at the time of the invention, it would have been obvious to a person having ordinary skill in the art to have modified the back coating of Wan et al. to include a silicon oxide passivation layer, as suggested by Chen et al., because it would have provided for passivation and a diffusion blocking effect.
With regard to claim 2, independent claim 1 is obvious over Wan et al. in view of Chen et al. under 35 U.S.C. 103 as discussed above. Wan et al. discloses wherein the cell comprises
a front electrode which penetrates through the front silicon nitride layer, the front silicon oxide layer and the emitter in sequence and inserts into the P-type silicon substrate (as depicted in Fig. 1, a front electrode 8 which penetrates through the cited front silicon nitride layer 5, the cited front silicon oxide layer 4 and the cited emitter 2/3 in sequence and inserts into the cited P-type silicon substrate 1), and
the front electrode forms an Ohmic contact with the P-type silicon substrate (see [0047]).
With regard to claim 3, dependent claim 2 is obvious over Wan et al. in view of Chen et al. under 35 U.S.C. 103 as discussed above. Wan et al. discloses wherein the cell further comprises
a back electrode which penetrates through the back passivation layer, the gallium oxide passivation layer and the silicon oxide passivation layer in sequence and inserts into the P-type silicon substrate (as depicted in Fig. 1, a back electrode 9 which penetrates through the cited back passivation layer 5, the cited gallium oxide passivation layer 6 and, as modified above, the cited silicon oxide passivation layer in sequence and inserts into the cited P-type silicon substrate 1), and
the back electrode forms an Ohmic contact with the P-type silicon substrate (see [0047]).
With regard to claim 4, independent claim 1 is obvious over Wan et al. in view of Chen et al. under 35 U.S.C. 103 as discussed above. Wan et al. discloses wherein
the back passivation layer comprises any one or a combination of at least two of silicon nitride, silicon oxynitride or silicon carbide (see [0047] teaching silicon nitride).
With regard to claim 5, independent claim 1 is obvious over Wan et al. in view of Chen et al. under 35 U.S.C. 103 as discussed above. Chen et al. discloses wherein
the silicon oxide passivation layer has a thickness of 1-15 nm (see [0139] teaching values within the claimed range of 1-15 nm);
optionally, the gallium oxide passivation layer has a thickness of 10-100 nm, further optionally 20-40 nm; optionally, the back passivation layer has a thickness of 10-200 nm, further optionally 60-80 nm; optionally, the front silicon oxide layer has a thickness of 1-5 nm; optionally, the front silicon nitride layer has a thickness of 10-200 nm, further optionally 60-80 nm (the claimed phrase “optionally” is interpreted to render following limitations optional in the claim).
With regard to claim 6, independent claim 1 is obvious over Wan et al. in view of Chen et al. under 35 U.S.C. 103 as discussed above. Wan et al., as modified above, discloses a preparation method for the solar cell according to claim 1 (recall rejection of claim 1 above) comprising:
performing laser doping to form an emitter on one surface of a P-type silicon substrate (see [0053-0054] teaching laser doping to form an emitter 2/3 on one top surface of a P-type silicon substrate 1, Fig. 1),
then performing thermal oxidation to form a front silicon oxide layer (see [0056] teaching thermal oxidation to form a front silicon oxide layer 4, Fig. 1),
subsequently depositing a silicon oxide passivation layer, a gallium oxide passivation layer and a back passivation layer in sequence on a surface of the P-type silicon substrate opposite to the front silicon oxide layer (see [0057-0058] teaching subsequently depositing, the cited silicon oxide passivation layer as modified by Chen et al. above, a gallium oxide passivation layer 6 and a back passivation layer 5 in sequence on a bottom surface of the P-type silicon substrate 1 opposite to the cited front silicon oxide layer 4), and
subsequently depositing a front silicon nitride layer on a surface of the formed front silicon oxide layer (see [0058] teaching subsequently depositing a front silicon nitride layer 5 on the top surface of the formed front silicon oxide layer 4 subsequent to a portion of depositing the sequence on the other surface of the P-type silicon substrate).
With regard to claim 7, dependent claim 6 is obvious over Wan et al. in view of Chen et al. under 35 U.S.C. 103 as discussed above. Wan et al., as modified above, discloses which specifically comprises:
performing texturization on a silicon wafer surface to form a textured surface (see [0052] and top surface of silicon wafer 1, Fig. 1),
then performing phosphorus diffusion on a surface (see [0053]),
then performing laser doping to form an emitter on the surface of a P-type silicon substrate (see [0054]),
etching and removing a phosphorus-silicon layer on a residual surface of the P-type silicon substrate (see [0055]), and
subsequently performing thermal oxidation on a surface of the emitter to form a front silicon oxide layer (see [0056]);
depositing a silicon oxide passivation layer (as modified by Chen et al. above, depositing the cited silicon oxide passivation layer at the back surface of the silicon wafer prior to a gallium oxide passivation layer),
a gallium oxide passivation layer (see [0057]) and
a back passivation layer in sequence on the other surface of the P-type silicon substrate opposite to the front silicon oxide layer to obtain a back coating (see [0058]);
depositing a front silicon nitride layer on the surface of the formed front silicon oxide layer to complete the preparation of a front coating (see [0058]); and
performing laser doping to form a gallium-doped back surface field from a surface of the back passivation layer to an inside of the P-type silicon substrate (see [0059] and 7, Fig. 1), and
subsequently performing screen printing and sintering to form a front electrode and a back electrode (see [0060]).
With regard to claim 8, dependent claim 7 is obvious over Wan et al. in view of Chen et al. under 35 U.S.C. 103 as discussed above. Wan et al., as modified above, discloses wherein
in step (I), a mixed solution of an alkali solution, water and an additive is used to form the textured surface on the silicon wafer surface (see [0052]);
optionally, the alkali solution, the water and the additive have a volume ratio of (8-12): (240- 360):(2-3); optionally, the texturization has a temperature of 70-90°C; optionally, the alkaline solution is KOH and/or NaOH; optionally, the additive is ethanol and/or isopropanol (the claimed phrase “optionally” is interpreted to render following limitations optional in the claim).
With regard to claim 9, dependent claim 7 is obvious over Wan et al. in view of Chen et al. under 35 U.S.C. 103 as discussed above. Wan et al., as modified above, discloses wherein
wherein in step (I), the phosphorus-silicon layer is removed from the surface of the P-type silicon substrate with an acid solution by wet etching (see [0055]);
optionally, the acid solution is an aqueous solution of HF; optionally, the water and HF in the acid solution have a volume ratio of (35-45):3 (the claimed phrase “optionally” is interpreted to render following limitations optional in the claim).
With regard to claim 10, dependent claim 7 is obvious over Wan et al. in view of Chen et al. under 35 U.S.C. 103 as discussed above. Wan et al., as modified above, discloses wherein
wherein in step (II), plasma-enhanced chemical vapor deposition is used to deposit the silicon oxide passivation layer on the surface of the P-type silicon substrate (see Chen et al. at [0204] teaching cited silicon oxide passivation layer formed by PECVD);
optionally, the silicon oxide passivation layer has a deposition time of 30-150 s; optionally, SiH4 and N20 are used as reaction gases in the deposition of the silicon oxide passivation layer; optionally, the SiH4 has a volume flow rate of 550-700 sccm; optionally, the N20 has a volume flow rate of 3000-3250 sccm; optionally, plasma-enhanced chemical vapor deposition is used to deposit the back passivation layer; optionally, a preparation method for the gallium oxide passivation layer comprises atomic layer deposition, plasma-enhanced chemical vapor deposition, atmospheric pressure chemical vapor deposition or low pressure chemical vapor deposition (the claimed phrase “optionally” is interpreted to render following limitations optional in the claim).
With regard to claim 11, dependent claim 7 is obvious over Wan et al. in view of Chen et al. under 35 U.S.C. 103 as discussed above. Wan et al., as modified above, discloses wherein
wherein in step (III), plasma-enhanced chemical vapor deposition is used to deposit the front silicon nitride layer on the surface of the front silicon oxide layer (see [0058]).
Response to Arguments
Applicant's arguments filed September 10, 2025 have been fully considered but they are not persuasive.
Applicant notes the newly added claimed limitations are not found within the previously cited prior art references. However, this argument is addressed in the rejections of the claims above.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/DUSTIN Q DAM/Primary Examiner, Art Unit 1721 November 12, 2025