DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The subject matter of this application admits of illustration by a drawing to facilitate understanding of the invention. Applicant is required to furnish a drawing under 37 CFR 1.81(c). No new matter may be introduced in the required drawing. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d).
Claim Objections
Claim 2 is objected to because of the following informalities:
2. The display substrate according to claim 1, wherein the shielding pattern and the corresponding initialization signal line.
Appropriate correction is required.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 18 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
The term “normal” in claim 18 is a relative term which renders the claim indefinite. The term “normal” is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. The claim is indefinite because it is unclear how a normal display region is different from a display region.
For examination purposes, the claim will be interpreted as a display region.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1 and 18-20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lee et al. US 2021/0217836.
Regarding claim 1, Lee et al. in Figs. 1-10 and [0033]-[0095] discloses a display substrate, comprising a base substrate 110, and a plurality of sub-pixels and a plurality of initialization signal lines (e.g. a driving voltage line 172, a signal is a time-varying quantity that conveys information about a phenomenon; a signal can take various forms, including voltage, current and resistance) arranged on the base substrate 110, wherein each sub-pixel in the plurality of sub-pixels comprises a sub-pixel driving circuitry Fig. 2 and a shielding pattern 178, and the sub-pixel driving circuitry comprises a driving transistor T1 and a compensation transistor T3 [0038];
a first electrode S3 of the compensation transistor T3 is coupled to a second electrode D1 of the driving transistor T1, and a second electrode D3 of the compensation transistor T3 is coupled to a gate electrode G1 of the driving transistor T1;
the compensation transistor T3 comprises a compensation active layer 130c, the compensation active layer comprises a first compensation channel portion 131c1, a second compensation channel portion 131c3 and a compensation connection portion 131c2, and the compensation connection portion 131c2 is coupled to the first compensation channel portion 131c1 and the second compensation channel portion 131c3 [0068];
and the shielding pattern 178 is coupled to a corresponding initialization signal line (e.g. a driving voltage line 172) [0095], and an orthogonal projection of the shielding pattern 178 onto the base substrate 110 at least partially overlaps with an orthogonal projection of the compensation connection portion 131c2 onto the base substrate 110 Fig. 10.
Regarding claim 18, Lee et al. discloses the display substrate according to claim 1, further comprising in Fig. 1, a normal display region, a transition region and an under-screen camera region, wherein at least one of the normal display region, the transition region and the under-screen camera region comprises the sub-pixels.
Regarding claim 19, Lee et al. discloses the display substrate according to claim 1, further comprising a plurality of data lines 121, 122, 123, 171, a plurality of gate lines 121, 122, 123, 171, a plurality of light-emission control lines 121, 122, 123, 171 and a plurality of power source lines ELVDD, wherein the sub-pixel driving circuitry further comprises a storage capacitor Cst, a data write-in transistor T2, a power source control transistor T5 and a light-emission control transistor T6 [0035]-[0056];
a gate electrode G2 of the data write-in transistor T2 is coupled to a corresponding gate line 171, a first electrode S2 of the data write-in transistor T2 is coupled to a corresponding data line Dm, and a second electrode D2 of the data write-in transistor T2 is coupled to a first electrode S1 of the driving transistor T1;
a gate electrode G5 of the power source control transistor T5 is coupled to a corresponding light-emission control signal line 123, a first electrode S5 of the power source control transistor T5 is coupled to a power source line ELVDD, and a second electrode D5 of the power source control transistor T5 is coupled to the first electrode S1 of the driving transistor T1;
a gate electrode G6 of the light-emission control transistor T6 is coupled to a corresponding light-emission control signal line 123, a first electrode of the light-emission control transistor T6 is coupled to the second electrode D1 of the driving transistor T1, and a second electrode D6 of the light-emission control transistor T6 is coupled to the light-emitting element in the sub-pixel OLED; and
a first plate of the storage capacitor Cst1 is coupled to the gate electrode G1 of the driving transistor T1, and a second plate of the storage capacitor Cst2 is coupled to a corresponding power source line ELVDD [0035]-[0056].
Regarding claim 20, Lee et al. discloses a display device, comprising the display substrate according to claim 1 [0033].
Claim(s) 1 and 2 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Choi et al. US 2020/0312924.
Regarding claim 1, Choi et al. in Figs. 1-7 and [0044]-[0102] discloses a display substrate, comprising a base substrate 110, and a plurality of sub-pixels and a plurality of initialization signal lines (121, 122, 123, 124, 134, 171, 172, a signal is a time-varying quantity that conveys information about a phenomenon; a signal can take various forms, including voltage, current and resistance) arranged on the base substrate 110, wherein each sub-pixel in the plurality of sub-pixels comprises a sub-pixel driving circuitry Fig. 2 and a shielding pattern 172 [0105], and the sub-pixel driving circuitry comprises a driving transistor T1 and a compensation transistor T3 [0049];
a first electrode S3 of the compensation transistor T3 is coupled to a second electrode D1 of the driving transistor T1, and a second electrode D3 of the compensation transistor T3 is coupled to a gate electrode G1 of the driving transistor T1;
the compensation transistor T3 comprises a compensation active layer 130c, the compensation active layer comprises a first compensation channel portion 131c1, a second compensation channel portion 131c3 and a compensation connection portion 131c2, and the compensation connection portion 131c2 is coupled to the first compensation channel portion 131c1 and the second compensation channel portion 131c3 [0082];
and the shielding pattern 172 is coupled to a corresponding initialization signal line (e.g. a driving voltage line 172) [0102], and an orthogonal projection of the shielding pattern 172 onto the base substrate 110 at least partially overlaps with an orthogonal projection of the compensation connection portion 131c2 onto the base substrate 110 Figs. 3, 4 and 7.
Regarding claim 2, Choi et al. . (Original) The display substrate according to claim 1, wherein the shielding pattern 172 and the corresponding initialization signal lines 172 are of a one-piece structure Figs. 3 and 7, [0102].
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. as applied to claim 1 above, and further in view of Han et al. US 2023/0165076.
Regarding claim 17, Lee et. al discloses the display substrate according to claim 1, wherein the plurality of initialization signal lines comprises a plurality of second initialization signal lines, and the shielding pattern 178 is coupled to a corresponding second initialization signal line; and the sub-pixel further comprises a light-emitting element OLED but does not expressly disclose the sub-pixel driving circuitry further comprises a second reset transistor, a first electrode of the second reset transistor is coupled to a corresponding second initialization signal line, and a second electrode of the second reset transistor is coupled to an anode of the light-emitting element.
Han et al. in [0050] teaches a display with sub-pixels and the sub-pixel driving circuitry comprises a second reset transistor T7, a first electrode of the second reset transistor T7 is coupled to a corresponding second initialization signal line (e.g. voltage signal line), and a second electrode of the second reset transistor T7 is coupled to an anode of a light-emitting element. Han et al. in [0073] further teaches that time of the writing and compensation period may be increased, so as to make charging time of the sub-pixel sufficient and improve the threshold voltage compensation effect. Therefore, the display effect of the display apparatus at a high refresh frequency may be improved.
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teachings of Han et al. in the display substate of Lee et al. for the purpose of improving the display performance.
Allowable Subject Matter
Claims 3-10 and 11-16 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 3, the prior art neither anticipates nor renders obvious
wherein the initialization signal line comprises at least a portion extending in a first direction, and the shielding pattern comprises at least a portion extending in a second direction intersecting the first direction; the sub-pixel driving circuitry further comprises a first conductive connection portion, a first end of the first conductive connection portion is coupled to the second electrode of the compensation transistor, and a second end of the first conductive connection portion is coupled to the gate electrode of the driving transistor; and
in the first direction, an orthogonal projection of the shielding pattern onto the base substrate, an orthogonal projection of the second compensation channel portion onto the base substrate, and an orthogonal projection of the first end of the first conductive connection portion onto the base substrate are sequentially arranged.
Claims 4-10 directly or indirectly depend from allowable claim 3.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 11, the prior art neither anticipates nor renders obvious
wherein the initialization signal line comprises at least a portion extending in a first direction, and the shielding pattern comprises at least a portion extending in a second direction intersecting the first direction; the sub-pixel driving circuitry further comprises a first conductive connection portion, a first end of the first conductive connection portion is coupled to the second electrode of the compensation transistor, and a second end of the first conductive connection portion is coupled to the gate electrode of the driving transistor; and at least a portion of the orthogonal projection of the shielding pattern onto the base substrate and an orthogonal projection of the first conductive connection portion onto the base substrate are arranged in the second direction.
Claims 12-16 directly or indirectly depend from allowable claim 11.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SONYA D MCCALL-SHEPARD whose telephone number is (571)272-9801. The examiner can normally be reached M-F: 8:30 AM-5:00 PM.
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/Sonya McCall-Shepard/ Primary Examiner, Art Unit 2898