DETAILED ACTION
This office action is in response to the application filed on 10/25/2023. Claims 1-20 are pending.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Applicant’s claim for the benefit of a prior-filed application under 35 U.S.C. 119(e) or under 35 U.S.C. 120, 121, or 365(c) is acknowledged.
Drawing
The drawing submitted on 10/25/2023 is acknowledged and accepted by the examiner.
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 10/26/2023, 01/19/2024, 10/24/2024, 12/19/2024, 02/21/2025, 04/16/2025, and 04/24/2025 have been considered by the examiner.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-11, 14-20 are rejected under 35 U.S.C. 102(a)(1) and/or (a)(2) as being anticipated by Ekhtiari et al. (NPL_IEEE Analysis of Bidirectional Piezoelectric-Based Converters for Zero- Voltage Switching Operation, hereinafter Ekhtiari).
Claim 1, Ekhtiari teaches a converter having a first port and a second port (e.g., the input and the output port respectively, see Fig. 1-5), the converter comprising:
a piezoelectric transformer (PT) having a first port and a second port (e.g., the PT, see Fig. 1-3);
one or more first switches (e.g., S1, S2) configured to operate in accordance with a first switching sub-sequence (e.g., the switching sequence of S1 and S2) to transfer energy from the first port of the converter to the first port of the PT, the first switching sub-sequence having at least six (6) stages (e.g., corresponding switching sequence of S1 and S2 respective to Vfp, see Fig. 1-3, 5); and
one or more second switches (e.g., S3, S4) configured to operate in accordance with a second switching sub-sequence (e.g., the switching sequence of S3, S4) to transfer energy from the second port of the PT to the second port of the converter (e.g., see Fig. 3, 5).
Claim 2, Ekhtiari teaches the limitations of claim 1 as discussed above. It further teaches that wherein the first port of the converter is an input port and the second port of the converter is an output port (e.g., see Fig. 1-3, 5).
Claim 3, Ekhtiari teaches the limitations of claim 1 as discussed above. It further teaches that wherein the first port of the converter is an output port (e.g., the port outputting power to Rl) and the second port of the converter is an input port (e.g., the port receiving power from Vdc, see Fig. 1-3, 5).
Claim 4, Ekhtiari teaches the limitations of claim 1 as discussed above. It further teaches that wherein the second switching sub-sequence has at least four (4) stages (e.g., see Fig. 1-3, 5).
Claim 5, Ekhtiari teaches the limitations of claim 1 as discussed above. It further teaches that wherein the first switching sub-sequence has six (6) stages (e.g., corresponding switching sequence of S1 and S2 respective to Vfp ) and the second switching sub-sequence has four (4) stages (e.g., corresponding switching sequence of S3 and S4 respective to Vfs, see Fig. 1-3, 5).
Claim 6, Ekhtiari teaches the limitations of claim 1 as discussed above. It further teaches that wherein the first switching sub-sequence has six (6) stages and the second switching sub-sequence has six (6) stages (e.g., corresponding switching sequences of S1 and S2 respective to Vfp, and S3 and S4 respective to Vfs, see Fig. 1-3, 5).
Claim 7, Ekhtiari teaches the limitations of claim 1 as discussed above. It further teaches that wherein the first switching sub-sequence and second switching sub-sequence comprise a switching sequence of the converter, wherein the switching sequence includes: connected stages in which the first port of the PT and the second port of the PT are both connected to one of the first port of the converter, the second port of the converter (e.g., while S1 S3 being ON and S2 S4 being OFF), or the other port of the PT (e.g., while S1 S3 being OFF and S2 S4 being ON, see Fig. 1-3, 5); and
open stages in which at least one of the first port of the PT port or the second port of the PT is not connected by a closed switch to one of the first port of the converter, the second port of the converter (e.g., while S1 S3 being OFF and S2 S4 being ON, see Fig. 1-3, 5), or the other port of the PT.
Claim 8, Ekhtiari teaches the limitations of claim 7 as discussed above. It further teaches that wherein the at least six (6) stages of the first switching alternate between connected stages and open stages (e.g., corresponding switching sequence of S1 and S2 respective to Vfp, see Fig. 1-3, 5).
Claim 9, Ekhtiari teaches the limitations of claim 7 as discussed above. It further teaches that wherein the second switching sub-sequence has at least four (4) stages alternating between connected stages and open stages (e.g., corresponding switching sequence of S3 and S4 respective to Vfs, see Fig. 1-3, 5).
Claim 10, Ekhtiari teaches the limitations of claim 1 as discussed above. It further teaches that wherein the one or more first switches are arranged in a half bridge (HB) topology (e.g., S1, S2) and the one or more second switches are arranged in a half bridge (HB) topology (e.g., S3, S4, see Fig. 1-3).
Claim 11, Ekhtiari teaches the limitations of claim 1 as discussed above. It further teaches that wherein the one or more first switches are arranged in a full bridge (FB) topology (e.g., the full-bridge configuration of the primary side switching network, see col. 2, page 866, Fig. 1-3) and the one or more second switches are arranged in a half bridge (HB) topology (e.g., S3, S4, see Fig. 2).
Claim 14, Ekhtiari teaches the limitations of claim 1 as discussed above. It further teaches that wherein the first port and second port of the converter are connected by a common-negative (e.g., the common Ground connected with the negative of Vdc, see Fig. 3).
Claim 15, Ekhtiari teaches the limitations of claim 1 as discussed above. It further teaches that wherein the PT has three terminals with one of the terminals shared between the first and second port of the PT (e.g., the common ground, see Fig. 1-3).
Claim 16, Ekhtiari teaches the limitations of claim 1 as discussed above. It further teaches that further comprising a switching controller (e.g., a switching control circuit generating the gate control signals of S1, S2, S3, S4 is implicitly taught) configured to operate the one or more first switches in accordance with the first switching sub-sequence and the one or more second switches in accordance with the second switching sub- sequence (e.g., see Fig. 1-3, 5).
Claim 17, Ekhtiari teaches a converter having a first port and a second port (e.g., the input and the output port respectively, see Fig. 1-5), the converter comprising:
a piezoelectric transformer (PT) having a first port and a second port;
first switches (e.g., the primary side switching network) connected between the first port of the converter and the first port of the PT and arranged in a full bridge (FB) topology (e.g., the full-bridge configuration of the primary side switching network, see col. 2, page 866, Fig. 1-3); and
second switches (e.g., the rectifier network the secondary side, see col. 2, page 866, Fig. 1-3) connected between the second port of the converter and the second port, wherein the first and second port of the converter are not isolated (e.g., see Fig. 1-3),
wherein first switches and the second switches configured to operate in accordance with one or more switching sequences to transfer energy from the first port of the converter to the second port of the converter (e.g., corresponding switching sequences of S1 and S2 respective to Vfp, and S3 and S4 respective to Vfs, see Fig. 1-3, 5).
Claim 18, Ekhtiari teaches the limitations of claim 17 as discussed above. It further teaches that wherein the first port of the converter and second port of the converter are connected by a common-negative (e.g., the common Ground connected with the negative of Vdc, see Fig. 1-3).
Claim 19, Ekhtiari teaches the limitations of claim 17 as discussed above. It further teaches that wherein the first switches comprise active switches (e.g., the MOSFET, see col. 2 page 867, col. 1 page 868, Fig. 1-3).
Claim 20, Ekhtiari teaches the limitations of claim 17 as discussed above. It further teaches that wherein the second switches comprise at least one passive switch (e.g., the diodes in parallel with S3 and S4 respectively, col. 2, page 866, Fig. 1-3).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1,148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103(a) are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating
obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims under 35 U.S.C. 103(a), the examiner presumes that the subject matter of the various claims was commonly owned at the time any inventions covered therein were made absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and invention dates of each claim that was not commonly owned at the time a later invention was made in order for the examiner to consider the applicability of 35 U.S.C. 103(c) and potential 35 U.S.C. 102(e), (f) or (g) prior art under 35 U.S.C. 103(a).
Claims 12, 13 are rejected under 35 U.S.C. 103(a) as being unpatentable over Ekhtiari et al. (NPL_IEEE Analysis of Bidirectional Piezoelectric-Based Converters for Zero- Voltage Switching Operation, hereinafter Ekhtiari), in view of Wang et al., (NPL_IEEE Design and Analysis of Tunable Piezoelectric Transformer Based DC/DC Converter with AC Output Inductor, hereinafter Wang).
Claim 12, Ekhtiari teaches the limitations of claim 1 as discussed above. Ekhtiari further teaches that wherein the one or more first switches are arranged in a half bridge (HB) topology (e.g., S1, S2, see Fig. 1-3).
Ekhtiari does not explicitly disclose that the one or more second switches are arranged in a full bridge (FB) topology.
Wang discloses a Piezoelectric-Transformer-Based DC-DC Converter having the rectifier network secondary switches arranged in a full bridge (FB) topology (e.g., see Fig. 7).
Therefore, It would have been obvious to one having ordinary skill in the art before the effective filing date to modify Ekhtiari by including the active full bridge (FB) topology of the rectifier network as taught by Wang in order of being able to produce the DC output power to the load with improved efficiency (e.g., see Fig. 7, 8).
Claim 13, Ekhtiari teaches the limitations of claim 1 as discussed above. Ekhtiari further teaches that the one or more first switches are arranged in a full bridge (FB) topology (e.g., the full-bridge configuration of the primary side switching network, see col. 2, page 866, Fig. 1-3).
Ekhtiari does not explicitly disclose that the one or more second switches are arranged in a full bridge (FB) topology.
Wang discloses a Piezoelectric-Transformer-Based DC-DC Converter having the rectifier network secondary switches arranged in a full bridge (FB) topology (e.g., see Fig. 7).
Wang reads the same obviousness as discussed in the claim 12 rejection above.
Response to Arguments
Applicants’ arguments in the remarks filed on 09/19/2025 have been considered have been fully considered and please see the examiner's responses for the reasons as discussed below.
Applicants stated on pages 6-8 of the REMARKS:
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Examiner's Response:
Applicant's above arguments have been fully considered but they are not persuasive. Examiner would like to respectfully remind Applicant that as indicated in the previous office action, the prior art Ekhtiari teaches the claimed limitations including “ … one or more first switches (e.g., S1, S2) configured to operate in accordance with a first switching sub-sequence (e.g., the switching sequence of S1 and S2) to transfer energy from the first port of the converter to the first port of the PT, the first switching sub-sequence having at least six (6) stages the respective multiple (more than six) switching stages of corresponding switching sequence of S1 and S2 respective to Vfp in every 4π period as shown in copy of Fig. 5 below”, just as Applicants recited in the claim 1. Since Applicant only recited the limitations “… at least six (6) stages …” without detail to limit or specifics regarding these Stages of the first switching sub-sequence, it is Examiner’s position that the teachings prior art Ekhtiari as discussed above anticipates the argued limitations as recited in the claim.
In further response to applicant's argument that the references fail to show certain features of applicant’s invention, it is noted that the features upon which applicant relies, such as the features of switching sub-sequence, including “… an order of connected/zero stage voltages applied to either the input port of the PT or to the output port of the PT …, and/or … over the course of a complete switching cycle (2π) …”, are not recited in the argued claim. Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993).
Applicants are respectfully reminded that before the prior art can be applied, the Patent Office must consider the scope of the claims, and during examination, patent claims are to be given the "broadest reasonable interpretation" in light of the specification. MPEP § 2258(G); see also § 2111 (citing Phillips v. AWH Corp., 415 F.3d 1303 (Fed. Cir. 2005)). Since Applicant did not limit the first switching sub-sequence in the argued claims to any specific detail other than being able to transfer energy from the first port of the converter to the first port of the PT, or explicitly indicate that the first switching sub-sequence having at least six (6) stages is limited to 2π cycle or cannot be exceeding 2π cycle, therefore, the prior art Ekhtiari anticipates the argued limitations as recited in the claim.
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Applicants further stated on pages 8-9 of the REMARKS:
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Examiner's Response:
Applicant's above arguments have been fully considered but they are not persuasive. Examiner would like to respectfully remind Applicant that as indicated in the previous office action, the prior art Ekhtiari teaches the claimed invention of PT based converter as recited in claim 17, as shown in the copy of Fig. 1-2, … below, including the claimed limitations “ … first switches the switching network connected between the first port connected with Vin of the converter and the first port of the PT the input of the Resonant network of PT and arranged in a full bridge (FB) topology the full-bridge configuration of the switching network shown in the copies of col. 2, page 866 and Fig. 1-2…”, as well as “ … wherein first switches the switching network and the second switches the Rectifier network configured to operate in accordance with one or more switching sequences to transfer energy from the first port of the converter to the second port of the converter the respective switching sequences of the switching network and the Rectifier network is implicitly taught in order to the converter of Fig. 1-2 to transferring the energy from Vin to Load”, just as Applicants recited in the claim 17. Since Applicants did not limit the “… first switches … arranged in a full bridge (FB) topology…” in the argued claims to any specific structure or operational/functional detail other arranging the first switches in a full bridge (FB) topology, it is Examiner’s position that the teachings in Fig. 1-2 of prior art Ekhtiari as discussed above anticipates the argued limitations as recited in the claim.
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copies of col. 2, page 866 of Ekhtiari
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Therefore, for at least the reasons as discussed above, the grounds of the claim rejections are maintained in the current office action, and the current office action is made FINAL.
Examiner's Note:
Examiner has cited particular columns and line numbers in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner.
In the case of amending the claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention.
Conclusion
3. THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
6. Any inquiry concerning this communication or earlier communications from the examiner should be directed to JUE ZHANG whose telephone number is (571)270-1263. The examiner can normally be reached on M-Th 7:30-5:00PM EST, Other F 7:30AM-5:00PM EST If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Monica Lewis can be reached on 571-272-2838. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/JUE ZHANG/
Primary Examiner, Art Unit 2838