CTNF 18/557,670 CTNF 91072 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Claim Rejections - 35 USC § 102 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-08-aia AIA (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 07-15 AIA Claim s 1-9 are rejected under 35 U.S.C. 102( a)(1 ) as being anticipated by Shu et al. (US 2018/0259645), hereinafter Shu . In re. claim 1, Shu teaches a photodetector comprising: a light-receiving circuit (231) including a light-receiving element (236) (fig. 2) (para [0072]), and being configured to detect a light pulse (239) reflected by a detection target among light pulses emitted from a light-emitting section (244) (para [0069]); a conversion circuit being configured to calculate a digital value corresponding to a light-receiving timing in the light-receiving circuit (TDC) (para [0118]); a histogram generation circuit being configured to generate a first histogram on a basis of the digital value (generation of histogram) (para [0110]-[0112]); a correction processing circuit (profile filters) being configured to generate a second histogram by performing correction processing (para [0203]) on the first histogram using a light-receiving characteristic (e.g. SPAD gain in db) (fig. 15) that is asymmetric in a direction of a time axis in the light-receiving element (moderate pileup filter (1530) is asymmetrical) (fig. 15); and a calculation circuit being configured to calculate a representative value of the light-receiving timing on a basis of the second histogram (block (2470)) (para [0314]) (fig. 24). In re. claims 2-3, Shu teaches the photodetector according to claim 1, wherein the correction processing section is configured to generate the second histogram by performing the correction processing further using a linearity characteristic in the conversion circuit (number of time bins (e.g. 5) matching input signal) (para [0209]-[0210]), in addition to the light-receiving characteristic, wherein the linearity characteristic includes a characteristic of differential non-linearity (using 9 time bins for the smeared filter) (para [0211]). In re. claim 4, Shu teaches the photodetector according to claim 2, wherein the correction processing circuit is configured to perform the correction processing by performing a convolution arithmetic operation on a basis of the first histogram (i.e. summing photon counts into histogram) (para [0110]-[0112]) and a characteristic mathematical function (filtering) including the light-receiving characteristic and the linearity characteristic (using profile filters) (para [0203]). In re. claim 5, Shu teaches the photodetector according to claim 1, wherein the correction processing circuit is configured to estimate, by the correction processing, a reflected light component corresponding to light reflected by the detection target (photon counts) and an ambient light component on a basis of the first histogram (detecting high pileup (para [0126] and [0128])), and the correction processing circuit is configured to generate the second histogram on a basis of the reflected light component among the reflected light component and the ambient light component (filters used corresponding to different types of pileup profiles) (para [0201]). In re. claim 6, Shu teaches the photodetector according to claim 1, wherein the light-receiving characteristic includes a characteristic indicating a distribution of response times (time bin width of 1 ns) when the light-receiving element converts light into electric charge (para [0057]). In re. claim 7, Shu teaches the photodetector according to claim 1, wherein the calculation circuit is configured to calculate a distance from the photodetector to the detection target on a basis of the representative value of the light-receiving timing (step 3470) (fig. 34). In re. claim 8, Shu teaches the photodetector according to claim 1, wherein the light-receiving element includes an SPAD (para [0071]). In re. claim 9, Shu teaches a photodetection system comprising: a light-emitting section (240) (fig. 2) being configured to emit light pulses (249); and a photodetection section (230), the photodetection section including a light-receiving circuit (231) (fig. 2) (para [0072]) including a light-receiving element (236), and being configured to detect a light pulse (239) reflected by a detection target among the light pulses emitted from the light-emitting section (para [0069]), a conversion circuit being configured to calculate a digital value corresponding to a light-receiving timing in the light-receiving circuit (TDC) (para [0118]), a histogram generation circuit being configured to generate a first histogram on a basis of the digital value (generation of histogram) (para [0110]-[0112]), a correction processing circuit (profile filters) being configured to generate a second histogram by performing correction processing (para [0203]) on the first histogram using a light-receiving characteristic (e.g. SPAD gain in db) (fig. 15) that is asymmetric in a direction of a time axis in the light-receiving element (moderate pileup filter (1530) is asymmetrical) (fig. 15), and a calculation circuit being configured to calculate a representative value of the light-receiving timing on a basis of the second histogram (block (2470)) (para [0314]) (fig. 24) . Conclusion 07-96 AIA The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. See PTO-892 . Any inquiry concerning this communication or earlier communications from the examiner should be directed to Christopher D. Hutchens whose telephone number is (571)270-5535. The examiner can normally be reached M-F 9-5. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kimberly Berona can be reached at 571-272-6909. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /C.D.H./ Primary Examiner Art Unit 3647 /Christopher D Hutchens/Primary Examiner, Art Unit 3647 Application/Control Number: 18/557,670 Page 2 Art Unit: 3647 Application/Control Number: 18/557,670 Page 3 Art Unit: 3647 Application/Control Number: 18/557,670 Page 4 Art Unit: 3647 Application/Control Number: 18/557,670 Page 5 Art Unit: 3647
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