Prosecution Insights
Last updated: July 17, 2026
Application No. 18/557,881

SYSTEM FOR DISPLAYING CRITICAL AND NON-CRITICAL INFORMATION

Non-Final OA §103
Filed
Oct 27, 2023
Priority
Apr 30, 2021 — FR FR2104581 +2 more
Examiner
TIEU, BENNY QUOC
Art Unit
2682
Tech Center
2600 — Communications
Assignee
Safran S.A.
OA Round
3 (Non-Final)
21%
Grant Probability
At Risk
3-4
OA Rounds
1m
Est. Remaining
21%
With Interview

Examiner Intelligence

Grants only 21% of cases
21%
Career Allowance Rate
13 granted / 62 resolved
-41.0% vs TC avg
Minimal +0% lift
Without
With
+0.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 10m
Avg Prosecution
19 currently pending
Career history
89
Total Applications
across all art units

Statute-Specific Performance

§101
5.5%
-34.5% vs TC avg
§103
78.7%
+38.7% vs TC avg
§102
11.0%
-29.0% vs TC avg
§112
4.3%
-35.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 62 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment Claims 12-14 have been added. Claims 1-3 and 9-14 are pending. Response to Arguments Applicant’s arguments with respect to claims 1-3 and 9-14 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-3 and 8-10 are rejected under 35 U.S.C. 103 as being unpatentable over Naimer et al. (US PGPUB No 2004/0046712) in view of Gyllensward (US PGPUB 2015/0277838). Regarding claim 1, Naimer et al. teach a system (Fig. 3) for displaying critical and non-critical information on a screen (Fig. 3, 128), the system comprising, in one same housing, an output of which is connected to the screen, at least one electronic computing circuit (Fig. 3, 106+110) and one electronic monitoring circuit (Fig. 3, 108+112), wherein the electronic computing circuit is programmed to process the critical information to be displayed, construct at least one image from the non-critical information and incorporate the critical information to be displayed in a first detail layer which is intended to form an overprint layer in the image to be displayed in order to form, on an output of the electronic computing circuit, an image signal intended to be transmitted to the screen (paragraphs 26 and 27); wherein the electronic computing circuit transmits the first detail layer to the electronic monitoring circuit with the critical information to be displayed incorporated therein and wherein the electronic monitoring circuit (Fig. 3, 112) has an input (Fig. 3. Path 134 connects output of 106 to input of 112) connected to said output of the electronic computing circuit (Fig. 3, 106). Naimer et al. fail to teach use the first detail layer as a mask applied to the image signal to obtain a result signal and verifies whether the result signal corresponds to the first detail layer. However, Gyllensward discloses a visual display module in which a checksum of a supervised region of each image frame is computed based on a display drive signal, while excluding at least one element in the pixel value range from contributing to the checksum. Gyllensward teaches selectively excluding pixel values or pixel positions from checksum verification of a display signal (See Gyllensward, Abstract; paras. [0012]–[0020], [0057]–[0065]). Gyllensward further teaches a colour filter and a bitmask filter that exclude selected pixel values or pixel positions from checksum computation, thereby providing a verification mechanism that focuses on relevant portions of the display while ignoring non-critical portions. It would have been obvious to one of ordinary skill in the art at the time the invention was made to modify the display anomaly detection system of Naimer et al. using the selective checksum/filtering approach of Gyllensward in order to improve verification of the embedded safety pattern and the corresponding critical display information, while excluding non-critical display portions from the verification process. The combination would have yielded the predictable result of a display system capable of verifying critical image content using a masked or filtered integrity check. Regarding claim 2, Naimer et al. teach a system (Fig. 3) for displaying critical and non-critical information on a screen (Fig. 3, 128), the system comprising, in one same housing, an output of which is connected to the screen, at least one electronic computing circuit (Fig. 3, 106+110) and one electronic monitoring circuit (Fig. 3, 108+112), wherein the electronic computing circuit is programmed to process the critical information to be displayed construct at least one image from the non-critical information and incorporate the critical information to be displayed in a first detail layer which is intended to form an overprint layer in the image to be displayed in order to form, on an output of the electronic computing circuit, an image signal intended to be transmitted to the screen (paragraphs 26-27); wherein the electronic computing circuit (Fig. 3, 106) has at least one input connected to a measurement source (Fig. 3, Data Source 1… Data Source N, the connection via path 128) and the electronic monitoring circuit (Fig. 3, 108) has an input connected to said measurement source (via 130) wherein the electronic monitoring circuit (Fig. 3, 112) has an input connected to said output of the electronic computing circuit (Fig. 3, 106, the connection via path 134), is programmed to develop a second detail layer, incorporates the critical information in the second detail layer. Naimer et al. fails to teach use the second detail layer as a mask applied to the image signal to obtain a result signal, and verifies that the result signal corresponds to the second detail layer. However, Gyllensward discloses a visual display module in which a checksum of a supervised region of each image frame is computed based on a display drive signal, while excluding at least one element in the pixel value range from contributing to the checksum. Gyllensward teaches selectively excluding pixel values or pixel positions from checksum verification of a display signal (See Gyllensward, Abstract; paras. [0012]–[0020], [0057]–[0065]). Gyllensward further teaches a colour filter and a bitmask filter that exclude selected pixel values or pixel positions from checksum computation, thereby providing a verification mechanism that focuses on relevant portions of the display while ignoring non-critical portions. It would have been obvious to one of ordinary skill in the art at the time the invention was made to modify the display anomaly detection system of Naimer et al. using the selective checksum/filtering approach of Gyllensward in order to improve verification of the embedded safety pattern and the corresponding critical display information, while excluding non-critical display portions from the verification process. The combination would have yielded the predictable result of a display system capable of verifying critical image content using a masked or filtered integrity check. Regarding claim 3, Naimer et al. teach a system (Fig. 3) for displaying critical and non-critical information on a screen (Fig. 3, 128), the system comprising, in one same housing, an output of which is connected to the screen, at least one electronic computing circuit (Fig. 3, 106+110) and one electronic monitoring circuit (Fig. 3, 108+112), wherein the electronic computing circuit is programmed to process the critical information to be displayed incorporates the critical information to be displayed in a first detail layer combined with at least one back ground detail layer to form the image to be displayed in order to form, on an output of the electronic computing circuit, an image signal intended to be transmitted to the screen (paragraphs 26 and 27); wherein the electronic computing circuit (Fig. 3, 106)transmits to the electronic monitoring circuit (Fig. 3, 112) the critical information to be displayed; wherein the electronic monitoring circuit has an input connected to said output of the electronic computing circuit (106 connects with 112 via 134), and is programmed to develop a second detail layer, incorporates the critical information in the second detail layer. Naimer et al. fail to teach use the second detail layer as a mask applied to the image signal to obtain a result signal and verifies that the result signal corresponds to the second detail layer. However, Gyllensward discloses a visual display module in which a checksum of a supervised region of each image frame is computed based on a display drive signal, while excluding at least one element in the pixel value range from contributing to the checksum. Gyllensward teaches selectively excluding pixel values or pixel positions from checksum verification of a display signal (See Gyllensward, Abstract; paras. [0012]–[0020], [0057]–[0065]). Gyllensward further teaches a colour filter and a bitmask filter that exclude selected pixel values or pixel positions from checksum computation, thereby providing a verification mechanism that focuses on relevant portions of the display while ignoring non-critical portions. It would have been obvious to one of ordinary skill in the art at the time the invention was made to modify the display anomaly detection system of Naimer et al. using the selective checksum/filtering approach of Gyllensward in order to improve verification of the embedded safety pattern and the corresponding critical display information, while excluding non-critical display portions from the verification process. The combination would have yielded the predictable result of a display system capable of verifying critical image content using a masked or filtered integrity check. Regarding claims 9-11, Naimer et al. further teach aircraft equipped with at least one screen to which the output of a display system is connected (Abstract). Regarding claims 12-14, the limitations of the claims are rejected for the same reasons as set forth in the rejections of claims 1-3 above, respectively. Further, the recited conditional clause, “if the result signal corresponds to the first detail layer received through the input, the other information is concealed and, if not, the critical information has been altered, and the electronic monitoring unit emits an alert,” merely recites the expected operational consequence of the comparison performed by the monitoring circuit. Naimer et al. disclose determining whether anomalies or graphical errors are present in a simultaneously displayed underlay/overlay image arrangement and responding accordingly. Gyllensward discloses comparing a computed checksum with an expected value and generating an error signal when the comparison fails. Accordingly, the claimed conditional result of correspondence or non-correspondence would have been an obvious and predictable outcome of the combined teachings. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Filliatre et al. (US PGPUB 2009/0243893) teaches a method of coding the pixels of a color digital image comprising critical symbols represented by critical pixels, each colored pixel being coded on three digital components each comprising the same number of bits. The components of the critical pixels comprise on the one hand color information and on the other hand a marker also called a "tag" coded on at least one bit, said marker being intended to be utilized by functions for generating and predicting the critical symbols (Abstract). Any inquiry concerning this communication or earlier communications from the examiner should be directed to BENNY QUOC TIEU whose telephone number is (571)272-7490. The examiner can normally be reached Monday-Friday. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /BENNY Q TIEU/Supervisory Patent Examiner, Art Unit 2682
Read full office action

Prosecution Timeline

Oct 27, 2023
Application Filed
May 29, 2025
Non-Final Rejection mailed — §103
Sep 17, 2025
Response Filed
Jan 22, 2026
Final Rejection mailed — §103
Mar 23, 2026
Response after Non-Final Action
Apr 22, 2026
Request for Continued Examination
May 04, 2026
Response after Non-Final Action
Jun 10, 2026
Non-Final Rejection mailed — §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
21%
Grant Probability
21%
With Interview (+0.4%)
2y 10m (~1m remaining)
Median Time to Grant
High
PTA Risk
Based on 62 resolved cases by this examiner. Grant probability derived from career allowance rate.

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