DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Drawings
The drawings are objected to because:
Fewer than all letters, numbers, and reference characters measure at least 1/8 inch in height as required by 37 CFR 1.84(p)(3).
Views are not “grouped together and arranged on the sheet(s) without wasting space” as required by 37 CFR 1.84(h).
Some numbers, letters, and reference characters mingle with the lines. See 37 CFR 1.84(p)(3), which recites “Numbers, letters, and reference characters … should not be placed in the drawing so as to interfere with its comprehension. Therefore, they should not cross or mingle with the lines.”
Figure 7 should be designated by a legend such as --Prior Art-- because only that which is old is illustrated. See MPEP § 608.02(g).
Fig. 7 appears devoid of reference characters. Without reference characters, the relationship (if any) between the timing of Fig. 8 and the structure of Fig. 7 is unclear. For example, it is unclear which signal in Fig. 8 corresponds to which line in Fig. 7.
The Examiner objects to Fig. 9 as a duplicate of Fig. 8.
The Examiner objects to Fig. 16 as a duplicate of Fig. 15.
Solid black shading is not permitted. See 37 CFR 1.84(m). See Fig. 17, for example.
It is unclear what is illustrated in Fig. 17. For example, the meaning of numbers in black boxes is unclear. Furthermore, the meaning(s) of vertical dot-dash lines is unclear. Moreover, the meaning of a horizontal line near the bottom of Fig. 17 is unclear. No relationship is apparent between con(M3) and any depicted structure, nor between con(M4) and any depicted structure.
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(4) because reference characters "FD" and "NSL1" and "NSL2" and "con(M3)" and "con(M4)" appear to have all been used to designate a total frequency division control signal.
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(4) because reference characters “Scan(i)” and “Nscan(i)” have both been used to designate a stage transmission signal.
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(4) because reference characters “Scano(2)” and “Nscano(i)” have both been used to designate a gate control signal.
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(4) because reference character “T17” has been used to designate both an N-type transistor connected to a first node P (see Fig. 2) and a P-type transistor connected to a second node Q (see Fig. 3).
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Specification
The disclosure is objected to because of the following informalities:
In [0025], the SPEC recites “as shown in FIG. 1, the gate driving module10 includes a frequency division signal line FDL and a plurality of cascaded gate driving circuits 20”. This is inconsistent with the appearance of Fig. 1, which is devoid of reference character FDL and includes only a single reference character 20.
In [0029], the SPEC recites “the frequency division unit”. It is unclear which disclosed structure is meant by this recitation.
In [0068], the SPEC recites “a first transistor T4, a second transistor T6 and a third transistor T7 arranged in series”. This is inconsistent with the non-series appearance of first transistor T4 and second transistor T6 in Fig. 2.
In [0068], the SPEC recites “a fourth transistor T13, a fifth transistor T1 and a sixth transistor T2 arranged in series”. This is inconsistent with the non-series appearance of fourth transistor T13 and fifth transistor T1 in Fig. 2.
In [0186], the SPEC recites “taking FIG. 6 as an example, the NScano2 signal and NScano1 signal in FIG. 8 respectively represent the signals loaded on the gates of M3 and M4 (both P-type transistors) in FIG. 6.” This is inconsistent with [0089] “FIG. 8, which is a timing diagram corresponding to the pixel driving circuit 302 in FIG. 7” (emphasis added).
In [0089], the SPEC recites “as shown in FIG. 8… a write frame WF of the display panel may include a first restoration phase tim1, a second restoration phase tim2, a data writing stage tim3 and a lighting phase tim4”. This is inconsistent with the absence of reference characters “tim1… tim2… tim3… tim4” in Fig. 8.
In [0090], the SPEC recites “In the first restoration phase tim1, the initialization transistor M7 and the reset transistor M8 are turned on based on the corresponding EMo2 signal”. This is inconsistent with the appearance of Figs. 7-8. Fig. 7 is devoid of transistor reference characters M7 and M8, and Fig. 8 is devoid of reference character tim1.
In [0186], the SPEC recites “total frequency division control signal FD in the two NScan circuits”. This is inconsistent with the absence of any NScan circuits in Figs. 6, 8, and 17.
In [0117], the SPEC recites “it can be seen with reference to FIG. 2 and FIG. 10 that if the stage transmission signal NScan(i-1) generated by the upper-stage is always at low level (excluding effective high voltage pulses), it can be considered that the second node and the node D is always maintained at a low voltage”. This is inconsistent with the non-always-low appearance of NScan(i-1) in Fig. 10. This is further inconsistent with the non-always low appearance of nodes Q and D in Fig. 10.
In [0117], the SPEC recites “to always turn on the second stage transmission transistor T9”. This is inconsistent with the appearance of Fig. 2, wherein VGL appears capable of turning off T12, thus interrupting electrical conductivity between node D and a gate of T9.
In [0118], the SPEC recites “it can be seen with reference to FIG. 2 and FIG. 10 that if the third frequency division transistor T17 is in the off period (that is, the second frequency division control signal FD2 is at its higher voltage)”. This is inconsistent with the absence of FD2 in Fig. 2 and in Fig. 10.
In [0144], the SPEC recites “the stage transmission signal generated by each first gate driving circuit2001 may be controlled to have stage transmission effective pulses (stage transmission continuously acting on the second gate driving circuit 2002), and the generated gate control signal does not have a gate effective pulse (such as NScan(1) to NScan(2) in FIGS. 12 to 13, NScan(3) to NScan(4) in FIGS. 14 to 15, NScan(1) to NScan(4) in FIG. 16).” It is unclear whether a frequency division control signal is controlled to generate effective pulses, rather than a stage transmission signal being controlled to generate effective pulses. Furthermore, Figs. 12-16 appear devoid of NScan(1), NScan(2), etc.
A description of Fig. 16 in [0174] is inconsistent with the appearance of Fig. 16. For example, in [0174] the SPEC recites “within the Frame 1 to the Frame 4, it may be set as: NScano(1) to NScano(2) have gate effective pulses pl only in the Frame 1”; however, see effective pulses of NScano(1) to NScano(2) in Frame 3. In [0174] the SPEC further recites “NScano(3) to NScano(4) have gate effective pulses pl in the Frame 1 and Frame 3”; however, see absence of any effective pulses of NScano(3) to NScano(4) in Frame 3.
In [0185], the SPEC recites “As shown in FIG. 17… the frequency division control signal FD may be set to control the corresponding gate effective pulse to be generated before the corresponding data string appears”. This is inconsistent with the absence of FD in Fig. 17.
In [0075], the SPEC recites “the third node control unit”. It is unclear to which structure this recitation refers, there being no antecedent and no reference character for “the third node control unit”.
Appropriate correction is required.
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
The following guidelines illustrate the preferred layout for the specification of a utility application. These guidelines are suggested for the applicant’s use.
Arrangement of the Specification
As provided in 37 CFR 1.77(b), the specification of a utility application should include the following sections in order. Each of the lettered items should appear in upper case, without underlining or bold type, as a section heading. If no text follows the section heading, the phrase “Not Applicable” should follow the section heading:
(a) TITLE OF THE INVENTION.
(b) CROSS-REFERENCE TO RELATED APPLICATIONS.
(c) STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT.
(d) THE NAMES OF THE PARTIES TO A JOINT RESEARCH AGREEMENT.
(e) INCORPORATION-BY-REFERENCE OF MATERIAL SUBMITTED ON A READ-ONLY OPTICAL DISC, AS A TEXT FILE OR AN XML FILE VIA THE PATENT ELECTRONIC SYSTEM.
(f) STATEMENT REGARDING PRIOR DISCLOSURES BY THE INVENTOR OR A JOINT INVENTOR.
(g) BACKGROUND OF THE INVENTION.
(1) Field of the Invention.
(2) Description of Related Art including information disclosed under 37 CFR 1.97 and 1.98.
(h) BRIEF SUMMARY OF THE INVENTION.
(i) BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWING(S).
(j) DETAILED DESCRIPTION OF THE INVENTION.
(k) CLAIM OR CLAIMS (commencing on a separate sheet).
(l) ABSTRACT OF THE DISCLOSURE (commencing on a separate sheet).
(m) SEQUENCE LISTING. (See MPEP § 2422.03 and 37 CFR 1.821 - 1.825). A “Sequence Listing” is required on paper if the application discloses a nucleotide or amino acid sequence as defined in 37 CFR 1.821(a) and if the required “Sequence Listing” is not submitted as an electronic document either on read-only optical disc or as a text file via the patent electronic system.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are:
“a stage transmission unit”,
“an output unit”,
“a stage transmission frequency division control unit”,
“an output frequency division control unit”,
“a first node control unit”
“a second node control unit”
“a fourth node control unit”.
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
Claim Objections
Claims 15 and 17 are objected to because of the following informalities:
Claim 15 recites “the plurality of sub-pixels comprise”. This is grammatically incorrect. The Examiner suggests --the plurality of sub-pixels comprises--.
Claim 15 recites “the plurality of first sub-pixels form”. This is grammatically incorrect. The Examiner suggests --the plurality of first sub-pixels forms--.
Claim 15 recites “the plurality of second sub-pixels form”. This is grammatically incorrect. The Examiner suggests --the plurality of second sub-pixels forms--.
Claim 17 recites “the forth node” in lines 2-3. No “forth node” has been previously recited. The Examiner suggests -- the fourth node --.
A similar recitation in claim 18 is previously objectionable.
A similar recitation in claim 19 is previously objectionable.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Independent claim 1 recites “a signal from the third node” and “the signal from the one of the first node and the second node”. It is unclear whether the limitation “the signal” refers to the same signal as earlier recited, or to a different signal. If different, then the limitation “the signal from the one of the first node and the second node” lacks sufficient antecedent basis.
A similar recitation in independent claim 13 is similarly indefinite.
Independent claim 13 recites “gate control signals output from the cascaded gate driving circuits”. This is inconsistent with “an output unit … configured to output a gate control signal” (rather than a gate driving circuit outputting a gate control signal) earlier recited in independent claim 13.
Claim 3 recites “a gate of the first frequency division transistor is connected to the first frequency division signal line”. This appears misdescriptive of Figs. 2 and 3, wherein T20 appears capable of disconnecting a gate of T18 from FDL 1.
A similar recitation in claim 14 is similarly misdescriptive.
Claim 3 recites “the first frequency division control signal is configured to control the third node to be electrically connected to or disconnected from … the second node.” This is misdescriptive of Fig. 3, wherein T17 appears capable of disconnecting node S from node Q under the control of FDL 2, regardless what signal might happen to appear on FDL1.
A similar recitation in claim 14 is similarly misdescriptive.
A similar recitation in claim 17 is similarly misdescriptive.
A similar recitation in claim 18 is similarly misdescriptive.
A similar recitation in claim 19 is similarly misdescriptive.
Claim 9 recites “the source of the first frequency division transistor … electrically connected to the second node”. This is misdescriptive of Fig. 3, wherein T18 is connected to 4th node R, rather than to 2nd node Q.
Claim 11 recites “a source of the seven transistors is loaded with the clock signal”. This limitation is misdescriptive of Fig. 2, wherein transistors T5 and T14 appear to have sources loaded with clock signal CKL1; however, T4 has its gate loaded with clock signal CKL1. Furthermore, it is noted by the Examiner that fourth node control unit 20111 in Fig. 2 appears to comprise five transistors, rather than seven transistors.
Claim 11 recites “a drain of the first transistor is electrically connected to a gate of the second transistor”. This is misdescriptive of Fig. 2, wherein T11 appears capable of electrically disconnecting a drain of T4 from a gate of T6.
Claim 11 recites “a gate of the first transistor is loaded with the clock signal… a source of the second transistor and a gate of the third transistor are both loaded with the clock signal”. This is misdescriptive of Fig. 2, wherein a gate of T4 appears to be loaded with CKL1, but a source of T6 and a gate of T7 appear to be loaded with CKL2 (rather than CKL1).
Claim 11 recites “a drain of the fourth transistor is electrically connected to the second node”. This is misdescriptive of Fig. 2, wherein T12 appears capable of electrically disconnecting a drain of T13 from node Q.
Claim 11 recites “a drain of the sixth transistor is loaded with the clock signal”. Which clock signal?
Claim 11 recites “a gate of the sixth transistor is loaded with the stage transmission signal generated by the upper-stage gate driving circuit”. This appears misdescriptive of Fig. 2, wherein T14 and T15 appear capable of preventing a gate of T2 from being loaded with Nscan(i-1).
Claim 12 recites “a gate of the tenth transistor is loaded with the clock signal”. Which clock signal?
Claim 12 recites “a drain of the tenth transistor is electrically connected to the gate of the sixth transistor”. This appears misdescriptive of Fig. 2, wherein T15 appears capable of preventing electrical connection between a drain of T14 and a gate of T2.
Claim 15 recites “the plurality of the cascaded gate driving circuits comprise a plurality of cascaded first gate driving circuits and a plurality of cascaded second gate driving circuits cascaded after the plurality of the cascaded first gate driving circuits”. It is unclear whether all second gate driving circuits are cascaded after all first gate driving circuits, or whether each second gate driving circuit is cascaded after a corresponding first gate driving circuit.
Claim 20 recites “a period of effective action”. The meaning of this limitation is unclear. The limitation “effective action” is not a term of art, nor is the limitation subject to a special definition in the SPEC.
Claim 20 recites “when gate control signals … do not comprise gate effective pulses, the clock signal is identically equal … during a period of effective action”. It is unclear in what sense “action” could possibly be construed as “effective” during the absence of any “gate effective pulses”.
Other pending claims are indefinite by virtue of dependency form at least one indefinite claim.
Regarding claims 1-20: In the absence of a reasonably definite interpretation of a claim, it is improper to rely on speculative assumptions regarding the meaning of a claim and then base a rejection under 35 U.S.C. 103 on these assumptions (In re Steele, 305 F.2d 859,134 USPQ 292 (CCPA 1962)). See MPEP 2143.03.
Conclusion
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Julie Anne Watko whose telephone number is (571)272-7597. The examiner can normally be reached Monday-Tuesday 9AM-5PM, Wednesday 10:30AM-5PM, Thursday-Friday 9AM-5PM, and occasional Saturdays.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ke Xiao can be reached at 571-272-7776. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
JULIE ANNE WATKO
Primary Examiner
Art Unit 2627
/Julie Anne Watko/Primary Examiner, Art Unit 2627
02/04/2026