DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-7, 12, 18, 20-26, 30, 31, 33, 35, 37-39 and 41 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
The claimed limitation “…on an optional single-crystalline substrate” in claim 1 and “…an optional substrate layer” in claim 18 are indefinite. The examiner cannot determine if a substrate is a required part of the claimed apparatus and method. For the purpose of examination, the examiner will interpret the claims to not require a substrate.
Claims 2-7, 12, 20-26, 30, 31, 33, 35, 37-39 and 41 are also rejected because they inherit the limitations of claims 1 and 18 from which they depend
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-7, 12, 18, 20-26, 30, 31, 33, 35, 37-39 and 41 are rejected under 35 U.S.C. 103 as being unpatentable over Han et al. (US PG Pub 2015/0303655).
Regarding claim 1, Han et al. disclose: a multilayer structure (215) comprising a plurality of undoped or low n-doped layers (212) of a III-nitride material, wherein the multilayer structure comprises at least one layer of an n-doped III-nitride material (222) which is present between at least two layers of undoped or low doped III-nitride (212) (Fig. 2A, [0051], [0052]) and the n-doped III-nitride(222) contains at least a region or portion that is porous or electropolished due to electrochemical etching (layer 22 partially etched away in Fig. 2J), and wherein the at least one layer of n-doped III-nitride, when porous, comprises a plurality of pores within the n-doped III-nitride layer that are confined by adjacent undoped or low n-doped III-nitride layers that are non-porous or substantially non-porous (layer 222 is confined by layers 212 that are non-porous) (Fig. 2H and 2J, [0073]).
Han et al. do not disclose: indium phosphide or gallium arsenide layers present on an optional single-crystalline substrate formed of indium phosphide, gallium arsenide, sapphire, silicon, or silicon carbide; n-doped indium phosphide or gallium arsenide, undoped or low doped indium phosphide or gallium arsenide.
However, In accordance with MPEP 2144.07, Art Recognized Suitability for an Intended Purpose: The selection of a known material based on its suitability for its intended use supported a prima facie obviousness determination in Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945), see also In re Leshin, 227 F.2d 197, 125 USPQ 416 (CCPA 1960). Therefore, it would have been obvious to one of ordinary skill in the art at the time of the invention to use known materials such as indium phosphide or gallium arsenide for the n-doped and undoped layers based on its suitability for the device.
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Fig. 2A of Han
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Fig. 2J of Han
Regarding claim 2, Han as modified disclose: wherein the plurality of undoped or low doped indium phosphide or gallium arsenide layers are indium phosphide layers and the at least one layer of an n-doped indium phosphide or gallium arsenide is made of indium phosphide (see the rejection of claim 1).
Regarding claim 3, Han as modified disclose: wherein the plurality of undoped or low doped indium phosphide or gallium arsenide layers are gallium arsenide layers and the at least one layer of an n-doped indium phosphide or gallium arsenide is made of gallium arsenide (see the rejection of claim 1).
Regarding claim 4, Han as modified disclose: wherein the plurality of undoped or low doped indium phosphide or gallium arsenide layers are undoped (undoped layers 212) (Han, Fig. 2A, [0051], [0052]).
Regarding claim 5, Han as modified disclose: wherein the plurality of undoped or low doped indium phosphide or gallium arsenide layers are low n-doped having an n-dopant concentration at or below 1-50×1017 cm−3 (undoped layers 212) (Han, Fig. 2A, [0051], [0052]).
Regarding claim 6, Han as modified disclose: wherein the at least one layer of n-doped indium phosphide or gallium arsenide has an n-dopant concentration of at least about 1×1019 cm−3; or in a range of between about 0.1 to 10×1019 cm−3 to 10×1020 cm−3 (8×1018 cm−3 and approximately 5×1019 cm−3) (Han, Fig. 2A, [0051], [0052]).
Regarding claim 7, Han as modified do not disclose: wherein the at least one layer of n-doped indium phosphide or gallium arsenide, when porous, has a porosity of at least about 30%, 40%, 50%, 60%, 70%, 80%, or 90%.
However, In accordance with MPEP 2144.05 II, Optimization of Ranges: Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation. In the prior art the general conditions are disclosed, a multilayer structure comprising n-doped indium phosphide or gallium arsenide layers that are porous. Therefore, it would have been obvious to one of ordinary skill in the art at the time of the invention to obtain a workable range of values for the porosity of the layers by routine experimentation.
Regarding claim 12, Han as modified disclose: wherein a refractive index contrast (Δn) is present between the porous or electropolished at least one layer of n-doped indium phosphide and the undoped or low doped indium phosphide layers and is in a range of about 0.5 to about 2 (Δn between air and undoped or low doped indium phosphide layers and is between 0.5 to about 2) (see the rejection of claim 1).
Regarding claim 18, Han as modified disclose: the method comprising the steps of: (a) forming a first layer of undoped or low doped indium phosphide or gallium arsenide above an optional substrate layer, if any (Han, Fig. 2A, [0051], [0052]) ; (b) depositing a second layer of an n-doped indium phosphide or gallium arsenide over the first layer; (c) depositing a third layer of undoped or low doped indium phosphide or gallium arsenide above the second layer; (d) optionally repeating steps (b) and (c) to form additional alternating layers the n-doped indium phosphide or gallium arsenide and the undoped or low doped indium phosphide or gallium arsenide (Han, Fig. 2A, [0051], [0052]); (e) depositing a capping layer (290) over the entire multilayer structure; (f) removing at least a portion of the capping layer to selectively expose at least one sidewall (292, 294) of the multilayer structure; and (g) electrochemically (EC) etching n-doped indium phosphide or gallium arsenide layers in the presence of an electrolyte and under an applied bias voltage to selectively porosify or electropolish at least a portion of the n-doped indium phosphide or gallium arsenide layers present (Han, Fig. 2J, [0064], [0071], [0073]); wherein the n-doped indium phosphide or gallium arsenide layers, when porosified, comprise a plurality of pores within the n-doped indium phosphide or gallium arsenide layer that are confined by adjacent undoped or low n-doped indium phosphide or gallium arsenide layers that are non-porous or substantially non-porous (Han, Fig. 2J, [0064], [0071], [0073]).
Regarding claim 20, Han as modified disclose: wherein the capping layer is made of silicon dioxide, silicon nitride (SiNx), hafnium oxide (HfO2), or a photoresist material (photoresist) (Han, Fig. 2J, [0064], [0071], [0073]).
Regarding claim 21, Han as modified disclose: wherein the undoped or low doped indium phosphide or gallium arsenide layers present are indium phosphide layers and the n-doped indium phosphide or gallium arsenide layers present are made of indium phosphide (see the rejection of claim 1).
Regarding claim 22, Han as modified disclose: wherein the undoped or low doped indium phosphide or gallium arsenide layers present are gallium arsenide layers and the n-doped indium phosphide or gallium arsenide layers present are made of gallium arsenide (see the rejection of claim 1).
Regarding claim 23, Han as modified disclose: wherein the undoped or low doped indium phosphide or gallium arsenide layers present are undoped (undoped layers 212) (Han, Fig. 2A, [0051], [0052]).
Regarding claim 24, Han as modified disclose: wherein the undoped or low doped indium phosphide or gallium arsenide layers present are low n-doped having an n-dopant concentration at or below 1-50×1017 cm−3 (undoped layers 212) (Han, Fig. 2A, [0051], [0052]).
Regarding claim 25, Han as modified disclose: wherein the n-doped indium phosphide or gallium arsenide layers has an n-dopant concentration of at least about 1×1019 cm−3; or in a range of between about 0.1 to 10×1019 cm−3 to 10×1020 cm−3 (8×1018 cm−3 and approximately 5×1019 cm−3) (Han, Fig. 2A, [0051], [0052]).
Regarding claim 26, Han as modified do not disclose: wherein the n-doped indium phosphide or gallium arsenide layers present, when porosified, have a porosity of at least about 30%, 40%, 50%, 60%, 70%, 80%, or 90%.
However, In accordance with MPEP 2144.05 II, Optimization of Ranges: Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation. In the prior art the general conditions are disclosed, a multilayer structure comprising n-doped indium phosphide or gallium arsenide layers that are porous. Therefore, it would have been obvious to one of ordinary skill in the art at the time of the invention to obtain a workable range of values for the porosity of the layers by routine experimentation.
Regarding claim 30, Han as modified do not disclose: wherein the n-doped indium phosphide or gallium arsenide layers present are doped with an n-type dopant selected from a Ge dopant, Si dopant, or combination thereof.
The examiner takes official notice that an n-type dopant selected from a Ge dopant or Si dopant was well known in the art before the time of filing. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Han as modified by using Ge or Si as an n-type dopant because Ge or Si is known in the art as n-type dopants.
Regarding claim 31, Han as modified do not disclose: wherein the n-type dopant is obtained from a dopant source selected from silane (SiH4), germane (GeH4), isobutylgermane (IBGe), and combinations thereof.
The examiner takes official notice that an n-type dopant source selected from silane (SiH4), germane (GeH4), isobutylgermane (IBGe) was well known in the art before the time of filing. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Han as modified by using silane (SiH4), germane (GeH4), isobutylgermane (IBGe) as dopant source because they are known in the art as n-type dopants sources.
Regarding claim 33, Han as modified do not disclose: wherein the electrolyte in step (g) comprises halide ions, hydrochloric acid (HCl), sulfuric acid (H2SO4), hydrofluoric acid (HF), KOH, NaOH, Ba(OH)2, Ca(OH)2, Sr(OH)2, NH4OH, NaCl, NaF, nitric acid (HNO3), organic acids and their salts (such as oxalic acid and citric acid), and mixtures thereof.
The examiner takes official notice that an electrolyte selected from halide ions, hydrochloric acid (HCl), sulfuric acid (H2SO4), hydrofluoric acid (HF), KOH, NaOH, Ba(OH)2, Ca(OH)2, Sr(OH)2, NH4OH, NaCl, NaF, nitric acid (HNO3), organic acids and their salts (such as oxalic acid and citric acid), and mixtures thereof was well known in the art before the time of filing. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Han as modified by using electrolyte selected from halide ions, hydrochloric acid (HCl), sulfuric acid (H2SO4), hydrofluoric acid (HF), KOH, NaOH, Ba(OH)2, Ca(OH)2, Sr(OH)2, NH4OH, NaCl, NaF, nitric acid (HNO3), organic acids and their salts (such as oxalic acid and citric acid) because they are known in the art to be used for electro-chemical etching.
Regarding claim 35, Han as modified disclose: wherein the applied bias voltage in step (g) is in a range of between about 0.1 to 10 V, 1.0 to 5V, or 1.0 to 2.5V (Han, [0065]).
Han as modified do not disclose: and is applied for at least about 5 min, 10 min, 15 min, 20 min, 25 min, 30 min, 35 min, 40 min, 45 min, 50 min, 55 min, 60 min, 2 hours, 3 hours, 4 hours, 5 hours, 6 hours, 10, hours, 15 hours, 20 hours, or 24 hours.
However, In accordance with MPEP 2144.05 II, Optimization of Ranges: Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation. In the prior art the general conditions are disclosed, electrochemically etching n-type layers under an applied bias voltage for a set amount of time. Therefore, it would have been obvious to one of ordinary skill in the art at the time of the invention to obtain a workable range of values for amount of time by routine experimentation.
Regarding claim 37, Han as modified disclose: a device comprising the multilayer structure of claim 1 (VCSEL) (Han, Fig. 1, [0038]).
Regarding claim 38, Han as modified disclose: wherein the device is selected from the group consisting of light-emitting diodes, field-effect transistors, laser, laser diodes, and biomedical devices (VCSEL) (Han, Fig. 1, [0038]).
Regarding claim 39, Han as modified disclose: wherein the laser diode is a vertical cavity surface emitting laser (VCSEL) and the multilayer structure is a distributed Bragg reflector in the vertical cavity surface emitting laser (Han, Fig. 1, [0038]).
Regarding claim 41, Han as modified disclose: wherein the vertical cavity surface-emitting laser (VCSEL) emits in the near infrared wavelength range and/or the infrared wavelength range (the device as modified emits in the near infrared wavelength range and/or the infrared wavelength range, see the rejection of claim 1).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Kim (US 6,306,672) discloses: a Group III-V complex vertical cavity surface emitting laser (VCSEL) diode manufactured using GaN-system III-V nitride, and a method of manufacturing the same, are provided. The Group III-V complex surface emitting laser diode can obtain a sufficient reflectance even with a small number of pairs of a distributed bragg reflector (DBR), by forming DBRs including air layers. Thus, the crystal growth problem is solved. Also, current confinement and waveguiding are realized by AIN lateral oxidation or etching (Abstract). Han et al. (US 11,043,792) disclose: Structures and methods for forming highly uniform and high-porosity gallium-nitride layers with sub-100-nm pore sizes are described. Electrochemical etching of heavily-doped gallium nitride at low bias voltages in concentrated nitric acid is used to form the porous gallium nitride. The porous layers may be used in reflective structures for integrated optical devices such as VCSELs and LEDs (Abstract). Wunderer et al. (US PG Pub 2013/0050686) disclose: a device includes one or more reflector components. Each reflector component comprises layer pairs of epitaxially grown reflective layers and layers of a non-epitaxial material, such as air. Vias extend through at least some of the layers of the reflector components. The device may include a light emitting layer (Abstract).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to XINNING(TOM) NIU whose telephone number is (571)270-1437. The examiner can normally be reached M-F: 9:30am-6:00pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Minsun Harvey can be reached at 571-272-1835. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/XINNING(Tom) NIU/Primary Examiner, Art Unit 2828
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