DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
Acknowledgement is made of receipt of Information Disclosure Statement(s) (PTO-1449) filed 04/18/2024 and 09/25/2025. An initialed copy is attached to this Office Action.
Response to Amendment
The amendment to Claim(s) 4, 6-13, 18 and 19, and the Specification (Abstract) and the Specification (added National Stage information to the document), filed 11/06/2023, are acknowledged and accepted.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 17 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 17, the phrase " the opposing substrate/the transparent electrode layer" renders the claim indefinite because it is unclear whether the limitation(s) following the phrase are part of the claimed invention. See MPEP § 2173.05(d). For examination purposes, “the opposing substrate/the transparent electrode layer” will be taken as “the opposing substrate [[/]] or the transparent electrode layer”.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-7 and 9-12 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Jeon et al., (hereafter Jeon), (US 2021/0074786 A1), of record.
With respect to Claim 1, Jeon discloses an electrowetting substrate, comprising: a first base (110, Figure 4) as well as a plurality of data lines (171, Figure 1), a plurality of first scan lines (151, Figure 1), a plurality of second scan lines (152, Figure 1), and a plurality of thin film transistors (T1-T5, Figure 1) that are disposed on the first base (110, Figure 4), wherein the first scan lines (151, Figure 1) and the second scan lines (152, Figure 1) are alternately arranged and perpendicularly (see how 151 are arranged, Figure 1) intersect the data lines (171, Figure 1), pixels (PX, Figure 1) are defined by the data lines (171, Figure 1), the first scan lines (151, Figure 1), and the second scan lines (152, Figure 1), and each of the pixels (PX, Figure 1) is internally provided with the thin film transistors (T1-T5, Figure 1); and further comprising: a first metal layer (142, Figure 4), a first dielectric layer (143, Figure 4), a second metal layer (155a, Figure 4), a second dielectric layer (157, Figure 4), and a reflective electrode layer (159, Figure 4) sequentially arranged (see order layers in Figure 4) above the first base (110, Figure 4), wherein the first metal layer (142, Figure 4), the first dielectric layer (143, Figure 4), and the second metal layer (155a, Figure 4) form a first storage capacitor (142, 143, 155a, Figure 4), and the second metal layer (155a, Figure 4), the second dielectric layer (157, Figure 4), and the reflective electrode layer (159, Figure 4) form a second storage capacitor (155a, 157, 159, Figure 4); the thin film transistors (T1-T5, Figure 1) comprise first thin film transistors (T1, Figure 1), second thin film transistors (T2, Figure 1), third thin film transistors (T3, Figure 1), the first thin film transistors (T1, Figure 1) are connected to the first scan lines (151, Figure 1), and both the second thin film transistors (T2, Figure 1) and the thin film transistors (T1-T5, Figure 1) are connected to the second scan lines (152, Figure 1); when the first scan lines (151, Figure 1) are enabled and the second scan lines (152, Figure 1) are disabled, the first storage capacitor (142, 143, 155a, Figure 4) and the second storage capacitor (155a, 157, 159, Figure 4) are connected in series; and when the first scan lines (151, Figure 1) are disabled (C1, C2, Figure 1; the first capacitor and the second capacitor coupled in series, ¶[0099]) and the second scan lines (152, Figure 1) are enabled, the first storage capacitor (142, 143, 155a, Figure 4) stores charge, and the second storage capacitor (155a, 157, 159, Figure 4) is short-circuited (T5, C1, N1, 172, 152, S(n-1), Figure 1; the fifth transistor is connected in parallel to the first capacitor, the first capacitor is short-circuited in the period in which the previous scan signal of the low level is applied to the second scan line, and the second and fifth transistors are turned on, ¶[0063], [0065] and [0070])
With respect to Claim 2, Jeon further discloses wherein the first thin film transistors (T1, Figure 1) are connected between (see Figure 1) the data lines (171, Figure 1) and the first scan lines (151, Figure 1), and are electrically connected (¶[0092]) to the reflective electrode layer (159, Figure 4).
With respect to Claim 3, Jeon further discloses wherein the second thin film transistors (T2, Figure 1) are connected between (see Figure 1) the data lines (171, Figure 1) and the second scan lines (152, Figure 1), and are electrically connected (¶[0092]) to the second metal layer (155a, Figure 4); and the third thin film transistors (T3, Figure 1) are connected between (see Figure 1) the second metal layer (155a, Figure 4) and the second scan lines (152, Figure 1), and are electrically connected (¶[0092]) to the reflective electrode layer (159, Figure 4).
With respect to Claim 4, Jeon further discloses wherein the reflective electrode layer (159, Figure 4) covers the first thin film transistors (T1, Figure 1), the second thin film transistors (T2, Figure 1), and the third thin film transistors (T3, Figure 1).
With respect to Claim 5, the electrowetting substrate according to claim 4, wherein the reflective electrode layer (159, Figure 4) covers entire regions (¶[0099]) of pixel openings of the pixels (PX, Figure 1).
With respect to Claim 6, Jeon further discloses wherein the data lines (171, Figure 1) are disposed on a side (see Figure 1) that is of the first scan lines (151, Figure 1) and the second scan lines (152, Figure 1) and that is away (see Figure 3) from the first base (110, Figure 4), and the second metal layer (155a, Figure 4) and the data lines (171, Figure 1) are arranged in a same layer (see Figures 4 and 5).
With respect to Claim 7, Jeon further discloses wherein the first scan lines (151, Figure 1), the second scan lines (152, Figure 1), and the first metal layer (142, Figure 4) are arranged in a same layer (see Figures 1 and 5).
With respect to Claim 9, Jeon further discloses wherein the first thin film transistor (T1, Figure 1) comprises a first gate (G1, Figure 1), a first source (S1, Figure 1), a first drain (D1, Figure 1), and a first active layer (GN, Figure 1), the first gate (G1, Figure 1) is connected to the first scan line (151, Figure 1), the first source (S1, Figure 1) is connected to the data line, the first drain (D1, Figure 1) and the first source (S1, Figure 1) are arranged in a same layer (see Figure 1) and spaced apart (see Figure 1), the first drain (D1, Figure 1) is electrically connected (¶[0060]) to the reflective electrode layer (159, Figure 4), the first active layer (GN, Figure 1) is connected between the first source (S1, Figure 1) and the first drain (D1, Figure 1), and orthographic projection of the first active layer (GN, Figure 1) on the first gate (G1, Figure 1) at least covers part (see Figure 1) of the first gate (G1, Figure 1).
With respect to Claim 10, Jeon further discloses wherein the second thin film transistor (T2, Figure 1) comprises a second gate (G2, Figure 1), a second source (S2, Figure 1), and a second active layer (GN, Figure 1); and the second gate (G2, Figure 1) is connected to the second scan line (152, Figure 1), the second source (S2, Figure 1) is connected to the data line (171, Figure 1), the second active layer (GN, Figure 1) is connected between the second source (S2, Figure 1) and the second metal layer (155a, Figure 4), and orthographic projection of the second active layer on the second gate (G2, Figure 1) at least covers part (see Figure 1) of the second gate (G2, Figure 1).
With respect to Claim 11, Jeon further discloses wherein the second thin film transistor (T2, Figure 1) comprises a second gate (G2, Figure 1), a third gate (G3, Figure 1), a second source (S2, Figure 1), a second active layer (GN, Figure 1), a third active layer (GN, Figure 1), and a conductor layer (130, Figure 4); and the second gate (G2, Figure 1) and the third gate (G3, Figure 1) are spaced apart and connected to the second scan line (152, Figure 1), the second source (S2, Figure 1) is connected to the data line (one of 171, Figure 1), the conductor layer (130, Figure 4) is disposed between and spaced apart from the second source (S2, Figure 1) and the second metal layer (155a, Figure 4), the second active layer (GN, Figure 1) is connected between the second source (S2, Figure 1) and the conductor layer (130, Figure 4), the third active layer (GN, Figure 1) is connected between the conductor layer (130, Figure 4) and the second metal layer (155a, Figure 4), orthographic projection of the second active layer (GN, Figure 1) on the second gate (G2, Figure 1) at least covers part (see Figure 1) of the second gate (G2, Figure 1), and orthographic projection of the third active layer (GN, Figure 1) on the third gate (G3, Figure 1) at least covers part (see Figure 1) of the third gate (G3, Figure 1).
With respect to Claim 12, Jeon further discloses wherein the third thin film transistor (T3, Figure 1) comprises a fourth gate (G4, Figure 1), a second drain (D2, Figure 1), and a fourth active layer (GN, Figure 1); and the fourth gate (G4, Figure 1) is connected to the second scan line, the second drain (D2, Figure 1) and the second metal layer (155a, Figure 4) are arranged in a same layer and spaced apart (see Figure 1), the second drain (D2, Figure 1) is electrically connected (¶[0060]) to the reflective electrode layer (159, Figure 4), the fourth active layer (GN, Figure 1) is connected between the second metal layer (155a, Figure 4) and the second drain (D2, Figure 1), and orthographic projection of the fourth active layer (GN, Figure 1) on the fourth gate (G4, Figure 1) at least covers part (see Figure 1) of the fourth gate (G4, Figure 1).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jeon (US 2021/0074786 A1), of record, as applied to claim 1 above, and further in view of Neelakantan et al., (hereafter Neelakantan) (US 2015/0205041 A1).
With respect to Claim 8, Jeon teaches the electrowetting substrate according to claim 1, the second metal layer (155a, Figure 4) and the second dielectric layer (157, Figure 4).
Jeon fails to teach wherein a third dielectric layer is further provided between the metal layer and the dielectric layer.
Jeon teaches a display device and Neelakantan teaches electro-optical interconnect on an integrated circuit that can be used in a display.
Neelakantan teaches a plurality of dielectric layers (114, Figure 1b; see also ¶[0019]) is further provided between (metal layers formed in a plurality of dielectric layers, ¶[0019]) a plurality of metal layers (damascene metal layers, ¶[0019]) and the dielectric layer (114, Figure 1b).
Therefore it would have been obvious to one skilled in the art before the effective date of the invention to modify the teachings of Jeon having the electrowetting substrate with the teachings of Neelakantan having a third dielectric layer is further provided between the metal layer and the dielectric layer for the purpose of to provide electrical connections to circuits formed on or in the substrate, ¶[0019].
Claim(s) 13-15, and 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jeon (US 2021/0074786 A1), of record, as applied to claim 1 above, and further in view of Novoselov et al., (hereafter Novoselov) (US 9,953,589).
With respect to Claim 13, Jeon teaches the electrowetting substrate according to claim 1.
Jeon fails to teach an electrowetting display panel, comprising an opposing substrate, at least one electrowetting layer, wherein the opposing substrate is cell-assembled with the electrowetting substrate, and the electrowetting layer is encapsulated between the electrowetting substrate and the opposing substrate.
Jeon teaches a display device and Novoselov teaches an electrowetting display device.
Novoselov teaches an electrowetting display panel (Figure 1), comprising an opposing substrate (118, Figure 1), at least one electrowetting layer (108, 110, 112, 114, 116 and 120, Figure 1), wherein the opposing substrate (118, Figure 1) is cell-assembled with the electrowetting substrate (102, 104 and 106, Figure 1), and the electrowetting layer (108, 110, 112, 114, 116 and 120, Figure 1), wherein the opposing substrate (118, Figure 1) is encapsulated (see Figure 1) between (see Figure 1) the electrowetting substrate (102, 104 and 106, Figure 1) and the opposing substrate (118, Figure 1).
Therefore it would have been obvious to one skilled in the art before the effective date of the invention to modify the teachings of Jeon having the electrowetting substrate with the teachings of Novoselov having an electrowetting display panel, comprising an opposing substrate and at least one electrowetting layer, for the purpose having the ability to present content and other information, column 2, lines 8-9.
With respect to Claim 14, Jeon teaches the electrowetting substrate and the reflective electrode layer (159, Figure 4).
Jeon fails to teach electrowetting display panel, wherein the electrowetting layer comprises a bottom electrowetting layer formed on a surface of the electrode layer of the electrowetting substrate, the bottom electrowetting layer comprises a transparent hydrophobic layer and a plurality of electrowetting units, and the plurality of electrowetting units are arranged on the transparent hydrophobic layer in an array.
Jeon teaches a display device and Novoselov teaches an electrowetting display device.
Novoselov teaches an electrowetting display panel (Figure 1), wherein the electrowetting layer (108, 110, 112, 114, 116 and 120, Figure 1) comprises a bottom electrowetting layer (108, 110, 112, 114, 116 and 120, Figure 1) formed on a surface of the electrode layer (102, Figure 1) of the electrowetting substrate (dielectric layer and metallic contacts over or on a substrate, column 5, lines 30-35), the bottom electrowetting layer (108, 110, 112, 114, 116 and 120, Figure 1) comprises a transparent hydrophobic layer (108 is a hydrophobic layer, column 5, lines 36-38) and a plurality of electrowetting units (112 is non-polar (column 6, line 2-3) and 116 is polar, (column 4, line 24-31)), and the plurality of electrowetting units (112 is non-polar (column 6, line 2-3) and 116 is polar (column 4, line 24-31)) are arranged on the transparent hydrophobic layer (108 is a hydrophobic layer, column 5, lines 36-38) in an array (see Figure 1).
Therefore it would have been obvious to one skilled in the art before the effective date of the invention to modify the teachings of Jeon having the electrowetting substrate with the teachings of Novoselov having an the electrowetting display panel comprising a bottom electrowetting layer formed on a surface of the electrode layer of the electrowetting substrate, the bottom electrowetting layer comprises a transparent hydrophobic layer and a plurality of electrowetting units, and the plurality of electrowetting units are arranged on the transparent hydrophobic layer in an array, for the purpose having the ability to present content and other information, column 2, lines 8-9.
With respect to Claim 15, Jeon teaches the electrowetting substrate and the reflective electrode layer (159, Figure 4).
Jeon fails to teach the electrowetting display panel, wherein the electrowetting units are sandwiched between the transparent hydrophobic layer and the opposing substrate.
Jeon teaches a display device and Novoselov teaches an electrowetting display device.
Novoselov teaches an electrowetting display panel (Figure 1), wherein the electrowetting units (112 is non-polar (column 6, line 2-3) and 116 is polar, (column 4, line 24-31)) are sandwiched between the transparent hydrophobic layer (108 is a hydrophobic layer, column 5, lines 36-38) and the opposing substrate (118, Figure 1).
Therefore it would have been obvious to one skilled in the art before the effective date of the invention to modify the teachings of Jeon having the electrowetting substrate with the teachings of Novoselov having an the electrowetting display panel, wherein the electrowetting units are sandwiched between the transparent hydrophobic layer and the opposing substrate for the purpose of having the ability to present content and other information, column 2, lines 8-9.
With respect to Claim 19, Jeon teaches the electrowetting display panel according to claim 13.
Jeon fails to teach an electrowetting display apparatus, comprising the electrowetting display panel.
Jeon teaches a display device and Novoselov teaches an electrowetting display apparatus.
Novoselov teaches an electrowetting display apparatus (900, Figure 9), comprising (see column 13, lines 18-23) the electrowetting display panel (Figure 1).
Therefore it would have been obvious to one skilled in the art before the effective date of the invention to modify the teachings of Jeon having the electrowetting substrate with the teachings of Novoselov having an electrowetting display apparatus, comprising the electrowetting display panel for the purpose of employing an applied voltage to change the surface tension of a fluid in relation to a surface and color may thus be visible to a user of the display, column 13, line 15- column 14, line 17.
Claim(s) 16 and 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jeon (US 2021/0074786 A1), of record, in view of Novoselov (US 9,953,589) as applied to claim 14 above, and in further view of Stoll et al., (hereafter Stoll) (US 2015/0122785 A1).
With respect to Claim 16, Jeon in view of Novoselov teach the electrowetting display panel according to claim 14, the electrowetting layer, and the reflective electrode layer, the electrowetting layer comprises a transparent electrode layer, a transparent hydrophobic layer, and a plurality of electrowetting units; and in the electrowetting layer, the transparent hydrophobic layer is stacked on the transparent electrode layer, and the plurality of electrowetting units are arranged on the transparent hydrophobic layer in an array.
Jeon in view of Novoselov fail to teach wherein the electrowetting layer further comprises at least one superposed electrowetting layer
Jeon teaches a display device and Novoselov teaches an electrowetting display device, and Stoll teaches a component including a substrate holder that holds a substrate comprising an electrically conductive surface.
Stoll teaches wherein the electrowetting layer (302, Figure 3) further comprises at least one superposed electrowetting layer (a second electrophoretic layer 402, Figure 4, may be formed on or over the carrier 102, Figure 3; see also ¶[0191]).
Therefore it would have been obvious to one skilled in the art before the effective date of the invention to modify the teachings of Jeon in view of Novoselov having the electrowetting substrate with the teachings of Stoll having the electrowetting layer further comprises at least one superposed electrowetting layer, wherein the electrowetting layer further comprises at least one superposed electrowetting layer stacked on a side that is of the bottom electrowetting layer and that is away from the reflective electrode layer; the superposed electrowetting layer comprises a transparent electrode layer, a transparent hydrophobic layer, and a plurality of electrowetting units; and in the superposed electrowetting layer, the transparent hydrophobic layer is stacked on the transparent electrode layer, and the plurality of electrowetting units are arranged on the transparent hydrophobic layer in an array, for the purpose of improved optical density and full color gamut.
With respect to Claim 17, Jeon teaches the electrowetting display panel according to claim 16.
Jeon fails to teach wherein retaining walls are disposed between the transparent hydrophobic layer and the opposing substrate/the transparent electrode layer, the transparent hydrophobic layer, the retaining walls and the opposing substrate/the transparent electrode layer define the electrowetting units and the electrowetting units are filled with polar liquid and non-polar liquid that are immiscible.
Jeon teaches a display device and Novoselov teaches an electrowetting display device.
Novoselov further teaches wherein retaining walls (110, Figure 1) are disposed between the transparent hydrophobic layer (108, Figure 1) and the opposing substrate/the transparent electrode layer, the transparent hydrophobic layer (108, Figure 1), the retaining walls (110, Figure 1), and the opposing substrate/the transparent electrode layer (102, Figure 1) define the electrowetting units (112 and 116, Figure 1), and the electrowetting units (112 and 116, Figure 1) are filled with polar liquid and non-polar liquid (112 is non-polar (column 6, line 2-3) and 116 is polar (column 4, line 24-31)) that are immiscible (column 5, lines 62-66).
Therefore it would have been obvious to one skilled in the art before the effective date of the invention to modify the teachings of Jeon having the electrowetting substrate with the teachings of Novoselov having an the electrowetting display panel comprising a bottom electrowetting layer formed on a surface of the electrode layer of the electrowetting substrate, the bottom electrowetting layer comprises a transparent hydrophobic layer and a plurality of electrowetting units, and the plurality of electrowetting units are arranged on the transparent hydrophobic layer in an array, for the purpose having the ability to present content and other information, column 2, lines 8-9.
Claim(s) 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jeon (US 2021/0074786 A1), of record, in view of Novoselov (US 9,953,589) as applied to claim 13 above, and in further view of Onuma (US 10,605,772).
With respect to Claim 18, Jeon in view of Novoselov teach the electrowetting display panel according to claim 13, the opposing substrate, the common electrode layer.
Jeon in view of Novoselov fail to teach wherein the opposing substrate comprises a second base and a common electrode layer, and the common electrode layer is located on a side that is of the second base.
Jeon teaches a display device and Novoselov teaches an electrowetting display device, and Onuma teaches an analytical tool using electrophoresis.
Onuma teaches wherein the opposing substrate (12, Figure 2) comprises a second base (121, Figure 2) and a common electrode layer (81, Figure 1), and the common electrode layer (81, Figure 1) is located on a side (see Figure 2) that is of the second base (121, Figure 2).
Therefore it would have been obvious to one skilled in the art before the effective date of the invention to modify the teachings of Jeon in view of Novoselov having the electrowetting substrate with the teachings of Onuma having the second base and the second base facing the electrowetting substrate for the purpose of increasing throughput.
Conclusion
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/TYW/Patent Examiner, Art Unit 2872
/STEPHONE B ALLEN/Supervisory Patent Examiner, Art Unit 2872