Prosecution Insights
Last updated: August 18, 2026
Application No. 18/559,654

III-NITRIDE-BASED DEVICES GROWN ON A THIN TEMPLATE ON THERMALLY-DECOMPOSED MATERIAL

Non-Final OA §103
Filed
Nov 08, 2023
Priority
May 10, 2021 — provisional 63/186,749 +3 more
Examiner
YECHURI, SITARAMARAO S
Art Unit
Tech Center
Assignee
The Regents of the University of California
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
77%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allowance Rate
766 granted / 894 resolved
+25.7% vs TC avg
Minimal -9% lift
Without
With
+-8.7%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 0m
Avg Prosecution
39 currently pending
Career history
921
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
61.8%
+21.8% vs TC avg
§102
18.7%
-21.3% vs TC avg
§112
15.3%
-24.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 894 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Allowable Subject Matter Claims 3, 10, 12, 13, 17, 18, 19 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Note: The Examiner notes that all three independent claims do not require that the decomposition layer be in the final device, since 1 is method, claim 21 is product-by-process and although claim 20 is device, the limitations are about how it is created i.e. above a decomposition layer. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 1, 2, 4-9, 11,14-16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yang et al. (CN 103633199 B) hereafter referred to as Yang. Tan et al. (US 20220208848 A1) hereafter referred to as Tan is provided as evidence for claim 2. In regard to claim 1 Yang teaches a method [see “Referring to FIG. 1A-E, the present invention provides a method for preparing vertical structure gallium nitride-based light emitting diode using a sapphire substrate”], comprising: fabricating a III-nitride based device having [see “indium element thin III-nitride alloy layer 202 becomes porous thin III-nitride bonding layer 204”] an in-plane lattice constant or strain that is [see it is decomposed, i.e. very relaxed “using heating annealing the stress modulating structure layer 2 comprises a thin III-nitride alloy layer with an indium component of indium component 202 in heating decomposing and completely separated into porous thin group III nitrogen bonding layer 204”] biaxially relaxed, by: creating a III-nitride based decomposition stop layer [“a low-temperature thin gallium nitride layer 201 of the three-layer structure” “adopting metal organic chemical vapour deposition (MOCVD) process, on the c-plane sapphire substrate 101. orderly preparing growth temperature for a 5nm to 500nm low temperature thin gallium nitride layer thickness of 201 at a low temperature of 550 ℃ to 850 ℃, at a low temperature of 550 ℃ to 850 ℃ to prepare a 5nm to 500nm thick and indium component concentration x is 0.05 to 0.75 the thin indium-gallium-nitrogen (InxGa1-xN) alloy layer 202. with InxGa1-xN same growth temperature for a 5nm to 500nm low temperature thin gallium nitride layer thickness of 201, thereby obtaining a stress modulating structure has layer of the three-layer structure 2”] on or above a III- nitride based [“an indium component thin III-nitride alloy layer 202” “wherein the indium component comprises thin III-nitride alloy layer 202 is limited to InxGa1-xN, InxAl1-xN, InxAlyGa1-x-one, indium component concentration value of x is 0.05 to 0.95, the thickness is 5 to 500nm, the growing temperature is 450 ℃ to 950 ℃, the low temperature thin gallium nitride layer 303 has a thickness of 10 to 500nm, a thin III-nitride alloy layer preparing growth temperature not higher than indium component comprises 202 of growth temperature”] decomposition layer, wherein an increase in temperature [“using heating annealing the stress modulating structure layer 2 comprises a thin III-nitride alloy layer with an indium component of indium component 202 in heating decomposing and completely separated into porous thin group III nitrogen bonding layer 204”] decomposes the III-nitride based decomposition layer; and growing a III-nitride based device structure [“preparing a gallium nitride based light-emitting diode device structure layer 2 on the raising temperature after annealing the stress modulating structure layer 3. The gallium nitride based light emitting diode device structure layer 3 is formed by the first type limiting layer 301, the light emitting layer 302. the second type limiting layer 303 is superposed ...”] on or above the III-nitride based decomposition stop layer but does not state “more than 30%”. However see it is decomposed and porous, i.e. very, very relaxed see “using heating annealing the stress modulating structure layer 2 comprises a thin III-nitride alloy layer with an indium component of indium component 202 in heating decomposing and completely separated into porous thin group III nitrogen bonding layer 204”. The Examiner notes that as the decomposition increases and the number of pores increases, the 204 becomes more relaxed i.e. a result effective variable. It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to use “more than 30%” , since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233 In regard to claim 2 Yang does not specifically state wherein the III-nitride based device structure grown on or above the III-nitride based decomposition stop layer has a peak photoluminescence wavelength increased by at least 50 nm as compared to a III-nitride based device structure grown without the decomposed III-nitride based decomposition layer. See Yang “the luminous layer 302 is composed of GaN, InGaN, AlGaN, InAlN, InAlGaN, GaN/InGaN multiple quantum well, GaN/AlGaN multiple quantum wells, GaN/InAlN multiple quantum well, GaN/InAlGaN multiple quantum well, AlGaN/InGaN multiple quantum well, AlGaN/InAlN multiple quantum wells, AlGaN/InAlGaN multiple quantum well, InGaN/InAlN multiple quantum well, InGaN/InAlGaN multiple quantum well, InAlN/InAlGaN multiple quantum well, GaN quantum dot, InGaN quantum dots, AlGaN quantum point; InAIN quantum dots, one or more material combination of the InAlGaN quantum point; the first type limiting layer 301 is composed of n-type GaN, InGaN, AlGaN, InAlN. one kind or the combination of several materials InAlGaN layer thickness not less than 2 microns, the second type limiting layer 303 is composed of one or combination of several materials of GaN, InGaN, AlGaN, InAlN, InAlGaN, a p-type formed by overlapping”. However see evidence of Tan see paragraph 0151 “FIG. 10C includes a chart 1004 illustrating an example of redshift of an example of a quantum well grown on a porous GaN layer according to certain embodiments. In FIG. 10C, a curve 1060 shows the emission spectrum of an InGaN quantum well grown on a GaN layer, where the central wavelength of the emission spectrum may be about 500 nm. A curve 1062 in FIG. 10C shows the emission spectrum of an InGaN quantum well grown on a porous GaN layer, where the central wavelength of the emission spectrum may be close to 550 nm. With a higher porosity of the porous GaN layer, more indium may be incorporated into the InGaN quantum well grown on the porous GaN layer, and thus the central wavelength of the emission spectrum may be further shifted towards the longer wavelength”. It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to use “wherein the III-nitride based device structure grown on or above the III-nitride based decomposition stop layer has a peak photoluminescence wavelength increased by at least 50 nm as compared to a III-nitride based device structure grown without the decomposed III-nitride based decomposition layer. ”, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233 In regard to claim 4 Yang teaches wherein [“wherein the indium component comprises thin III-nitride alloy layer 202 is limited to InxGa1-xN, InxAl1-xN, InxAlyGa1-x-one, indium component concentration value of x is 0.05 to 0.95, the thickness is 5 to 500nm, the growing temperature is 450 ℃ to 950 ℃, the low temperature thin gallium nitride layer 303 has a thickness of 10 to 500nm, a thin III-nitride alloy layer preparing growth temperature not higher than indium component comprises 202 of growth temperature”] at least one of a temperature, a thickness of the III-nitride based decomposition layer, a thickness of the III-nitride based decomposition stop layer, or an Indium content of the III-nitride based decomposition layer, are tailored so that atoms of the III-nitride based decomposition layer are distributed and the III-nitride based decomposition stop layer forms on or above the III- nitride based decomposition layer with reduced strain. In regard to claim 5 Yang wherein the III-nitride based device structure [“preparing a gallium nitride based light-emitting diode device structure layer 2 on the raising temperature after annealing the stress modulating structure layer 3. The gallium nitride based light emitting diode device structure layer 3 is formed by the first type limiting layer 301, the light emitting layer 302. the second type limiting layer 303 is superposed, the luminous layer 302 is composed of GaN, InGaN, AlGaN, InAlN, InAlGaN, GaN/InGaN multiple quantum well, GaN/AlGaN multiple quantum wells, GaN/InAlN multiple quantum well, GaN/InAlGaN multiple quantum well, AlGaN/InGaN multiple quantum well, AlGaN/InAlN multiple quantum wells, AlGaN/InAlGaN multiple quantum well, InGaN/InAlN multiple quantum well, InGaN/InAlGaN multiple quantum well, InAlN/InAlGaN multiple quantum well, GaN quantum dot, InGaN quantum dots, AlGaN quantum point; InAIN quantum dots, one or more material combination of the InAlGaN quantum point; the first type limiting layer 301 is composed of n-type GaN, InGaN, AlGaN, InAlN. one kind or the combination of several materials InAlGaN layer thickness not less than 2 microns, the second type limiting layer 303 is composed of one or combination of several materials of GaN, InGaN, AlGaN, InAlN, InAlGaN, a p-type formed by overlapping”] on or above the III-nitride based decomposition stop layer includes at least one of an n-type layer, active layer, and p-type layer, and the at least one of the n-type layer, active layer and p-type layer has the in-plane lattice constant or strain [see all the layers above the porous 204 are relaxed, and the structure for each layer is based on the composition i.e. lattice constant as shown above ] that is biaxially relaxed but does not specifically state “more than 50%”. However see it is decomposed and porous, i.e. very, very relaxed see “using heating annealing the stress modulating structure layer 2 comprises a thin III-nitride alloy layer with an indium component of indium component 202 in heating decomposing and completely separated into porous thin group III nitrogen bonding layer 204”. The Examiner notes that as the decomposition increases and the number of pores increases, the 204 becomes more relaxed i.e. a result effective variable. It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to use “more than 50%” , since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233 In regard to claim 6 Yang does not specifically state wherein the at least one of the n-type layer, active layer and p-type layer has the in-plane lattice constant or strain that is 70% or more biaxially relaxed. However see it is decomposed and porous, i.e. very, very relaxed see “using heating annealing the stress modulating structure layer 2 comprises a thin III-nitride alloy layer with an indium component of indium component 202 in heating decomposing and completely separated into porous thin group III nitrogen bonding layer 204” see all the layers above the porous 204 are relaxed, and the structure for each layer is based on the composition i.e. lattice constant as shown above. The Examiner notes that as the decomposition increases and the number of pores increases, the 204 becomes more relaxed i.e. a result effective variable. It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to use “wherein the at least one of the n-type layer, active layer and p-type layer has the in-plane lattice constant or strain that is 70% or more biaxially relaxed” , since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233 In regard to claim 7 Yang does not specifically state wherein the at least one of the n-type layer, active layer and p-type layer has the in-plane lattice constant or strain that is at least 80% biaxially relaxed. However see it is decomposed and porous, i.e. very, very relaxed see “using heating annealing the stress modulating structure layer 2 comprises a thin III-nitride alloy layer with an indium component of indium component 202 in heating decomposing and completely separated into porous thin group III nitrogen bonding layer 204” see all the layers above the porous 204 are relaxed, and the structure for each layer is based on the composition i.e. lattice constant as shown above. The Examiner notes that as the decomposition increases and the number of pores increases, the 204 becomes more relaxed i.e. a result effective variable. It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to use “wherein the at least one of the n-type layer, active layer and p-type layer has the in-plane lattice constant or strain that is at least 80% biaxially relaxed” , since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233 In regard to claim 8 Yang teaches wherein the III-nitride based decomposition layer is grown [see see Fig. 1A “the stress modulating structure layer 2 is a thin group III-nitride alloy layer is formed by a low temperature thin gallium nitride layer 201, an indium composition of 202, a low-temperature thin gallium nitride layer 201 of the three-layer structure is orderly overlapped with each other”] on or above a substrate with a III-nitride based template deposited thereon. In regard to claim 9 Yang teaches wherein the III-nitride based decomposition layer comprises [“wherein the indium component comprises thin III-nitride alloy layer 202 is limited to InxGa1-xN, InxAl1-xN, InxAlyGa1-x-one, indium component concentration value of x is 0.05 to 0.95, the thickness is 5 to 500nm, the growing temperature is 450 ℃ to 950 ℃, the low temperature thin gallium nitride layer 303 has a thickness of 10 to 500nm, a thin III-nitride alloy layer preparing growth temperature not higher than indium component comprises 202 of growth temperature”] InGaN, InAlGaN, InAlN AlGaN, GaN or InN, and has a thickness that is less than 10 nm. In regard to claim 11 Yang teaches wherein the III-nitride based decomposition stop layer [“adopting metal organic chemical vapour deposition (MOCVD) process, on the c-plane sapphire substrate 101. orderly preparing growth temperature for a 5nm to 500nm low temperature thin gallium nitride layer thickness of 201 at a low temperature of 550 ℃ to 850 ℃, at a low temperature of 550 ℃ to 850 ℃ to prepare a 5nm to 500nm thick and indium component concentration x is 0.05 to 0.75 the thin indium-gallium-nitrogen (InxGa1-xN) alloy layer 202. with InxGa1-xN same growth temperature for a 5nm to 500nm low temperature thin gallium nitride layer thickness of 201, thereby obtaining a stress modulating structure has layer of the three-layer structure 2”] has a thickness that is less than 1000 nm. In regard to claim 14 Yang does not state wherein a total thickness of n-type layers in the III-nitride based device structure is less than 1000 nm, however see the Example 1 lower bound “adopting metal organic chemical vapour deposition (MOCVD) process, on the stress adjusting structure layer rising temperature after annealing 2, at a substrate heating temperature of 1000 to 1100 ℃ for a thickness of 1 to 3 [mu] m thick n-type gallium nitride of the first type limiting layer 301”. The Examiner notes that when the n-type and p-type are thickness is decided based on the desired device resistance. It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to use “wherein a total thickness of n-type layers in the III-nitride based device structure is less than 1000 nm ”, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233 In regard to claim 15 Yang teaches wherein the III-nitride based device structure is separated [“step 8, putting the prepared in step 1 to 7 material is inverted, to the flip top and from gallium nitride-based light-emitting diode device structure layer 3 with less mechanical force from the separation of the sapphire substrate 101 along the porous thin group III nitride bonding layer 204 peeling off”] from the decomposed III-nitride based decomposition layer. In regard to claim 16 Yang teaches wherein the III-nitride based device structure is [see the bandgaps of the materials “preparing a gallium nitride based light-emitting diode device structure layer 2 on the raising temperature after annealing the stress modulating structure layer 3. The gallium nitride based light emitting diode device structure layer 3 is formed by the first type limiting layer 301, the light emitting layer 302. the second type limiting layer 303 is superposed, the luminous layer 302 is composed of GaN, InGaN, AlGaN, InAlN, InAlGaN, GaN/InGaN multiple quantum well, GaN/AlGaN multiple quantum wells, GaN/InAlN multiple quantum well, GaN/InAlGaN multiple quantum well, AlGaN/InGaN multiple quantum well, AlGaN/InAlN multiple quantum wells, AlGaN/InAlGaN multiple quantum well, InGaN/InAlN multiple quantum well, InGaN/InAlGaN multiple quantum well, InAlN/InAlGaN multiple quantum well, GaN quantum dot, InGaN quantum dots, AlGaN quantum point; InAIN quantum dots, one or more material combination of the InAlGaN quantum point”] a light-emitting diode (LED) or laser diode (LD) with a peak emission wavelength from 200 nm to 1500 nm. Claim(s) 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yang et al. (CN 103633199 B) hereafter referred to as Yang In regard to claim 20 Yang teaches a [see “Referring to FIG. 1A-E, the present invention provides a method for preparing vertical structure gallium nitride-based light emitting diode using a sapphire substrate”] device, comprising: a III-nitride based device having [see “indium element thin III-nitride alloy layer 202 becomes porous thin III-nitride bonding layer 204”] an in-plane lattice constant or strain that is [see it is decomposed, i.e. very relaxed “using heating annealing the stress modulating structure layer 2 comprises a thin III-nitride alloy layer with an indium component of indium component 202 in heating decomposing and completely separated into porous thin group III nitrogen bonding layer 204”] biaxially relaxed, comprising: a III-nitride based decomposition stop layer [“a low-temperature thin gallium nitride layer 201 of the three-layer structure” “adopting metal organic chemical vapour deposition (MOCVD) process, on the c-plane sapphire substrate 101. orderly preparing growth temperature for a 5nm to 500nm low temperature thin gallium nitride layer thickness of 201 at a low temperature of 550 ℃ to 850 ℃, at a low temperature of 550 ℃ to 850 ℃ to prepare a 5nm to 500nm thick and indium component concentration x is 0.05 to 0.75 the thin indium-gallium-nitrogen (InxGa1-xN) alloy layer 202. with InxGa1-xN same growth temperature for a 5nm to 500nm low temperature thin gallium nitride layer thickness of 201, thereby obtaining a stress modulating structure has layer of the three-layer structure 2”] created on or above a III- nitride based [“an indium component thin III-nitride alloy layer 202” “wherein the indium component comprises thin III-nitride alloy layer 202 is limited to InxGa1-xN, InxAl1-xN, InxAlyGa1-x-one, indium component concentration value of x is 0.05 to 0.95, the thickness is 5 to 500nm, the growing temperature is 450 ℃ to 950 ℃, the low temperature thin gallium nitride layer 303 has a thickness of 10 to 500nm, a thin III-nitride alloy layer preparing growth temperature not higher than indium component comprises 202 of growth temperature”] decomposition layer, wherein the III-nitride based decomposition layer is [“using heating annealing the stress modulating structure layer 2 comprises a thin III-nitride alloy layer with an indium component of indium component 202 in heating decomposing and completely separated into porous thin group III nitrogen bonding layer 204”] decomposed, but not the [“annealing to become high-temperature thin single-crystal gallium nitride template layer 203”] III-nitride based decomposition stop layer; and a III-nitride based device structure [“preparing a gallium nitride based light-emitting diode device structure layer 2 on the raising temperature after annealing the stress modulating structure layer 3. The gallium nitride based light emitting diode device structure layer 3 is formed by the first type limiting layer 301, the light emitting layer 302. the second type limiting layer 303 is superposed ...”] grown on or above the III-nitride based decomposition stop layer but does not state “more than 30%”. However see it is decomposed and porous, i.e. very, very relaxed see “using heating annealing the stress modulating structure layer 2 comprises a thin III-nitride alloy layer with an indium component of indium component 202 in heating decomposing and completely separated into porous thin group III nitrogen bonding layer 204”. The Examiner notes that as the decomposition increases and the number of pores increases, the 204 becomes more relaxed i.e. a result effective variable. It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to use “more than 30%” , since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233 Claim(s) 21 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yang et al. (CN 103633199 B) hereafter referred to as Yang In regard to claim 21 Yang teaches a [see “Referring to FIG. 1A-E, the present invention provides a method for preparing vertical structure gallium nitride-based light emitting diode using a sapphire substrate”] product-by-process, comprising: a III-nitride based device [see “indium element thin III-nitride alloy layer 202 becomes porous thin III-nitride bonding layer 204”] having an in-plane lattice constant or strain that is [see it is decomposed, i.e. very relaxed “using heating annealing the stress modulating structure layer 2 comprises a thin III-nitride alloy layer with an indium component of indium component 202 in heating decomposing and completely separated into porous thin group III nitrogen bonding layer 204”] biaxially relaxed, comprising: a III-nitride based decomposition stop layer [“a low-temperature thin gallium nitride layer 201 of the three-layer structure” “adopting metal organic chemical vapour deposition (MOCVD) process, on the c-plane sapphire substrate 101. orderly preparing growth temperature for a 5nm to 500nm low temperature thin gallium nitride layer thickness of 201 at a low temperature of 550 ℃ to 850 ℃, at a low temperature of 550 ℃ to 850 ℃ to prepare a 5nm to 500nm thick and indium component concentration x is 0.05 to 0.75 the thin indium-gallium-nitrogen (InxGa1-xN) alloy layer 202. with InxGa1-xN same growth temperature for a 5nm to 500nm low temperature thin gallium nitride layer thickness of 201, thereby obtaining a stress modulating structure has layer of the three-layer structure 2”] created on or above a III- nitride based [“an indium component thin III-nitride alloy layer 202” “wherein the indium component comprises thin III-nitride alloy layer 202 is limited to InxGa1-xN, InxAl1-xN, InxAlyGa1-x-one, indium component concentration value of x is 0.05 to 0.95, the thickness is 5 to 500nm, the growing temperature is 450 ℃ to 950 ℃, the low temperature thin gallium nitride layer 303 has a thickness of 10 to 500nm, a thin III-nitride alloy layer preparing growth temperature not higher than indium component comprises 202 of growth temperature”] decomposition layer, wherein the III-nitride based decomposition layer is [“using heating annealing the stress modulating structure layer 2 comprises a thin III-nitride alloy layer with an indium component of indium component 202 in heating decomposing and completely separated into porous thin group III nitrogen bonding layer 204”] decomposed, but not the [“annealing to become high-temperature thin single-crystal gallium nitride template layer 203”] III-nitride based decomposition stop layer; and a III-nitride based device structure [“preparing a gallium nitride based light-emitting diode device structure layer 2 on the raising temperature after annealing the stress modulating structure layer 3. The gallium nitride based light emitting diode device structure layer 3 is formed by the first type limiting layer 301, the light emitting layer 302. the second type limiting layer 303 is superposed ...”] grown on or above the III-nitride based decomposition stop layer; wherein the III-nitride based device having the in-plane lattice constant or strain that is biaxially relaxed is fabricated by: creating the III-nitride based decomposition stop layer [“a low-temperature thin gallium nitride layer 201 of the three-layer structure”] on or above the III- nitride based [“an indium component thin III-nitride alloy layer 202”] decomposition layer, wherein a temperature is increased [“using heating annealing the stress modulating structure layer 2 comprises a thin III-nitride alloy layer with an indium component of indium component 202 in heating decomposing and completely separated into porous thin group III nitrogen bonding layer 204”] to decompose the III-nitride based decomposition layer, but not the [“annealing to become high-temperature thin single-crystal gallium nitride template layer 203”] III-nitride based decomposition stop layer; and growing the III-nitride based device structure [“preparing a gallium nitride based light-emitting diode device structure layer 2 on the raising temperature after annealing the stress modulating structure layer 3. The gallium nitride based light emitting diode device structure layer 3 is formed by the first type limiting layer 301, the light emitting layer 302. the second type limiting layer 303 is superposed ...”] on or above the III-nitride based decomposition stop layer but does not state “more than 30%”. However see it is decomposed and porous, i.e. very, very relaxed see “using heating annealing the stress modulating structure layer 2 comprises a thin III-nitride alloy layer with an indium component of indium component 202 in heating decomposing and completely separated into porous thin group III nitrogen bonding layer 204”. The Examiner notes that as the decomposition increases and the number of pores increases, the 204 becomes more relaxed i.e. a result effective variable. It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to use “more than 30%” , since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233 Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SITARAMARAO S YECHURI whose telephone number is (571)272-8764. The examiner can normally be reached M-F 8:00-4:30 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Britt D Hanley can be reached at 571-270-3042. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SITARAMARAO S YECHURI/ Primary Examiner, Art Unit 2893
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Prosecution Timeline

Nov 08, 2023
Application Filed
Jul 21, 2026
Non-Final Rejection mailed — §103 (current)

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1-2
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