CTNF 18/560,970 CTNF 78498 Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Priority 02-27 AIA Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d). The certified copy has been filed in parent Application No. PCT/JP2022/004257, filed on February 3, 2022, which claims priority benefit of Japanese Patent Application No. JP 2021-093715 filed on June 3, 2021 . 02-26 AIA Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Information Disclosure Statement The information disclosure statement (IDS) submitted on 11/15/2023 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Specification 06-31 AIA The specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification. Claim Objections 07-29-01 AIA Claim s 1, 6, 7, 13, and 14 are objected to because of the following informalities: the phrases like “ predetermined ” and “ determination ” renders the claim unclear because the resulting claim does not clearly set forth the metes and bounds of the patent protection desired . Appropriate correction is required. Claims in a pending application should be given their broadest reasonable interpretation. In re Pearson , 181 USPQ 641 (CCPA 1974) Claim Rejections - 35 USC § 102 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-08-aia AIA (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 07-12-aia AIA (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. 07-15-aia AIA Claim(s) 1 and 4-13 is/are rejected under 35 U.S.C. 102 (a)(1)/(a)(2) as being anticipated by Pacala et al. (WO 2021/026241) . Regarding claims 1 and 13, Pacala et al. discloses a photodetector (e.g., Fig., 1A, 1B, [0069 “… scanning LIDAR system 101… light source 107 and/or detector circuitry 109 can be scanned around one or more fields of view ”]) comprising: a light-emitting section configured to emit a first plurality of light pulses having a predetermined pulse pattern (e.g., Figs., 1A, 1B, 2, 34, 5); a light-receiving element (e.g., Fig., 2; 230) configured to detect a plurality of light pulses (e.g., Fig., 4; [0003 “… A LIDAR system measures the distance to an object by irradiating a landscape with pulses from a laser, and then measuring the time for photons to travel to an object and return after reflection, as measured by a receiver of the LIDAR system. A detected signal is analyzed to detect the presence of reflected signal pulses among background light. A distance to an object can be determined based on a time-of-flight from transmission of a pulse to reception of a corresponding reflected pulse ”]) having a predetermined pulse pattern (e.g., [0006 “… a light source configured to transmit one or more pulse trains over one or more first time intervals as part of an optical measurement ”]); a histogram generation circuit (e.g., Figs., 8, 10, 12, 13, 15, 16, 23, 27, 33, 40) configured to generate a first histogram (e.g., Figs., 6-7; [0007 “… each of the plurality of first registered may accumulate photon counts received during a corresponding one of the plurality of first time bins in each of the one or more first time intervals to represent a histogram of photo counts received during the one or more first time intervals ”]) on a basis of detection timings in the light-receiving element; a filter circuit configured to generate a second histogram on a basis of the first histogram by performing filter processing using a filter coefficient pattern corresponding to the pulse pattern (e.g., [0014 “… plurality of peaks may be sent to the processor without applying a filter to values representing the plurality of peaks…method/system operations may also include applying a low-pass filter to the histogram stored in the plurality of first registers prior to identifying the maximum peaks. The method/system operations may also include applying a matched filter to the histogram stored in the plurality of first registers prior to identifying the maximum peaks, where the matched filter may correspond to the one or more pulse trains ”]); and a representative value calculation circuit (e.g., Figs., 8, 10, 12, 13, 15, 16, 23, 27, 33, 40) configured to calculate a representative value of the detection timings on a basis of the second histogram, wherein the filter circuit is configured to exclude (e.g., [0008 “… the one or more pulse trains are estimated to have been received by the optical measurement system; and excluding photon counts received in the one or more time bins from the total photon count ”]; [0012 “… system may also include a masking circuit configured to cause the peak detection circuit to exclude registers corresponding to peaks identified as maximum peak during a previous execution of the peak detection circuit from being identified as a maximum peak during a subsequent execution of the peak detection circuit ”]; [0014… “ Each execution of the peak detection circuit may be configured to cycle through the plurality of first registers and identify a maximum value in the plurality of first registered that has not been excluded by the masking circuit… method/system operations may also include excluding an initial peak in the pulse trains off a housing of the optical measurement system ”]); from targets of the filter processing, a first frequency value being a maximum value among a first plurality of frequency values in the first histogram (e.g., 2102) or a processing-target histogram being an intermediate histogram corresponding to the first histogram (e.g., Figs., 18, 28, 34, 35, 41, Unscaled Histogram, Scaled Histogram, Saturation Limit, [0006-0007 “… each of the plurality of first registers may accumulate photo counts received during corresponding one of the plurality of first time bins in each of the one or more first time intervals to represent a histogram of photon counts received during the one or more first time intervals… the plurality of second registers may accumulate photon counts received during a corresponding one of the plurality of second time bins ”; [0013-0017 “… Each execution of the peak detection circuit may identify a maximum peak in at least a portion of the histogram. Registers corresponding to peaks identified as a maximum peak during a previous execution of the peak detection circuit may be excluded from being identified as a maximum peak during a subsequent execution of the peak detection circuit… method/system operations may also include applying a matched filter to the histogram stored in the plurality of first registers prior to identifying the maximum peaks, where the matched filter may correspond to the one or more pulse trains… one or more peaks may include a peak corresponding to reflections of the one or more pulse trains and peak that does not correspond to reflections of the one or more pulse trains ”]; [0066 “… various embodiments… improvements can be increased accuracy, reduced noise, and increased energy efficiency ”]). PNG media_image1.png 586 476 media_image1.png Greyscale PNG media_image2.png 602 522 media_image2.png Greyscale Regarding claim 4, Pacala et al. discloses the photodetector according to claim 1, further comprising a setting circuit that sets the first plurality of frequency values being detection targets for the maximum value (e.g., [0011 “… the system may also set a threshold for detecting peaks in the optical measurement using the ambient background noise level. The system may also remove the ambient background noise level from the histogram of photon counts int eh plurality of first registers ”]; [0014, 0017, 0247, 0282]). Regarding claim 5, Pacala et al. discloses the photodetector according to claim 1, wherein the filter circuit includes a first filter circuit and a second filter circuit, the first filter circuit is configured to generate the intermediate histogram by performing first filter processing on a basis of the first histogram, the second filter circuit is configured to generate the second histogram by performing second filter processing on a basis of the intermediate histogram, the processing-target histogram comprises the intermediate histogram (e.g., [0254, 0271, 0293 “… circuit may optionally include a filter 3310 that is used to apply one or more filters to data values stored in the histogram memory 806. These filters may include a low pass filter to smooth transition signals, increase the signal-to-noise ratio (SNR), increase the width of any peaks, and so forth… a matched filter… Any filter 3310 may be applied before, after, or during the operation of the peak detection circuit 3306… may operate on the raw histogram data as received... In some embodiments, the peak detection circuit 3306 may operate on registers in the histogram memory after one or more of the filters 3310 have been applied. Some embodiments may allow the peak detection circuit 3306 to process filtered data, then pass unfiltered data corresponding to the filtered peaks to the off-chip processor 3308 ”]), and the second filter circuit is configured to exclude (e.g., [0008, 0012, 0014]) the first frequency value from targets of the second filter processing. Regarding claim 6, Pacala et al. discloses the photodetector according to claim 1, wherein the filter circuit is configured to exclude (e.g., [0008, 0012, 0014]) the first frequency value from the targets of the filter processing in a case where the first plurality of frequency values satisfies a predetermined determination condition. Regarding claim 7, Pacala et al. discloses The photodetector according to claim 6, wherein the predetermined determination condition comprises a condition indicating a relationship between the first frequency value and one or more frequency values other than the first frequency value among the first plurality of frequency values. Regarding claim 8, Pacala et al. discloses the photodetector according to claim 1, wherein the filter circuit is further configured to exclude (e.g., [0008, 0012, 0014]), from the targets of the filter processing, a second frequency value being a second largest value among the first plurality of frequency values in the processing-target histogram (e.g., Figs., 6, 8, 12, 14, 19, 20, 21, 22, 29, 33, 37, 38, 40). Regarding claim 9, Pacala et al. discloses the photodetector according to claim 1, wherein the light-receiving element is configured to detect the plurality of light pulses in each of a plurality of photodetection periods to be repeatedly set (e.g., [0190 “… an accumulated total of photon counts stored in a register representing a single time bin that is repeatedly populated over a plurality of shots in a measurement ”]), and respective time lengths of the plurality of detection periods are equal to each other (e.g., [0062 “… a measurement time interval (or just “measurement interval), which may equal the N detection interval of a measurement or be longer ”]). Regarding claim 10, Pacala et al. discloses the photodetector according to claim 1, wherein the light-receiving element is configured to detect the plurality of light pulses in each of a plurality of photodetection periods to be repeatedly set (e.g., [0190]), and the plurality of photodetection periods includes a first photodetection period of a first time length and a second photodetection period of a second time length (e.g., [0008, 0119, 0129, 0135, 0140, 0158, 0163-0164, 0166, 0170, 0229, 0278]). Regarding claim 11, Pacala et al. discloses the photodetector according to claim 1, comprising: a plurality of the light-receiving elements (e.g., Figs 2; “ array ,” “ photosensors ,”; 236); and an adder circuit (e.g., [0126 “… the ALU 804 may be implemented with digital logic gates to form a ripple-carry adder, a carry-lookahead adder, a carry-save adder, and/or any other type of adder that can aggregate a relatively large number of inputs with low propagation time ”]), wherein each of the plurality of the light-receiving elements is configured to generate a pulse signal corresponding to a result of a detection, the adder circuit is configured to generate a detection signal corresponding to the number of pulses on a basis of the pulse signal generated by each of the plurality of the light-receiving elements, and the histogram generation circuit is configured to generate the first histogram on a basis of the detection signal (e.g., Figs., 6, 8, 12, 14, 19, 20, 21, 22, 29, 33, 37, 38, 40). Regarding claim 12, Pacala et al. discloses the photodetector according to claim 11, wherein each of the plurality of the light-receiving elements is configured to detect the plurality of light pulses in each of a plurality of photodetection periods to be repeatedly set (e.g., [0190]), and the histogram generation circuit is configured to generate the first histogram by cumulatively add each of a third plurality of frequency values in each of the plurality of photodetection periods, and the histogram generation circuit is configured not to cumulatively add a third frequency value being a maximum value among the third plurality of frequency values in each of the plurality of photodetection periods (e.g., Figs., 6, 8, 12, 14, 19, 20, 21, 22, 29, 33, 37, 38, 40) . Claim Rejections - 35 USC § 103 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 07-21-aia AIA Claim (s) 2, 3, and 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Pacala et al. (WO 2021/026241) . Regarding claims 2, 3, Pacala et al. teaches the photodetector according to claim 1, wherein the filter processing includes respectively multiplying a second plurality of frequency values in the processing-target histogram by a plurality of filter coefficients included in the filter coefficient pattern, and performing a calculation of a result of the multiplication (e.g., [0197-0199 “… a multiplier 2214 for scaling the histogram 2202 stored in the histogram memory after saturation… An auxiliary processor can then scale the values in the histogram… the multiplier 2214 also allows for the calculation of background noise levels and threshold values for peak detection ”]; [0202 “… counting both values, the exposure counter 2306 may also be used to generate a multiplier for scaling the final values in the histogram memory ”], and the first plurality of frequency values comprises a portion of a plurality of frequency values corresponding to the filter coefficient pattern among the second plurality of frequency values. It would have been obvious to one of ordinary skill in the art at the time of the invention to adapt addition to alternatively calculate to increase the accuracy of the photodetector by reducing the background noise via e.g., taking an average, counting values, adding values, Etc. as taught by various embodiments of Pacala et al. because as claim(s) would result from the application of the prior knowledge or art-recognized equivalents to calculate filtering process in a predictable manner i.e., enhance the accuracy of the photodetector. See KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007). Also, the Examiner takes Official Notice of the equivalence of any known mathematical equations to process filtered circuit values for their use in the photodetection-related technology for their use to increase the accuracy of the distance finding and the selection of any of these known equivalents to calculations taught by Pacala et al. would be within the level of ordinary skill in the art. See MPEP 2144. Regarding claim 14, Pacala et al. teaches the same/similar photodetector device as described above satisfying apparatus claimed limitation(s). It would have been obvious to one of ordinary skill in the art at the time of the invention to specify methods with the teachings of Pacala et al. The claim would have been obvious because the technique of using filter(s) and its filter circuit(s) with the photodetector unit in method forms would have been part of the ordinary capabilities of a person of ordinary skill in the art, in view of the teaching of the technique for improvement as taught Pacala et al. to enhance the accuracy, reduce noise, and the like of the photodetection device. See KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007) . Conclusion 07-96 AIA The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Pacala et al. (US 11,105,925) – Accurate photo detector measurements for LiDAR Birnbacher (US 2020/0225333) – Method and device for optical distance measurement vor dem Brocke et al. (US 2021/0027989) – Device and method for filtering multiple pulse signals Nakada (S 2024/0255622) – Photodetector, photodetection system, and photodetection method Any inquiry concerning this communication or earlier communications from the examiner should be directed to JACOB Y CHOI whose telephone number is (469)295-9060. The examiner can normally be reached Mondays - Thursdays from 5:30 a.m. to 3:30 p.m. CT. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JACOB Y CHOI/Supervisory Patent Examiner, Art Unit 2897 Application/Control Number: 18/560,970 Page 2 Art Unit: 2897 Application/Control Number: 18/560,970 Page 3 Art Unit: 2897 Application/Control Number: 18/560,970 Page 4 Art Unit: 2897 Application/Control Number: 18/560,970 Page 5 Art Unit: 2897 Application/Control Number: 18/560,970 Page 6 Art Unit: 2897 Application/Control Number: 18/560,970 Page 7 Art Unit: 2897 Application/Control Number: 18/560,970 Page 8 Art Unit: 2897 Application/Control Number: 18/560,970 Page 9 Art Unit: 2897 Application/Control Number: 18/560,970 Page 10 Art Unit: 2897 Application/Control Number: 18/560,970 Page 11 Art Unit: 2897
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