Prosecution Insights
Last updated: October 02, 2026
Application No. 18/561,206

METHOD FOR PRODUCING WIRING CIRCUIT BOARD ASSEMBLY SHEET

Non-Final OA §102§103§112
Filed
Nov 15, 2023
Priority
May 17, 2021 — JP 2021-083154 +1 more
Examiner
TUGBANG, ANTHONY D
Art Unit
Tech Center
Assignee
NITTO DENKO Corporation
OA Round
1 (Non-Final)
78%
Grant Probability
Favorable
1-2
OA Rounds
7m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 78% — above average
78%
Career Allowance Rate
837 granted / 1080 resolved
+17.5% vs TC avg
Strong +22% interview lift
Without
With
+21.7%
Interview Lift
resolved cases with interview
Typical timeline
3y 6m
Avg Prosecution
23 currently pending
Career history
1120
Total Applications
across all art units

Statute-Specific Performance

§103
64.3%
+24.3% vs TC avg
§102
13.9%
-26.1% vs TC avg
§112
20.4%
-19.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1080 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Interpretation The following is a quotation of 35 U.S.C. 112(f): (f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph: An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. This application includes one or more claim limitations that use the word “means” or “step” but are nonetheless not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph because the claim limitation(s) recite(s) sufficient structure, materials, or acts to entirely perform the recited function. Such claim limitation(s) is/are: In Claim 1, “a marking step” (line 2); and “an insulating layer forming step” (line 3). Because this/these claim limitation(s) is/are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are not being interpreted to cover only the corresponding structure, material, or acts described in the specification as performing the claimed function, and equivalents thereof. If applicant intends to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to remove the structure, materials, or acts that performs the claimed function; or (2) present a sufficient showing that the claim limitation(s) does/do not recite sufficient structure, materials, or acts to perform the claimed function. In this case, each of the steps recite sufficient acts to entirely perform the recited function, e.g. “forming a mark…support board” (line 2), and “forming an insulating layer…with the mark” (lines 3-4). Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 10 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. In Claim 10, the phrase of “where the mark is formed” (line 4) implies that the mark is formed, which contradicts the phrase of “before the marking step” (line 3). Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1 through 4, 6, 7, 9 and 10 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Japanese Patent Publication, JP 2011-171658 (hereinafter “JP’658”)1. Claim 1: JP’658 discloses a method for producing a wiring circuit board assembly sheet (e.g. Fig. 1B) comprising: a marking step of forming a mark (e.g. 28) made of a recessed portion (hole) in a metal support board (e.g. 11), and after the marking step, an insulating layer forming step of forming an insulating layer (e.g. 14A, 14B) on one surface in a thickness direction of the metal support board formed with the mark (e.g. Fig. 3B, ¶ [0027]). Claim 2: JP’658 discloses the method for producing a wiring circuit board assembly sheet according to claim 1, wherein the mark includes a trace mark (e.g. hole 28 with conductive trace 43, ¶ [0073]). Claim 3: JP’658 discloses the method for producing a wiring circuit board assembly sheet according to claim 1, wherein the mark includes an alignment mark (e.g. hole 28). Claim 4: JP’658 discloses the method for producing a wiring circuit board assembly sheet according to claim 2, wherein the mark includes an alignment mark (e.g. another hole 28, Fig. 2A, ¶ [0065]). Claims 6 and 7: JP’658 discloses the method for producing a wiring circuit board assembly sheet according to claims 2, 4, and 3, wherein in the insulating layer forming step, the insulating layer is aligned with the alignment mark as a reference. Claim 9: JP’658 discloses the method for producing a wiring circuit board assembly sheet according to claim 1, wherein the recessed portion is formed by a laser (e.g. ¶ [0036]). Claim 10: JP’658, as best understood, discloses the method for producing a wiring circuit board assembly sheet according to claim 1, wherein before the marking step [before 28 is formed as 11 is rolled], a region where the mark is formed and its periphery are subjected to a surface smoothing treatment (e.g. unrolling 11 to a flat smooth structure in Figs. 2A, 2B, ¶ [0022]). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 5 and 8 are rejected under 35 U.S.C. 103 as being unpatentable over JP’658 in view of U.S. Publication 2013/0232784 to Hida et al (hereinafter “Hida”). JP’658 discloses the claimed manufacturing method as relied upon above, further including that JP’658 meets the limitations of Claim 8 for the same reasons in Claims 6 or 7. JP’658 further teaches forming a trace mark (one hole 28, Fig. 2A) and an alignment mark (another hole 28, in Fig. 2A). JP’658 does not teach that the trace mark and the alignment mark are formed simultaneously. Hida discloses a metal support board (e.g. 53, Fig. 5) in producing a circuit board assembly, where a trace mark (e.g. left Pa, Fig. 6) and an alignment mark (e.g. right Pa, Fig. 6) are formed simultaneously using a mask and etching (e.g. ¶¶ [0060], [0061]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have formed the trace and alignment marks of JP’658 simultaneously, as taught by the method of Hida, to produce a circuit board assembly faster, as opposed to forming each mark individually, one at a time. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. a) Japanese Patent Publication, JP 2019-140286, discloses a method of producing a circuit board assembly including a marking step of forming a mark (e.g. 14, Fig. 3, or 24, Fig. 5) in a metal support board (e.g. 22, see SOLUTION). b) Non-Patent Literature IEEE Publication to Kim et al, entitled "A Simple Low-Cost Electric-Contact-Assisted Alignment Method for Die Stacking on an Interposer or a Printed Circuit Board", discloses a method of producing a circuit board assembly sheet using marks for alignment reference (e.g. Fig. 1, see entire document). Any inquiry concerning this communication or earlier communications from the examiner should be directed to A. DEXTER TUGBANG whose telephone number is (571)272-4570. The examiner can normally be reached Mon - Fri 8:00 am to 5:00 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, THOMAS J. HONG can be reached at 571-272-0993. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /A. DEXTER TUGBANG/ Primary Examiner Art Unit 3729 1 The interpretation of JP’658 was taken from a Machine Translation provided by the examiner, a copy of which is attached herein.
Read full office action

Prosecution Timeline

Nov 15, 2023
Application Filed
Aug 11, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12746404
Methods Of Producing An Electrode Array
4y 6m to grant Granted Sep 29, 2026
Patent 12741475
LIQUID DISCHARGE DEVICE AND ASSEMBLY METHOD FOR LIQUID DISCHARGE DEVICE
2y 12m to grant Granted Sep 22, 2026
Patent 12739982
Methods of Forming Interconnect Circuits Methods
2y 5m to grant Granted Sep 15, 2026
Patent 12733106
System for Attaching a Thermal Interface Material to a Heat Sink
3y 6m to grant Granted Sep 08, 2026
Patent 12726165
METHOD OF MAKING ACOUSTIC WAVE DEVICES WITH MULTI-LAYER PIEZOELECTRIC SUBSTRATE
3y 11m to grant Granted Sep 01, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

1-2
Expected OA Rounds
78%
Grant Probability
99%
With Interview (+21.7%)
3y 6m (~7m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1080 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month