DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
This application includes one or more claim limitations that use the word “means” or “step” but are nonetheless not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph because the claim limitation(s) recite(s) sufficient structure, materials, or acts to entirely perform the recited function.
Such claim limitation(s) is/are:
In Claim 1, “a marking step” (line 2); and “an insulating layer forming step” (line 3).
Because this/these claim limitation(s) is/are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are not being interpreted to cover only the corresponding structure, material, or acts described in the specification as performing the claimed function, and equivalents thereof.
If applicant intends to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to remove the structure, materials, or acts that performs the claimed function; or (2) present a sufficient showing that the claim limitation(s) does/do not recite sufficient structure, materials, or acts to perform the claimed function.
In this case, each of the steps recite sufficient acts to entirely perform the recited function, e.g. “forming a mark…support board” (line 2), and “forming an insulating layer…with the mark” (lines 3-4).
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 10 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
In Claim 10, the phrase of “where the mark is formed” (line 4) implies that the mark is formed, which contradicts the phrase of “before the marking step” (line 3).
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1 through 4, 6, 7, 9 and 10 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Japanese Patent Publication, JP 2011-171658 (hereinafter “JP’658”)1.
Claim 1: JP’658 discloses a method for producing a wiring circuit board assembly sheet (e.g. Fig. 1B) comprising:
a marking step of forming a mark (e.g. 28) made of a recessed portion (hole) in a metal support board (e.g. 11), and
after the marking step, an insulating layer forming step of forming an insulating layer (e.g. 14A, 14B) on one surface in a thickness direction of the metal support board formed with the mark (e.g. Fig. 3B, ¶ [0027]).
Claim 2: JP’658 discloses the method for producing a wiring circuit board assembly sheet according to claim 1, wherein the mark includes a trace mark (e.g. hole 28 with conductive trace 43, ¶ [0073]).
Claim 3: JP’658 discloses the method for producing a wiring circuit board assembly sheet according to claim 1, wherein the mark includes an alignment mark (e.g. hole 28).
Claim 4: JP’658 discloses the method for producing a wiring circuit board assembly sheet according to claim 2, wherein the mark includes an alignment mark (e.g. another hole 28, Fig. 2A, ¶ [0065]).
Claims 6 and 7: JP’658 discloses the method for producing a wiring circuit board assembly sheet according to claims 2, 4, and 3, wherein in the insulating layer forming step, the insulating layer is aligned with the alignment mark as a reference.
Claim 9: JP’658 discloses the method for producing a wiring circuit board assembly sheet according to claim 1, wherein the recessed portion is formed by a laser (e.g. ¶ [0036]).
Claim 10: JP’658, as best understood, discloses the method for producing a wiring circuit board assembly sheet according to claim 1, wherein before the marking step [before 28 is formed as 11 is rolled], a region where the mark is formed and its periphery are subjected to a surface smoothing treatment (e.g. unrolling 11 to a flat smooth structure in Figs. 2A, 2B, ¶ [0022]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 5 and 8 are rejected under 35 U.S.C. 103 as being unpatentable over JP’658 in view of U.S. Publication 2013/0232784 to Hida et al (hereinafter “Hida”).
JP’658 discloses the claimed manufacturing method as relied upon above, further including that JP’658 meets the limitations of Claim 8 for the same reasons in Claims 6 or 7. JP’658 further teaches forming a trace mark (one hole 28, Fig. 2A) and an alignment mark (another hole 28, in Fig. 2A). JP’658 does not teach that the trace mark and the alignment mark are formed simultaneously.
Hida discloses a metal support board (e.g. 53, Fig. 5) in producing a circuit board assembly, where a trace mark (e.g. left Pa, Fig. 6) and an alignment mark (e.g. right Pa, Fig. 6) are formed simultaneously using a mask and etching (e.g. ¶¶ [0060], [0061]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have formed the trace and alignment marks of JP’658 simultaneously, as taught by the method of Hida, to produce a circuit board assembly faster, as opposed to forming each mark individually, one at a time.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
a) Japanese Patent Publication, JP 2019-140286, discloses a method of producing a circuit board assembly including a marking step of forming a mark (e.g. 14, Fig. 3, or 24, Fig. 5) in a metal support board (e.g. 22, see SOLUTION).
b) Non-Patent Literature IEEE Publication to Kim et al, entitled "A Simple Low-Cost Electric-Contact-Assisted Alignment Method for Die Stacking on an Interposer or a Printed Circuit Board", discloses a method of producing a circuit board assembly sheet using marks for alignment reference (e.g. Fig. 1, see entire document).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to A. DEXTER TUGBANG whose telephone number is (571)272-4570. The examiner can normally be reached Mon - Fri 8:00 am to 5:00 pm.
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/A. DEXTER TUGBANG/ Primary Examiner
Art Unit 3729
1 The interpretation of JP’658 was taken from a Machine Translation provided by the examiner, a copy of which is attached herein.