Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments/Amendments
The amendment, filed 01/06/2026 in response to the Non-Final Office Action mailed on 10/28/2025 has been entered.
Claims 1-19 are currently pending in U.S. Patent Application No. 18/562,960.
Applicant’s remarks filed 01/06/2026 have been fully considered and are responded to below.
Regarding the 35 U.S.C. 101 rejection, the Applicant’s remarks have been considered but are not persuasive. The Applicant asserts that the amended claim 1 “articulates a practical application of wafer inspection” and provides a concrete solution by utilizing the combination of an imaging apparatus and visual inspection apparatus including a controller. Assuming, arguendo, that the Applicant’s assertion is true, the amended limitations as presented merely recite utilizing computers/other machinery (i.e., “an imaging apparatus” such as a camera and “a visual inspection apparatus” such as a computer) to perform an existing process and furthermore to perform the claimed judicial exception (i.e., a mental process and a mathematical concept). Merely utilizing computers/other machinery to perform an existing process does not integrate the judicial exception(s) into a practical application or provide an inventive concept (see MPEP 2106.05(f)). Therefore, the 35 U.S.C. 101 rejection is maintained. The Examiner notes the details of the 35 U.S.C. 101 analysis below.
Regarding the 35 U.S.C. 103 rejections, the Applicant’s remarks have been fully considered but are moot because the new grounds of rejection regarding the amended limitation no longer relies on the combination of references presented in the Non-Final Rejection. A change in scope necessitated by the Applicant’s amendments has led to an updated search revealing new art.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-19 are rejected under 35 U.S.C. 101 because the claimed invention is
directed to an abstract idea without reciting elements that amount to significant more than
the abstract idea. The rationale for this rejection, under MPEP § 2106, for this finding is
explained below.
Step 1: Under step 1, the claims are analyzed to determine if the claim is directed to a
process, machine, article of manufacture, or composition of matter. For the claims in question,
claim 1 is directed towards a device (a visual inspection apparatus) and claim 7 is directed towards a process.
Step 2A, Prong 1: Under step 2A, prong 1, the claims are evaluated to determine if the
claim recites a judicial exception, which includes the laws of nature, physical phenomena, or an
abstract idea. Regarding independent claim 1 (and corresponding independent claim 7), the limitation regarding detecting an abnormality on a wafer surface based on an average image is directed towards a mental process. An individual can identify various defects (i.e., a scratch, morphological abnormalities) on a wafer based on an image provided to an individual. Furthermore, the limitation regarding generating a plurality of differential images by differentiation processing and generating an average image is directed towards a mathematical concept. The Examiner specifically notes MPEP 2106.04(a)(2), wherein a mathematical relationship includes organizing information and manipulating information through mathematical correlations (see Digitech Image Techs., LLC v. Electronics for Imaging, Inc., 758 F.3d 1344, 1350, 111 USPQ2d 1717, 1721 (Fed. Cir. 2014)). The term “differentiation processing” is broadly interpreted as computing/performing some type of image derivative (as defined in https://visionbook.mit.edu/derivatives.html) which is defined as a mathematical relationship. Examiner asserts that the process of “generating an average image” is a process of manipulating the image data present in each overall image by computing the average of each pixel value (i.e., mathematical correlations) across all the overall images, in order to generate an average image. The amended language regarding “overlaying the plurality of differential images” does not change this assertion, as regardless of how the images are positioned/oriented, the mathematical calculation of computing the average is still performed.
Step 2A, Prong 2: Under step 2A, prong 2, the claims are evaluated to determine
whether the claim as a whole integrates the recited judicial exception into a practical application
of the exception (see MPEP 2106.04(d)). The examiner notes that MPEP 2106.05(a)-(c) and (e)
generally concern limitations that are indicative of integration, whereas 2106.05(f)-(h) generally
concern limitations that are not indicative of integration.
Regarding independent claims 1 and 7, the remaining limitation regarding generating a plurality of overall images is related to pre-solution activity, as the overall images are used to perform further image processing to determine abnormalities present in the wafer, and does not constitute integration into a practical application or significantly more (see MPEP 2106.05(g)). The addition of specific machines with the claimed “an imaging apparatus” and “a visual inspection apparatus” including a controller are merely limitations which invoke computers/other machinery to perform an existing process, which is not indicative of integration into a practical application or significantly more (see MPEP 2106.05(f)). Both terms are broadly recited, and an imaging apparatus can be interpreted as a camera or image sensor (as noted by [0032] in corresponding US Publication US 2024/0257336) and a visual inspection apparatus can be interpreted as some computing machine (as supported by the structure recited in [0026-0032] in corresponding US Publication US 2024/0257336). Both apparatuses as claimed are performing in their ordinary capacity (i.e., an imaging apparatus is obtaining part images and a visual inspection apparatus is utilizing a controller/processor to perform various image processing techniques (differentiation processing and averaging) to perform detection), and furthermore the claimed apparatuses are being used as a tool to perform the judicial exceptions.
Regarding dependent claims 2-6 and 8-19, the additional limitations as described are broadly recited and either present pre-solution activity and/or are generally linked to the field of performing image processing to identify defects present on a wafer, and do not constitute integration into a practical application or significantly more (see MPEP 2106.05(g),(h)). Furthermore, the limitations regarding the calculation of a difference image (i.e., claim 3) and the detection of abnormalities based on a difference in average luminance (i.e., claim 6) are directed towards a mathematical concept.
The examiner emphasizes MPEP 2106.05(a), which states that a limitation is indicative of integration into a practical application if the limitation identifies a manner in which an improvement is explicitly and specifically achieved and recited in the claims. The current claim language all are recited at a high level of generality which do not serve to integrate the limitations in view of MPEP 2106.05(f), and furthermore nothing precludes the current limitations from being interpreted under the mental processes grouping.
Step 2B: Under step 2B, the claims are evaluated as a whole to determine if it amounts to
significantly more than the recited exception (i.e., whether any additional element, or
combination of additional elements, adds an inventive concept to the claim). The considerations
of step 2A, prong 2 and step 2B overlap, but differ in that 2B also requires considering the claim
as a whole/combination of limitations, and with reference to MPEP 2106.05(d) whether the
claims feature any “specific limitation(s) other than what is well - understood, routine,
conventional activity in the field” (WURC). The Examiner assert that, even when considered in combination, the additional limitations of claims 1-19 are described at a high level of generality that is generally linked to the field of applying image processing techniques to determine a defect/abnormality present on a wafer, and does not provide a specifically recited inventive concept.
The Examiner notes the specifics of claims 5, 11, 15, and 18, regarding the approximation of straight lines and a difference in slope used to specifically identify abnormal pixels in the wafer image. The limitations disclosed in claims 5 and 11 recite a specific and particular method of detecting abnormalities which no longer could reasonably be performed as a mental process, and furthermore are limitations that are other than what is well-understood, routine, conventional activity in the technical field.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2, 7-8, and 19 are rejected as being unpatentable over Watanabe et al. (JP 2010-103275; hereinafter “Watanabe”) in view of Amanullah et al. (US 2010/0189339; hereinafter “Amanullah”).
Regarding Claim 1, Watanabe discloses a visual inspection system, comprising:
an imaging apparatus configured to take part images of a wafer surface by dividing the wafer surface into a plurality of areas along a circumferential direction ([0015-0017], Watanabe teaches capturing several part images along the circumferential direction of a surface of a wafer to generate an overall image.); and
a visual inspection apparatus including at least a controller configured to ([0019], Watanabe discloses utilizing image processing software of a computer to perform visual inspection of a wafer.):
generate an overall image of the wafer surface from the part images taken by the imaging apparatus ([0015-0017], Watanabe teaches capturing several part images along the circumferential direction of a surface of a wafer to generate an overall image.),
generate a differential image by performing a differentiation processing on each of the plurality of overall images ([0020], Watanabe discloses performing differential processing on an entire image to generate a differential processing image.),
detect abnormalities on the wafer surface based on an image ([0016], Watanabe discloses utilizing the processed image to perform defect detection on the wafer surface.).
Watanabe does not explicitly discloses generating a plurality of overall images and a plurality of differential images, and generate an average image based on the plurality of overall images by overlaying the plurality of differential images, and detect abnormalities on the wafer surface based on (italicized for context) the average image.
Amanullah discloses generating a plurality of overall images and a plurality of differential images, and generate an average image based on the plurality of overall images by overlaying the plurality of differential images, and detect abnormalities on the wafer surface based on (italicized for context) the average image ([0150-0156], Amanullah discloses obtaining a series of ‘n’ photos, where the ‘n’ photos are otained at different illuminations. Utilizing the ‘n’ images, the images are aligned (i.e., “overlayed”) and averaged at each pixel to generate an averaged image.).
Watanabe and Amanullah are considered to be analogous to the claimed invention as they are in the same field of using image processing to perform wafer inspection. Therefore, it would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to modify the invention of Watanabe by incorporating the ‘n’ images and averaging process to average the ‘n’ images disclosed by Amanullah, such that the series of ‘n’ images obtained at different illuminations (as disclosed by Amanullah) are obtained by Watanabe’s imaging apparatus, processed by Watanabe’s methods of generating an overall image and differential image, averaged by Amanullah’s averaging process to incorporate the information from all ‘n’ images, and consequently analyzed for defects using the methods disclosed by Watanabe. The motivation for this combination being the ability to utilize multiple illuminations (and the associated data obtained in the process), which can highlight different portions and defects potentially present on the wafer (see [0005-0015], Amanullah).
Claim 7 is the method claim corresponding to claim 1, and is similarly rejected (see Fig. 1, Watanabe).
Regarding Claim 2, Watanabe in view of Amanullah teaches the visual inspection system according to claim 1, wherein the controller is further configured to generate each of the plurality of overall images based on the part images taken with different luminance ([0150-0151], Amanullah discloses obtaining a series of ‘n’ images at different luminance. The Examiner notes the combination made in claim 1 with how the series of ‘n’ images is utilized to obtain the plurality of overall images.).
Claim 8 is the method claim corresponding to claim 2, and is similarly rejected (see Fig. 1, Watanabe).
Regarding Claim 19, Watanabe in view of Amanullah teaches the visual inspection system according to claim 1, wherein the imaging apparatus is configured to take the part images comprising each of the plurality of the overall images with different illumination conditions, and wherein the controller is further configured to generate each of the plurality of the overall images for each of the different illumination conditions (The Examiner notes the combination made in claim 1, wherein Amanullah discloses obtaining ‘n’ images (i.e., a plurality) in different illumination conditions, and Watanabe discloses obtaining part images and generating overall images.).
Claims 3 and 9 are rejected as being unpatentable over Watanabe in view of Amanullah in view of Muhr et al. (US 2020/0105552; hereinafter “Muhr”).
Regarding Claim 3, Watanabe in view of Amanullah teaches the visual inspection system according to claim 1.
Watanabe in view of Amanullah does not teach wherein the controller is further configured to detect abnormalities on the wafer surface based on a difference image obtained by taking the difference between the average image and the overall image.
Muhr teaches wherein the controller is further configured to detect abnormalities on the wafer surface based on a difference image obtained by taking the difference between the average image and the overall image. ([0004-0006], [0090], Muhr teaches an image analysis method including calculating a difference image by subtracting brightness values from two images as a method for identifying remaining adhesive residue (i.e., a defect).).
Watanabe, Amanullah, and Muhr are considered to be analogous to the claimed invention as they are in the same field of applying image processing techniques for analyzing a wafer/chip. Therefore, it would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to modify the invention of Watanabe in view of Amanullah such that an abnormality present on a wafer surface is identified by taking computing the difference between the average image and the overall image (wherein the average image and overall image are taught by Watanabe in view of Amanullah) based on the difference image method taught by Muhr. The motivation for this combination being the ability to identify abnormal regions of an image which are present only in particular situations.
Claim 9 is analogous to claim 3 (noted as Watanabe in view of Amanullah teaches both claim 1 (which claim 3 is dependent on) and claim 2 (which claim 9 is dependent on)), and is similarly rejected.
Claims 4 and 10 are rejected as being unpatentable over Watanabe in view of Amanullah in view of Muhr in view of Yoda et al. (“An Automatic Wafer Inspection System Using Pipelined Image Processing Techniques”, DOI: 10.1109/34.3863; hereinafter “Yoda”).
Regarding Claim 4, Watanabe in view of Amanullah in view of Muhr teaches the visual inspection system according to claim 3.
Watanabe in view of Amanullah in view of Muhr does not teach wherein the controller is further configured to extract pixels, in the difference image, whose luminance is equal to or greater than a first threshold value as candidate pixels for detection, and detects abnormalities on the wafer surface among the candidate pixels for detection.
Yoda disclose wherein the controller is further configured to extract pixels, in the difference image, whose luminance is equal to or greater than a first threshold value as candidate pixels for detection, and detects abnormalities on the wafer surface among the candidate pixels for detection (B. Overview of Image Analysis Approach, Yoda teaches generating a difference image, which then undergoes a thresholding process to generate a binarized image used to identify defects on a wafer.).
Watanabe, Amanullah, Muhr, and Yoda are considered to be analogous to the claimed invention as they are in the same field of applying image processing techniques for analyzing a wafer/chip. Therefore, it would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to modify the invention of Watanabe in view of Amanullah in view of Muhr such that the difference image taught by Watanabe in view of Amanullah in view of Muhr is processed by the binarization methods taught by Yoda in order to identify pixel regions associated with a defect. The motivation for this combination being the ability to set an adjustable binarizing threshold which can be used and adapted to identify potential defect regions on a wafer.
Claim 10 is analogous to claim 4 (noted as Watanabe in view of Amanullah in view of Muhr teaches both claim 3 (which claim 4 is dependent on) and claim 9 (which claim 10 is dependent on)), and is similarly rejected.
Claims 6 and 12 are rejected as being unpatentable over Watanabe in view of Amanullah in view of Kaoru et al. (JP 2012-083351; hereinafter “Kaoru”) in view of Sun (CN 101930938; hereinafter “Sun”).
Regarding Claim 6, Watanabe in view of Amanullah teaches the visual inspection system according to claim 1.
Watanabe in view of Amanullah does not teach wherein the controller is further configured to detect abnormalities on the wafer surface based on the difference between an average luminance in a central area including the center of the wafer surface and an average luminance in a peripheral area other than the central area in the average image.
Kaoru teaches wherein the controller is further configured to detect abnormalities on the wafer surface based on the difference between an average luminance in a central area including the center of the wafer surface and an average luminance in a peripheral another area other than the central area in the average image ([0007], Kaoru teaches a difference in film thickness present on a wafer based on a difference in brightness.).
Watanabe, Amanullah, and Kaoru are considered to be analogous to the claimed invention as they are in the same field of applying image processing techniques for analyzing a wafer/chip. Therefore, it would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to modify the invention of Watanabe in view of Amanullah such that a difference in film thickness (i.e., an abnormality) can be detected by image processing techniques taught by Kaoru. The motivation for this combination being the ability to identify a specific type of abnormality present on a wafer.
Watanabe in view of Amanullah in view of Kaoru does not teach determining a difference specifically based on a difference of average values between a central area and a peripheral area.
Sun teaches determining a difference specifically based on a difference of average values between a central area and a peripheral area (Page 2, Sun teaches determining a film thickness present on a wafer based on an average difference between measured points at the center of a wafer and measured points at the edge of a wafer.).
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Watanabe, Amanullah, Kaoru, and Sun are considered to be analogous to the claimed invention as they are in the same field of applying analyzing a wafer/chip for abnormalities or defects. Therefore, it would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to modify the invention of Watanabe in view of Amanullah in view of Kaoru such that difference in film thickness based on image brightness utilized the methods taught by Sun, such that the average image brightness was calculated at the center and peripheral edge, as taught by Sun, in order to determine an abnormal film thickness. The motivation for this combination being the ability to use image analysis methods to specifically identify differences in film thickness where the film thickness varies based on the location on the wafer.
Claim 12 is analogous to claim 6 (noted as Watanabe in view of Amanullah teaches both claim 1 (which claim 6 is dependent on) and claim 2 (which claim 12 is dependent on)), and is similarly rejected.
Claims 13 and 16 are rejected as being unpatentable over Watanabe in view of Amanullah in view of Muhr in view of Kaoru in view of Sun.
Regarding Claim 13, Watanabe in view of Amanullah in view of Muhr teaches the visual inspection system according to claim 3.
Watanabe in view of Amanullah in view of Muhr does not teach wherein the controller is further configured to detect abnormalities on the wafer surface based on the difference between an average luminance in a central area including the center of the wafer surface and an average luminance in a peripheral area other than the central area in the average image.
Kaoru teaches wherein the controller is further configured to detect abnormalities on the wafer surface based on the difference between an average luminance in a central area including the center of the wafer surface and an average luminance in a peripheral another area other than the central area in the average image ([0007], Kaoru teaches a difference in film thickness present on a wafer based on a difference in brightness.).
Watanabe, Amanullah, Muhr, and Kaoru are considered to be analogous to the claimed invention as they are in the same field of applying image processing techniques for analyzing a wafer/chip. Therefore, it would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to modify the invention of Watanabe in view of Amanullah in view of Muhr such that a difference in film thickness (i.e., an abnormality) can be detected by image processing techniques taught by Kaoru. The motivation for this combination being the ability to identify a specific type of abnormality present on a wafer.
Watanabe in view of Amanullah in view of Muhr in view of Kaoru does not teach determining a difference specifically based on a difference of average values between a central area and a peripheral area.
Sun teaches determining a difference specifically based on a difference of average values between a central area and a peripheral area (Page 2, Sun teaches determining a film thickness present on a wafer based on an average difference between measured points at the center of a wafer and measured points at the edge of a wafer.).
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Watanabe, Amanullah, Muhr, Kaoru, and Sun are considered to be analogous to the claimed invention as they are in the same field of applying analyzing a wafer/chip for abnormalities or defects. Therefore, it would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to modify the invention of Watanabe in view of Amanullah in view of Muhr in view of Kaoru such that difference in film thickness based on image brightness utilized the methods taught by Sun, such that the average image brightness was calculated at the center and peripheral edge, as taught by Sun, in order to determine an abnormal film thickness. The motivation for this combination being the ability to use image analysis methods to specifically identify differences in film thickness where the film thickness varies based on the location on the wafer.
Claim 16 is analogous to claim 13 (noted as Watanabe in view of Amanullah in view of Muhr teaches both claim 3 (which claim 13 is dependent on) and claim 9 (which claim 16 is dependent on)), and is similarly rejected.
Claims 14 and 17 are rejected as being unpatentable over Watanabe in view of Amanullah in view of Muhr in view of Yoda in view of Kaoru in view of Sun.
Regarding Claim 14, Watanabe in view of Amanullah in view of Muhr in view of Yoda teaches the visual inspection system according to claim 4.
Watanabe in view of Amanullah in view of Muhr in view of Yoda does not teach wherein the controller is further configured to detect abnormalities on the wafer surface based on the difference between an average luminance in a central area including the center of the wafer surface and an average luminance in a peripheral area other than the central area in the average image.
Kaoru teaches wherein the controller is further configured to detect abnormalities on the wafer surface based on the difference between an average luminance in a central area including the center of the wafer surface and an average luminance in a peripheral another area other than the central area in the average image ([0007], Kaoru teaches a difference in film thickness present on a wafer based on a difference in brightness.).
Watanabe, Amanullah, Muhr, Yoda and Kaoru are considered to be analogous to the claimed invention as they are in the same field of applying image processing techniques for analyzing a wafer/chip. Therefore, it would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to modify the invention of Watanabe in view of Amanullah in view of Muhr in view of Yoda such that a difference in film thickness (i.e., an abnormality) can be detected by image processing techniques taught by Kaoru. The motivation for this combination being the ability to identify a specific type of abnormality present on a wafer.
Watanabe in view of Amanullah in view of Muhr in view of Yoda in view of Kaoru does not teach determining a difference specifically based on a difference of average values between a central area and a peripheral area.
Sun teaches determining a difference specifically based on a difference of average values between a central area and a peripheral area (Page 2, Sun teaches determining a film thickness present on a wafer based on an average difference between measured points at the center of a wafer and measured points at the edge of a wafer.).
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Watanabe, Amanullah, Muhr, Yoda, Kaoru, and Sun are considered to be analogous to the claimed invention as they are in the same field of applying analyzing a wafer/chip for abnormalities or defects. Therefore, it would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to modify the invention of Watanabe in view of Amanullah in view of Muhr in view of Yoda in view of Kaoru such that difference in film thickness based on image brightness utilized the methods taught by Sun, such that the average image brightness was calculated at the center and peripheral edge, as taught by Sun, in order to determine an abnormal film thickness. The motivation for this combination being the ability to use image analysis methods to specifically identify differences in film thickness where the film thickness varies based on the location on the wafer.
Claim 17 is analogous to claim 14 (noted as Watanabe in view of Amanullah in view of Muhr in view of Yoda teaches both claim 4 (which claim 14 is dependent on) and claim 10 (which claim 17 is dependent on)), and is similarly rejected.
Allowable Subject Matter
Claims 5, 11, 15, and 18 are objected to as being dependent upon a rejected base claim, but would be potentially allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The Examiner notes that allowability is contingent on independent claim(s) overcoming the presented 101 rejections.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PROMOTTO TAJRIAN ISLAM whose telephone number is (703)756-5584. The examiner can normally be reached Monday - Friday 8:30 am - 5:00 pm EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Chan Park can be reached at (571) 272-7409. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/PROMOTTO TAJRIAN ISLAM/Examiner, Art Unit 2669 /CHAN S PARK/Supervisory Patent Examiner, Art Unit 2669
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