Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The drawings filed on 11/22/23 are accepted by the examiner.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 11/22/23 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
CLAIM INTERPRETATION
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: control device configured to… detecting a set of printed circuit board types, control device configured to…detecting a set of component types, control device configured to… detecting a production time for simultaneous, referred to as synchronous, population, control device configured to… detecting a production time for staggered, referred to as asynchronous, population, control device configured to… detecting a number of fixed-setup setup families, control device configured to… assigning printed circuit board types, control device configured to… optimizing the assignment process in claim 7.
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-11 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites the limitation "the first transport track" in line 3. There is insufficient antecedent basis for this limitation in the claim.
Claim 1 recites the limitation "the first side" in line 4. There is insufficient antecedent basis for this limitation in the claim.
Claim 1 recites the limitation "the second transport track" in lines 4-5. There is insufficient antecedent basis for this limitation in the claim.
Claim 1 recites the limitation "the second side" in line 6. There is insufficient antecedent basis for this limitation in the claim.
Claim 1 recites the limitation "the planning horizon" in line 9. There is insufficient antecedent basis for this limitation in the claim.
Claim 1 recites the limitation "the components of the component types" in line 24. There is insufficient antecedent basis for this limitation in the claim.
Claim 1 recites the limitation "the assignment process" in line 30. There is insufficient antecedent basis for this limitation in the claim.
The term “several times” in claims 1, 7 and 10 is a relative term which renders the claim indefinite. The term “several times” is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. For the purpose of the examination, the examiner has interpreted “several times” in claims 1, 7 and 10 as “at least one time”.
Claim 7 recites the limitation "the first transport track" in page 1 line 3. There is insufficient antecedent basis for this limitation in the claim.
Claim 7 recites the limitation "the first side" in page 1 line 4. There is insufficient antecedent basis for this limitation in the claim.
Claim 7 recites the limitation "the second transport track" in page 1 lines 4-5. There is insufficient antecedent basis for this limitation in the claim.
Claim 7 recites the limitation "the second side" in page 1 line 6. There is insufficient antecedent basis for this limitation in the claim.
Claim 7 recites the limitation "the planning horizon" in page 1 line 9. There is insufficient antecedent basis for this limitation in the claim.
Claim 7 recites the limitation "the components of the component types" in page 2 line 6. There is insufficient antecedent basis for this limitation in the claim.
Claim 7 recites the limitation "the assignment process" in page 2 line 12. There is insufficient antecedent basis for this limitation in the claim.
Claims 2-6 and 8-11, included in the statement of rejection but not specifically addressed in the body of the rejection have inherited the deficiency of their parent claim and have not resolved the deficiencies. Therefore, they are rejected based on the same rationale as applied to their parent claim above.
The following is a quotation of 35 U.S.C. 112(d):
(d) REFERENCE IN DEPENDENT FORMS.—Subject to subsection (e), a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers.
The following is a quotation of pre-AIA 35 U.S.C. 112, fourth paragraph:
Subject to the following paragraph [i.e., the fifth paragraph of pre-AIA 35 U.S.C. 112], a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers.
Claim 10 is rejected under 35 U.S.C. 112(d) or pre-AIA 35 U.S.C. 112, 4th paragraph, as being of improper dependent form for failing to further limit the subject matter of the claim upon which it depends, or for failing to include all the limitations of the claim upon which it depends. Claim 10 depends on claim 9 and claim 9 recites “a computer program product, comprising a computer readable hardware storage device having computer readable program code stored therein, said program code executable by a processor of a computer system to implement a method with program code carrying out the method as claimed in claim 1 when it is executed on a processor”, therefore, claim 9 comprises all limitation of claim 1. Claim 10 recites limitation that is verbatim of claim 1, therefore claim 10 fails to further limit the subject matter of the claim upon which it depends. Applicant may cancel the claim(s), amend the claim(s) to place the claim(s) in proper dependent form, rewrite the claim(s) in independent form, or present a sufficient showing that the dependent claim(s) complies with the statutory requirements.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-11 are rejected under 35 U.S.C. 101 because the claimed invention is directed to abstract idea without significantly more. The claim(s) recite(s) mental steps involving determining at least one fixed setup for an assembly line, assigning printed circuit board types to each fixed-setup setup family, wherein all the components for populating a printed circuit board of a printed circuit board type of the assigned printed circuit board types have the space they require in the tracks available in the fixed setup and are set up in the fixed setup, wherein, for each fixed-setup setup family, the printed circuit boards of the assigned printed circuit board types have the same printed circuit board width, so that the printed circuit boards fit into the transport track with respect to the transport track width, , these limitations as described in [0055]-[0057] and [0080] is recited in high level of generality constitutes as a mental process, such as an evaluation or judgement, that can be performed in the human mind. The claim(s) also recite(s) mathematical concepts of optimizing the assignment process in such a way that the production time saving, which is identified from the detected production times of the synchronous and asynchronous population over all the allocated double-sided printed circuit boards, is maximized, wherein the sum of production times of the printed circuit board types of a fixed-setup setup family falls below a pre-specifiable upper limit, wherein the sum of production times for the printed circuit board types of a fixed-setup setup family exceeds a pre-specifiable lower limit, wherein optimization is carried out by mixed integer programming, these limitations as described in [0060] and [0080]-[0088] constitutes details of mathematical calculations of the material model, physical properties, thus, it falls into the “mathematical concepts” group of abstract ideas see MPEP 2106.04(a)(2), (claims 1-2 and 4-11).
This judicial exception is not integrated into a practical application because the additional limitations of “an assembly line which is configured with a printed circuit board double transport system of which the first transport track transports double-sided printed circuit boards of a printed circuit board type of which the first side is populated, and of which the second transport track transports double-sided printed circuit boards of the printed circuit board type of which the second side is populated, wherein each fixed setup comprises a number of component types that is sufficient to populate the printed circuit boards of a fixed-setup setup family, which is associated with this fixed setup, of printed circuit board types, wherein the at least one fixed setup remains unchanged during the planning horizon and can be used several times on the assembly line, wherein printed circuit boards with only one fixed setup are populated on the assembly line, wherein printed circuit boards with only one fixed setup are populated on the assembly line (claims 1, 3, 7 and 10) generally links the abstract idea to a particular technological environment because it claims field of use, the limitations of detecting a set of printed circuit board types each with allocated double-sided printed circuit boards which are intended to be populated on the assembly line within the planning horizon; detecting a set of component types together with their space requirement in tracks in at least one component feed device; detecting a production time for simultaneous, referred to as synchronous, population of the first and second side of each allocated double-sided printed circuit board on the first and second transport track; detecting a production time for staggered, referred to as asynchronous, population of the first and second side of each allocated double-sided printed circuit board on the first and second transport track; detecting a number of fixed-setup setup families, wherein each fixed-setup setup family comprises a set of printed circuit board types of which the printed circuit boards can be populated with the components of the component types of the fixed setup on the assembly line (claims 1, 7 and 10) represent mere data transmission/gathering which is an insignificant extrasolution activity. The control device, the processor, computer readable hardware storage device (claims 7 and 9) are recited at a high level of generality and are recited as performing generic computer functions routinely used in computer applications that they represent no more than mere instructions to apply the judicial exception on a computer. These limitations can also be viewed as nothing more than an attempt to generally link the use of the judicial exception to the technological environment of a computer. It should be noted that because the courts have made it clear that mere physicality or tangibility of an additional element or elements is not a relevant consideration in the eligibility analysis, the physical nature of these computer components does not affect this analysis. See MPEP 2106.05(I) for more information on this point, including explanations from judicial decisions including Alice Corp. Pty. Ltd. v. CLS Bank Int'l, 573 U.S. 208, 224-26 (2014). Generic computer components recited as performing generic computer functions that are well-understood, routine and conventional activities amount to no more than implementing the abstract idea with a computerized system (Alice Corp. Pty. Ltd. v. CLS Bank Int’l 573 U.S. __, 134 S. Ct. 2347, 110 U.S.P.Q.2d 1976 (2014)). Accordingly, these additional element does not integrate the abstract idea into a practical application.
The claim(s) does/do not include additional elements that are sufficient to amount to significantly more than the judicial exception because the insignificant extra-solution activity of data transmission/gathering is considered well-understood, routine, and conventional, see mpep 2106.05(d), infra applied prior art, references cited. The “field of use” limitation do not amount to significantly more than the judicial exception because they are well-understood, routine and conventional (See MPEP2106.05(d)). The control device, the processor, computer readable hardware storage device are recited at a high level of generality and are recited as performing generic computer functions routinely used in computer applications, which cannot provide an inventive concept. Generic computer components recited as performing generic computer functions that are well-understood, routine and conventional activities amount to no more than implementing the abstract idea with a computerized system (Alice Corp. Pty. Ltd. v. CLS Bank Int’l 573 U.S. __, 134 S. Ct. 2347, 110 U.S.P.Q.2d 1976 (2014)).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1, 3, 6-7 and 9-10 is/are rejected under 35 U.S.C. 103 as being unpatentable over US20150296671 to Pfaffinger et al. (hereinafter “Pfaffinger”), in view of US20100325860 to Maenishi.
As for claim 1, Pfaffinger substantially discloses a method for determining at least one fixed setup for an assembly line which is configured with a printed circuit board double transport system of which the first transport track transports printed circuit boards of a printed circuit board type, and of which the second transport track transports printed circuit boards of the printed circuit board type (Pfaffinger, see Fig. 1, Fig. 3, [0045]-[0046]), wherein each fixed setup comprises a number of component types that is sufficient to populate the printed circuit boards of a fixed-setup setup family, which is associated with this fixed setup, of printed circuit board types, wherein the at least one fixed setup remains unchanged during the planning horizon and can be used several times on the assembly line (Pfaffinger, see [0009]-[0010]), wherein the method comprises the following steps:
detecting a set of printed circuit board types each with allocated printed circuit boards which are intended to be populated on the assembly line within the planning horizon (Pfaffinger, see [0040] and [0078]);
detecting a set of component types together with their space requirement in tracks in at least one component feed device (Pfaffinger, see [0073]-[0074]);
detecting a number of fixed-setup setup families, wherein each fixed-setup setup family comprises a set of printed circuit board types of which the printed circuit boards can be populated with the components of the component types of the fixed setup on the assembly line (Pfaffinger, see [0016]-[0020] and [0045]);
assigning printed circuit board types to each fixed-setup setup family, wherein all the components for populating a printed circuit board of a printed circuit board type of the assigned printed circuit board types have the space they require in the tracks available in the fixed setup and are set up in the fixed setup (Pfaffinger, see [0073]-[0081]; and
optimizing the assignment process in such a way that the production time saving, which is identified from the detected production times, is maximized (Pfaffinger, see [0013] for the assignment quality is determined on the basis of the total of the production times of the circuit boards, see [0061]-[0062] for optimizing assignment to achieve optimal assignment quality and see [0057] for maximum achievable assignment quality).
Pfaffinger does not explicitly disclose the first transport track transports double-sided printed circuit board, the second transport track transports double-sided printed circuit boards, double-sided printed circuit boards, detecting a production time for simultaneous, referred to as synchronous, population of the first and second side of each allocated double-sided printed circuit board on the first and second transport track; detecting a production time for staggered, referred to as asynchronous, population of the first and second side of each allocated double-sided printed circuit board on the first and second transport track; optimizing in such a way that the production time saving, which is identified from the detected production times of the synchronous and asynchronous population over all the allocated double-sided printed circuit boards.
However, Maenishi in an analogous art discloses the first transport track transports double-sided printed circuit board, the second transport track transports double-sided printed circuit boards, double-sided printed circuit boards (Maenishi, see Fig. 7A, Fig. 7B, [0260]-[0261] and [0265]), detecting a production time for simultaneous, referred to as synchronous, population of the first and second side of each allocated double-sided printed circuit board on the first and second transport track (Maenishi, see [0264], Fig. 7A, Fig. 11 and [0279]-[0281]); detecting a production time for staggered, referred to as asynchronous, population of the first and second side of each allocated double-sided printed circuit board on the first and second transport track (Maenishi, see [0267], Fig. 7B, Fig. 11 and [0279]-[0281]); optimizing in such a way that the production time saving, which is identified from the detected production times of the synchronous and asynchronous population over all the allocated double-sided printed circuit boards (Maenishi, see [0279]-[0281], Fig. 11 and [0302]-[0309]).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate teaching of Maenishi into the method of Pfaffinger. The modification would be obvious because one of the ordinary skill in the art would want to select, between the synchronous mode and the asynchronous mode, the production mode having the higher production efficiency, based on the information indicating the continuity of the component mounting operations (Maenishi, see [0298]).
Claim 7 is a device claim corresponding to the method claim 1, it is therefore rejected under similar reasons set forth in the rejection of claim 1, Pfaffinger further discloses control device (Pfaffinger, see [0025]).
Claim 9-10 are CRM claims corresponding to the method claim 1, it is therefore rejected under similar reasons set forth in the rejection of claim 1, Pfaffinger further discloses computer program product comprising a computer readable hardware storage device (Pfaffinger, see claim 12).
As per claim 3, the rejection of claim 1 is incorporated, Pfaffinger further discloses wherein printed circuit boards with only one fixed setup are populated on the assembly line (Pfaffinger, [0009] and [0011]).
As per claim 6, the rejection of claim 1 is incorporated, Pfaffinger further discloses wherein optimization is carried out by mixed integer programming (Pfaffinger, see [0066]).
Claim(s) 2, 8 and 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Pfaffinger, in view of Maenishi, further in view of US5390283 to Eshelman et al. (hereinafter “Eshelman”).
As per claim 2, the rejection of claim 1 is incorporated, Maenishi further discloses for each fixed-setup setup family, the printed circuit boards of the assigned printed circuit board types have printed circuit board width, so that the printed circuit boards fit into the transport track with respect to the transport track width (Maenishi, see [0457]-[0461] and [0185]-[0186]).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate teaching of Maenishi into the method of Pfaffinger. The modification would be obvious because one of the ordinary skill in the art would want to select, between the synchronous mode and the asynchronous mode, the production mode having the higher production efficiency, based on the information indicating the continuity of the component mounting operations (Maenishi, see [0298]).
The combination of Pfaffinger and Maenishi does not explicitly disclose printed circuit board types have the same printed circuit board width.
However, Eshelman in an analogous art discloses printed circuit board types have the same printed circuit board width (Eshelman, see col. 13 lines 28-30).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate teaching of Eshelman into the above combination of Pfaffinger and Maenishi. The modification would be obvious because one of the ordinary skill in the art would want to minimize the cycle time for a given mix of family members where the solutions for all family members share the same layout (Eshelman, see col. 13 lines 50-52).
Claim 8 is a device claim corresponding to the method claim 2, it is therefore rejected under similar reasons set forth in the rejection of claim 2.
Claim 11 is a CRM claim corresponding to the method claim 2, it is therefore rejected under similar reasons set forth in the rejection of claim 2.
Claim(s) 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Pfaffinger, in view of Maenishi, further in view of US10555422 to Pfaffinger et al. (hereinafter “Pfaffinger’422”).
As per claim 4, the rejection of claim 1 is incorporated, Pfaffinger further discloses the sum of production time of the printed circuit board types of a fixed-setup setup family (Pfaffinger, see [0013] and [0061]-[0062]). The combination of Pfaffinger and Maenishi does not explicitly disclose the production time falls below a pre-specifiable upper limit.
However, Pfaffinger’422 in an analogous art discloses the production time falls below a pre-specifiable upper limit (Pfaffinger’422, see col. 2 lines 50-51).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate teaching of Pfaffinger’422 into the above combination of Pfaffinger and Maenishi. The modification would be obvious because one of the ordinary skill in the art would want to generating advantages with respect to handling and costs by having the processing time for a job does not exceed said time period (Pfaffinger’422, see col. 2 lines 48-51).
Claim(s) 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Pfaffinger, in view of Maenishi, further in view of translation of WO2014079601 to Pfaffinger et al. (hereinafter “Pfaffinger’601”).
As per claim 5, the rejection of claim 1 is incorporated, Pfaffinger further discloses the sum of production time of the printed circuit board types of a fixed-setup setup family (Pfaffinger, see [0013] and [0061]-[0062]). The combination of Pfaffinger and Maenishi does not explicitly disclose the production time exceeds a pre-specifiable lower limit.
However, Pfaffinger’601 in an analogous art discloses the production time exceeds a pre-specifiable lower limit (Pfaffinger’601, see page 2).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate teaching of Pfaffinger’601 into the above combination of Pfaffinger and Maenishi. The modification would be obvious because one of the ordinary skill in the art would want to optimize the association between PCB types and the setup family in respect to reduce expenses and costs when changing the setup (Pfaffinger’601, see abstract and page 2).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant’s disclosure.
US20150271925 discloses a component mounting unit includes first and second board conveyance mechanisms, first and second component supply units, and first and second component mounting mechanisms, for performing a component mounting work on a front surface and a rear surface of boards of a same type in parallel. Electronic components of all kinds to be mounted on the front surface and the rear surface at the component mounting unit are distributed to the first and second component supply units. The first and second component mounting mechanisms pick up electronic components from the first and second component supply unit, respectively. The first component mounting mechanism mounts the electronic component on the board held by each of the first and second board conveyance mechanisms. The second component mounting mechanism mounts the electronic component on the board held by each of the first and second board conveyance mechanisms.
US20140012992 discloses a computational resource allocation may include a mapper and a provisioner, for cost-effective allocation of a set of information between external computational resources placed within an internet-based computing environment and internal computational resources that are at least a part of a mega computational resource placed in an intranet-based computing environment. The mapper receives a first list representing a set of information and a second list representing a set of external computational resource and a set of internal computational resources, which identify the computation requirements for computing the set of information and to map the same along with the set of information onto the set of resources using the first list and the second list, thereby generating an execution deployment plan. The provisioner receives the execution deployment plan and provides the set of information to the computational resources for processing of the set of information based thereof.
US20070204086 discloses a method for manufacturing. The method includes identifying components to be mounted on a printed circuit board of a product and generating information that specifies the components. The method includes determining, for each of the identified components, the location on the printed circuit board where the component is to be mounted and generating coordinates that indicate the location. The coordinates are of a coordinate system having a frame of reference that is independent from any master printed circuit board. The method includes associating the generated information with the product.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JASON LIN whose telephone number is (571)270-3175. The examiner can normally be reached on Monday-Friday 9:30 a.m. – 6:00 p.m. PST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Robert E. Fennema can be reached on (571)272-2748. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JASON LIN/
Primary Examiner, Art Unit 2117
Prosecution Insights