DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-4, 7-14, 16-17, 20, 23, 26, 28 and 32-33 are pending for examination.
This Office Action is FINAL.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 05/17/2026 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1 and 32-33 are rejected under 35 U.S.C. 103 as being unpatentable over KIESS et al. (EP 2720483 A1, hereinafter “KIESS”) in view of KOTHAMASU (US 20120124260 A1, hereinafter “KOTHAMASU”).
Regarding Claim 1, KIESS discloses a method of verifying resource queue management interfaces of a master module and a slave module (Fig. 1, 3, 8), comprising:
generating a verification instance ([0037]: allocation verifier sends a command to start a monitoring program residing in the mobile device/receiver. Generating interpreted as activating the allocation verifier (verification instance) when allocation verifier sends a “start monitoring” command);
under a condition that a first resource queue management interface of the verification instance is connected to a second resource queue management interface of the master module to be verified ([0037]-[0038]: once the verifier sends a monitoring command, receivers of a certain group records the resource block allocation over a period of time and sends a reply back to the verifier to allow the verifier to verify that scheduler 105 has actually performed a scheduling operation in accordance with the predefined contract. Fig. 8; [0050], [0052]: master scheduler 105 accesses packet queues of different VeNBs, determines which subcarriers are best suited for transmission, and allocates physical resource blocks to be used for transmission. Allocation verifier connected to master scheduler 105 via receivers for later scheduling monitoring/verification), verifying the second resource queue management interface of the master module to be verified through the verification instance ([0038]: verifier compares reply from receiver to a predetermined allocation target to determine whether the resource block allocation done by the scheduler is in a predefined range around the predetermined allocation target or not. Fig. 8; [0049], [0052]: “scheduler” refers to master scheduler 105);
under a condition that the first resource queue management interface of the verification instance is connected to a third resource queue management interface of the slave module ([0037]-[0038]: once the verifier sends a monitoring command, receivers of a certain group records the resource block allocation over a period of time and sends a reply back to the verifier to allow the verifier to verify that scheduler 105 has actually performed a scheduling operation in accordance with the predefined contract. Fig. 8; [0049]-[0052]: slave scheduler of virtual eNB 101 sets priorities for each queue or each packet in the queue, where master scheduler 105 accesses the queues to determine the best suited subcarriers for transmission and quality of service values assigned by the slave scheduler (expressed by slave scheduler’s priorities). Based on this information, scheduler 105 takes a decision on what physical resource block is to be used for transmission. Allocation verifier connected to slave scheduler of virtual eNB 101 via master scheduler 105 and receivers for later scheduling monitoring/verification) to be verified ([0037]: allocation verifier checks that a virtual operator gets the amount of physical resource blocks he has paid for. [0051]-[0052]: slave scheduler sets priority for each queue or each packet in the queue, from which master scheduler 105 uses the priority to determine what physical resource block should be used for packet transmission. [0034]: higher priority receives more transmission resources than lower priority. By verifying scheduler 105, the condition of whether or not the priority set by the slave scheduler was met is also verified (i.e., slave scheduler priority was fulfilled)), verifying the third resource queue management interface of the slave module to be verified through the verification instance ([0038] + see first half of limitation); and
under a condition that the first resource queue management interface of the verification instance is connected to both the second resource queue management interface and the third resource queue management interface (see above – allocation verifier connected to master scheduler 105 via receivers, and connected to slave scheduler via master scheduler 105 and receivers), verifying an interaction process between the second resource queue management interface and the third resource queue management interface through the verification instance ([0037]-[0038]: allocation verifier verifies that the scheduler 105 has actually performed a scheduling operation in accordance with the predefined contract. [0049]-[0052]: scheduling operation involves slave scheduler prioritizing packets in a queue for data transmission, master scheduler 105 accesses the queues to determine the subcarriers that are best suited for transmission and quality of service values using slave scheduler’s priorities, from which master scheduler 105 determines what physical resource block is to be used for which transmission. Scheduling operation interpreted as the interacting process between slave scheduler and master scheduler 105, the scheduling operation later verified through allocation verifier).
KIESS does not disclose:
in a chip
However, KOTHAMASU teaches:
in a chip (Fig. 1; [0019]: master and slave interfaces shown within SoC 100)
Therefore, it would have been obvious before the effective filing date of the claimed invention to one of ordinary skill in the art to which said subject matter pertains to combine KIESS and KOTHAMASU by implementing the master and slave interfaces in a single SoC. One of ordinary skill in the art would be motivated to make this modification in order to improve utilization of interconnect bandwidth, reduce system frequency for given bandwidth requirements, and reduce dynamic power consumption due to the reduced frequency (KOTHAMASU: [0044]).
Regarding Claim 32, the device of Claim 32 performs the same steps as the method of Claim 1, and is thus rejected on the same grounds.
KIESS further discloses an electronic device ([0075]: computer), comprising:
at least one processor ([0075]: computer executes computer program product. [0082]: microprocessor); and
a memory having at least one program stored thereon which, when executed by the at least one processor ([0075]: program code stored on a machine readable carrier, executed by a computer. [0082]: microprocessor).
Regarding Claim 33, the medium of Claim 33 performs the same steps as the method of Claim 1, and is thus rejected on the same grounds.
KIESS further discloses a storage medium having a computer program stored thereon which, when executed by a processor ([0075]; [0081]-[0082]: machine readable carrier storing program code, executed by a computer, microprocessor may be used to perform one of the methods described herein. [0073]: furthermore, embodiments of invention can be implemented in hardware or software, performed using various non-transitory digital storage media).
Allowable Subject Matter
Claims 2-4, 7-14, 16-17, 20, 23, 26, 28 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Please see previous Office Action mailed 04/16/2026, Section “Allowable Subject Matter.” Same reasons apply.
Response to Arguments
Applicant’s arguments filed on 07/16/2026 with respect to 35 U.S.C. 102 have been fully considered but are moot.
Applicant’s arguments with respect to claim objections have been fully considered and are persuasive. The objection of Claim 3 has been withdrawn.
Applicant’s arguments with respect to 35 U.S.C. 101 have been fully considered and are persuasive. The rejection of Claim 33 has been withdrawn.
Regarding 35 U.S.C. 102, Applicant argues:
Page 21: “Such method of KIESS relates to the air interface, which is known as a wireless communication interface between a user equipment and a base station and including resources in the time domain and the frequency domain for transmitting signals between the user equipment and the base station, the technical solution disclosed in KIESS relates to how to assign the resources of the air interface, and has nothing to do with verification on a chip, especially with verification on a master module and a slave module in a chip.”
Page 23: “According to the above contents of KIESS (not included), it can be seen that the allocation verifier is used to verify whether the VNO (the VNO corresponding to the VeNB to which this allocation verifier belongs) has the amount of physical resource blocks that he has paid for, and performs this verification through communication with the receivers of the VeNB to which this allocation verifier belongs. The allocation verifier in KIESS can only communicate with the receivers, but cannot communicate with the slave scheduler or the master scheduler, and the verification carried on by the allocation verifier in KIESS does not involve verification of the slave scheduler in the VeNB or the master scheduler in the physical eNB. Thus, KIESS fails to disclose or suggest that the allocation verifier is connected to the master scheduler or the salve scheduler through any interface, and also fails to disclose or suggest verifying the slave scheduler or the master scheduler through the allocation verifier.
“Besides, the master scheduler in KIESS only accesses the queues in each VeNB, KIESS does not disclose the master scheduler can interact with the slave scheduler, thus it is also unable to verify the interaction between the master scheduler and the salve scheduler, especially through the allocation verifier.”
Examiner respectfully disagrees with B-C.
With respect to A, newly cited art KOTHAMASU teaches a master and slave module within a system-on-chip (SoC) to improve utilization of interconnect bandwidth, reduce system frequency for given bandwidth requirements, and reduce dynamic power consumption due to the reduced frequency (KOTHAMASU: Fig. 1; [0044]). Please see above for more detail.
With respect to B, KIESS discloses the allocation verifier is connected to (and verifies) master scheduler 105 through a receiver, where the verifier receives a reply from the receiver after scheduler 105 performed a scheduling operation and the verifier determines whether the resource block allocation done by the scheduler 105 is within the allocation target (KIESS: [0037]-[0038]).
Furthermore, the master scheduler 105 uses the queues prioritized by the slave scheduler to perform the scheduling operation such that the allocation verifier is also connected to the slave scheduler through master scheduler 105 and the receiver (KIESS: [0037]-[0038]; [0051]-[0052]). KIESS also discloses that higher priority receives more transmission resources than lower priority (KIESS: [0034]). As described above, by verifying scheduler 105’s scheduling operation, the condition of whether the priority set by the slave scheduler was met is also verified in the process (i.e., slave scheduler priority was fulfilled).
Under broadest reasonable interpretation (BRI), Claims 1 and 32-33 do not make the distinction between a direct or indirect communication/connection. Therefore, “connected to” encompasses an indirect communication/connection between the allocation verifier and the master/slave components through a receiver. Additionally, the claims lack detail as to how the master/slave components are verified. Under BRI, KIESS teaches verifying the output (scheduling operation) of said components.
With respect to C, the slave scheduler prioritizes which data packet in the queue is to be transmitted in the next scheduling period. Master scheduler 105 then accesses the queue to determine what physical resource block (PRB) is to be used for said packet in the prioritized order. Because the slave scheduler configured the queue (by prioritization) the master scheduler later uses to allocate PRBs, such process forms an interaction between the slave and master schedulers (KIESS: Fig. 8; [0051]-[0052]). The allocation verifier later verifies that master scheduler 105 performed a scheduling operation in accordance to the predefined contract (KIESS: [0037]-[0038]), wherein the scheduling operation was previously described as the interaction between the slave and master scheduler.
For at least the reasons stated above, the arguments against KIESS are moot with respect to the master and slave modules being in a chip, but are not persuasive with respect to the remaining limitations of Claims 1 and 32-33.
Prior Art of Record
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Hottinen et al. (US 6584302 B1) -- both the base station and the subscriber equipment can be implemented on one or more VLSI chips or ASICs
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CATHERINE MARIE NGUYEN whose telephone number is (571)272-6160. The examiner can normally be reached M-F 7:30 AM - 4:30 PM ET.
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/C.M.N./Examiner, Art Unit 2114
/ASHISH THOMAS/Supervisory Patent Examiner, Art Unit 2114
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