The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Applicant’s response of 12/30/2025 has been entered and considered. Upon entering amendment, claims 1-11 have been amended, and claims 12-20 have been newly added. Accordingly, claims 1-20 remain pending.
Response to Arguments
Applicant’s arguments with respect to claim 1 have been considered but are moot because the arguments do not apply to any of the references being used in the current rejection.
Further, with respect to claim 3, the applicant argues that “Shaikh merely discloses determining the power requirements of the load exceed the power capabilities of the power supplies, not a ‘degree of overload is lower than a second threshold” and that “the power capabilities of the power supplies is the entire capability. It is not equivalent to a second threshold.” (Remarks, bridging paragraph, pgs.12-13). The examiner respectfully disagrees. Shaikh, in par 38, teaches “dynamic spikes in load power requirements” (i.e., how much the load exceeds the capacity) which represents different degrees of overload relative to available power capacity (i.e., if load= 105% of capacity, it is a mild overload. If load= 150% of capacity, it is a severe overload). Because this degree can vary (e.g., high and low spikes versus sustained excess), the overload condition exists over a range. Therefore, Shaikh’s system operates across different degrees of overload, including conditions where the overload is below a higher second threshold that represent extreme overload conditions. The examiner noted in the previous office action the second threshold, as currently presented, is undefined and it reads much broader than what the applicant appears to intend. As such, the applicant is encouraged to amend the claims to further distinguish them over the prior art of record.
With respect to dependent claim 4, the applicant argues that “Garrity merely discloses a power converter 302, not the “isolation and inverter circuit” as recited in claim 4. The power converter does not provide the isolation function.” (Remarks, pg.13). The examiner respectfully disagrees. First, Garrity was not relied upon for the “inverter and power supply circuit”, which is initially recited in claim 1 taught by the combination of Fleming in view of Wang. The examiner further notes “the inverter and power supply circuit” is a nominal label for the circuit. Garrity was relied upon to show an inverter can operate in a current source mode or voltage source (pars [40-41]). Fleming in view of Wang’s inverter and power supply circuit would then be modified to have the current source mode taught by Garrity.
With respect to dependent claim 5, the applicant argues Serrano does not teach “an operating current of the current gated power supply is not greater than a third threshold”. The examiner respectfully disagrees. Serrano was not relied upon for the aforementioned limitations. Fleming, however, teaches detecting a current state of the current gated power supply (Fleming, pars [28-29, 32]; Fleming teaches control module 116 sensing the power quality including the current of current gated power supply 101), and when it is detected that that an operating current of the current gated power supply is not greater than a third threshold (Fleming, pars [28-29, 32]; Fleming teaches monitoring the power quality of current gated power supply 101 which includes monitoring the current of the source and determining if it falls outside of bounds/outside of a low and high threshold including not being greater than a higher undefined third threshold-this is within the bounds). The examiner reiterates, the third threshold and other thresholds in the claim(s) are undefined.
For further analysis of the claims, see rejections below.
Specification
The disclosure is objected to because of the following informalities:
Applicants filed disclosure at pars [0026, 0046] states that “when it is detected that an operating current of the gated power supply is greater than a third threshold…and/or a change speed of the current is greater than a fourth threshold…, the control module 103 may control the power supply gating module 101 to maintain the current gated power supply…” However, this contradicts claims 5, 18 which state the aforementioned parameters are not greater than a threshold to maintain the current gated power supply. Appropriate correction is required.
The examiner notes that while applicant’s fig.5 is congruent with claims 5, 18, there are paragraphs in applicant’s disclosure (i.e., pars [0026, 0046]) that appear to contradict other paragraphs (i.e., par [0062]). This makes the scope of the claims and applicant intends with the claim ambiguous. Appropriate correction is required.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the “first circuit breaker” provided between the first input terminal and the first power supply and the “second circuit breaker” further provided between the power supply output terminal and the load in claim 5, “a cascading circuit breaker” in claim 19 must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Objections
Claims 7, 13, 15, 17 objected to because of the following informalities:
Claim 7 recites “…the power supply gating circuit to tum off”. It should be “turn off”.
Claim 13 recites “…one of the first power supply inout…” It should be “input”.
Claim 15 recites “execeeding a first thrershold…” It should be “exceeding a first threshold”.
Claim 17 recites “…includes the overload state execeeding…” It should be “exceeding”.
Appropriate correction is required.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-2, 6-10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Fleming et al. (2003/0048004 A1) in view of English Machine Translation of applicant cited Wang (CN105024450 A) in further view of Bose et al. (11,258,296 B1).
Regarding Claim 1,
Fleming teaches a system, comprising:
a first input terminal (see fig.2, first input terminal of 10 to input first power supply of 101), configured to input a first power supply (101);
a second input terminal (fig.2, second input terminal of 10), configured to input a second power supply (102);
a power supply gating circuit (pars [32-35, 42], claims 1 and 3; “power supply gating circuit” read on by the first switch and second switches 110, 111 being SCRs with a gate as is commonly understood in the art), including a solid-state switch (i.e., SCRs are solid-state switches) and configured to gate one of the first power supply (101) and the second power supply (102) as a current gated power supply (pars [32-35, 42], claims 1 and 3; when the control module turns on the first SCR 110, it “gates” the first power supply. Alternatively, when the control module turns on the second SCR 111, it “gates” the second power supply 102);
a control circuit (116), configured to detect a circuit state and control (par [32]; detecting out of specification condition in the source 101), based on a result of the detecting, switching of the current gated power supply by the power supply gating circuit (pars [32-35]; 116 controls the switching of current gated power supply 101 by issuing a command to activate the inverter 114 and opening the SCR switch 110 of the power supply gating module);
an inverter circuit (items 107, 108, 114, 115, 117), configured to generate an inverter power supply based on control of the control circuit (116, pars [32-35]); and
a power supply output terminal (output terminal of 10 connected to load 120), configured to output at least one of the current gated power supply and the inverter power supply based on control of the control circuit (116, pars [32-35]; the power supply output terminal is “configured to” output at least the inverter power supply based on control to activate the inverter 114 and supply power to load 120).
While claim 1’s recitation of “isolation and inverter circuit” is simply nomenclature/a label for a circuit that does not actually require any isolation to take place, Fleming does not explicitly disclose said inverter circuit as further including isolation. Wang is being relied upon to further expedite prosecution.
Wang (fig.1) teaches an isolation (see fig.1, pars [15, 24, 48] “auxiliary power supply unit” includes a transformer depicted as having primary and secondary windings, which includes isolation) in the inverter module pathway either upstream or downstream of the inverter (see fig.1, pars [15, 24, 48]; isolation of the transformer arranged before the inverter or after the inverter- this makes it an “isolation and inverter circuit”).
In the combination, the pathway in Fleming’s inverter circuit would further include an isolation of the transformer upstream of the inverter to form an “isolation and inverter circuit” configured to “generate an isolation and inverter power supply”. Alternatively, Fleming’s autotransformer 117 is used to boost the output voltage of the inverter (Fleming, par [39]) and Wang teaches placing a transformer with isolation that uses boost functionality after the inverter unit (pars [24, 48])- Thus, Fleming’s autotransformer 117 would be substituted with the transformer having isolation to perform the same functionality of boosting the output voltage of the inverter to meet the requirements of the load.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Fleming’s inverter circuit pathway with isolation, as discussed within Wang, to form an “isolation and inverter circuit”. The motivation would have been because it is well-known and well-desired in the art to have isolation in the inverter module pathway of Fleming as taught by Wang and the skilled artisan would have considered it because it provides predictable results. Alternatively, the motivation to substitute Fleming’s autotransformer 117 at the output of the inverter with the transformer of Wang having isolation would have been the obvious substitution of one known component for another to achieve predictable results, namely to boost the output voltage of the inverter to meet the requirements of the load.
The combination does not explicitly disclose a mechanical switch connected between the solid-state switch and the power supply output terminal.
Bose (fig.2), however, teaches it is known in the art to have a mechanical switch (28) between the solid-state switch (26) and the power supply output terminal (Col.2, lines 52-53, 65 to Col.3, line 3; mechanical switch 28 between the solid-state switch and the output terminal of 10 connected to load 14).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the teachings of Fleming in view of Wang to further include a mechanical switch connected between modified Fleming’s solid-state switch and the power supply output terminal as discussed within Bose. The motivation would have been to isolate particular sections of modified Fleming’s system for safety and maintenance purposes (Bose, Col.3, lines 1-3).
Regarding Claim 2,
The combination teaches the claimed subject matter in claim 1 and further teaches wherein the detecting a circuit state and controlling, based on a result of the detecting, switching of the current gated power supply by the power supply gating circuit comprises: detecting a voltage state of the current gated power supply (Fleming, pars [28, 32, 37] and Wang, par [48]); and when it is detected that one or more of overvoltage, undervoltage (Fleming, pars [28-29, 32, 37] and Wang, par [48]; for e.g., voltage drop), power-off or frequency exceeding a first threshold (Fleming teaches the detecting an out of specification condition and falling outside of determined bounds, which corresponds to a condition that has a threshold that is exceeded. When there is a voltage drop/transient condition in source 101, the threshold is being exceeded noting that the drop in voltage has exceeded a permissible limit that would require changing of power sources) occurs on the current gated power supply (Fleming, 101), controlling the power supply gating circuit to switch the current gated power supply from one of the first power supply and the second power supply that is currently gated to one of the first power supply and the second power supply that is not currently gated (Fleming, pars [28, 32-35, 37]; responsive to the detected voltage state, controlling the power supply gating module to switch from the currently gated first power supply 101 to the second power supply 102 not currently gated by controlling SCR switch 110 off and SCR switch 111 on).
Regarding Claim 6,
The combination teaches the claimed subject matter in claim 1 and further teaches wherein the control circuit is further configured to: receiving a switching instruction (Fleming, par [38]; The switching sequence “may also be initiated by an external signal from an operator”- the switching instruction is read on by the “external signal” and the control module receives it in order to initiate the switching process and control the SCR switches), and based on the switching instruction, controlling the power supply gating circuit to switch the current gated power supply from one of the first power supply and the second power supply that is currently gated to one of the first power supply and the second power supply that is not currently gated (Fleming, pars [32-35, 38]; controlling the power supply gating module to switch the current gated first power supply 101 to the second power supply 102 not currently gated by controlling SCR switch 110 off and SCR 111 On).
Examiner Note: See also Serrano et al. (2007/0114958 A1); the control module (120, 125) further receives a switching instruction (pars [13-14]; switching instruction read on by the external control signal from an operator to command the ATS to change state), and based on the switching instruction, controlling power supply to switch from the first power supply to second power supply (pars [13-14].
Regarding Claim 7,
The combination teaches the claimed subject matter in claim 1 and further teaches wherein the control circuit is further configured to: control, during a switching process of the current gated power supply, the power supply gating circuit to turn off the gating of the current gated power supply (Fleming, pars [32-35, 42] claims 1 and 3; SCR switch 110 is opened/turned off during the switching process), and control the isolation and inverter circuit (combination of Fleming and Wang’s isolation and inverter module) to generate a second isolation and inverter power supply for supplying power to a load (Fleming, 120) during the switching process (Fleming, pars [32-35, 42]; claims 1 and 3 and Wang’s isolation circuit; Modified Fleming generates a second isolation and inverter power supply during the switching process by activating the inverter 114 which is coupled to rectifier 108 and the isolation circuit in the combination of references).
Regarding Claim 8,
The combination teaches the claimed subject matter in claim 7 and further teaches wherein an initial voltage of the amplitude of the second isolation and inverter power supply is higher than that a voltage amplitude of the current gated power supply (Fleming, pars [32, 34, 37] and related discussion and Wang’s isolation; Modified Fleming teaches during the switching process/transient condition, the voltage of the current gated power supply 101 drops while the power supply of the isolation and inverter is active and provides power to the load. Thus, as the voltage drop continues for the failed current gated power supply during the switching process, there is an instant in time where the voltage amplitude of the active isolation and inverter power supply becomes higher than the voltage amplitude of the failing current gated power supply. Note: the claim limitation is written passively/narratively without reciting active control taking place and/or any new distinguishing structure required to make the voltage of the second isolation and inverter power supply higher than that of the current gated power supply), and a voltage amplitude of the second isolation and inverter power supply is adjusted to be the same as a voltage amplitude of an input power supply to be switched to during the switching process (Fleming, pars [34, 38] and related discussion and Wang’s isolation; Modified Fleming teaches the amplitude of the inverter is adjusted to match that of the amplitude of supply 102 to be switched to- this amplitude matching corresponds to matching the voltage amplitude noting that P=V*I).
It is further noted that it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have selected the initial voltage of the second isolation and inverter power supply to be higher than that of the voltage amplitude of the current failing gated power supply, because there is a number of finite options- 1) the initial voltage of the second isolation and inverter power supply to is higher; or 2) lower; or 3) equal to the voltage amplitude of the current gated power supply. One skilled in the art would have been well-aware of the available options and would have obviously selected the option of having the initial voltage amplitude of the second isolation and inverter power supply being higher than the voltage amplitude of the current gated power supply according to the intended design and results of the application. This obviousness is further supported by applicant’s disclosure at par [0029].
Regarding Claim 9,
The combination teaches the claimed subject matter in claim 7 and further teaches wherein an initial phase of the second isolation and inverter power supply is the same as a phase of the current gated power supply (Fleming, par [34] and related discussion and Wang, fig.1, pars [15, 24, 48]; Modified Fleming teaches during the transient power condition, the inverter initial phase is synchronized (i.e., synchronized in phase, frequency) to the current gated power supply 101 before being adjusted to the phase of the power supply being switched to)), and a phase of the second isolation and inverter power supply is adjusted to be the same as a phase of an input power supply to be switched to at a first rate during the switching process (Fleming, par [34] and related discussion and Wang, fig.1, pars [15, 24, 67]; Modified Fleming teaches the power supply from the inverter of the isolation and inverter is adjusted to be the same phase as the new source 102 it is switched to at a first rate/user defined rate during the switching process).
Regarding Claim 10,
The combination teaches the claimed subject matter in claim 7 and further teaches wherein the control circuit is further configured to: when a voltage amplitude of the second isolation and inverter power supply is the same as a voltage amplitude of an input power supply to be switched to (Fleming, pars [32-35, 38] and Wang, fig.1, pars [15, 24, 48]; Fleming teaches that the power output (amplitude, frequency and phase) of the inverter is synchronized to match to that of an input power supply 102 to be switched to. This includes the voltage amplitude since power=V*I as is well understood in the art)) and a phase of the second isolation and inverter power supply is the same as a phase of the input power supply to be switched to (Fleming, pars [32-35, 38] and Wang, fig.1, pars [15, 24, 48]; Fleming teaches that the power output (amplitude, frequency and phase) of the inverter is synchronized to match to that of an input power supply 102 to be switched to)), controlling the power supply gating circuit to gate the input power supply to be switched to (Fleming, pars [32-35, 38] and Wang, fig.1, pars [15, 24, 48]; controlling the power supply gating module to gate the input power supply 102 to be switched to by closing SCR switch 111), and controlling the isolation and inverter circuit to terminate the output of the second isolation and inverter power supply (Fleming, pars [35-36, 38] and Wang, fig.1, pars [15, 24, 48]; controlling the combination’s isolation and inverter circuit to standby mode, which terminates its output of the power supply since it stops delivering power to the load).
Claim(s) 3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Fleming et al. (2003/0048004 A1) in view of English Machine Translation of applicant cited Wang (CN105024450 A) in further view of Bose et al. (11,258,296 B1) in further view of Shaikh et al. (2018/0059754 A1).
Regarding Claim 3,
The combination teaches the claimed subject matter in claim 1. The combination does not explicitly disclose detecting a load state of the current gated power supply, and when it is detected that the current gated power supply is overloaded and a degree of overload is lower than a second threshold, controlling the power supply gating module to maintain the current gated power supply, and controlling the isolation and inverter circuit to generate a first isolation and inverter power supply, wherein the current gated power supply and the first isolation and inverter power supply are jointly output through the power supply output terminal.
Shaikh, however, teaches it is known in the art to detect a load state of the current selected power supply (par [38]; detecting power requirements of the load exceed 134 exceeds the power capability of the current selected power supply), and when it is detected that the current selected power supply is overloaded and a degree of overload is lower than a second threshold (par [38]; detecting the load requirements exceed the power supply capability corresponds to the power supply being overloaded. Shaikh teaches there are different degrees of overload represented by “dynamic spikes in load power requirements”/how much the load exceeds the capacity. Because this degree can vary (e.g., transient spikes versus sustained excess), the overload condition exists over a range. Therefore, Shaikh’s system operates across different degrees of overload, including conditions where the overload is below a higher second threshold that are extreme overload conditions. Note: the second threshold is “undefined” because the claim does not define what the second threshold (limited patentable weight) and can obviously be any value higher than anything Shaikh’s system experiences)), controlling the current power supply to maintain the current power supply (par [38]; the current power supply maintains supplying power to the load 134), and controlling an additional power supply using inverter (160) to jointly output power through the power supply output terminal (par [38]; additional power from the battery through the inverter 160 to the load).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the teachings of modified Fleming to determine an overload of the current gated power supply and to have controlled the isolation and inverter circuit to generate a first isolation and inverter power supply to jointly output with the current gated power supply in modified Fleming. The motivation would have been for protection and safety purposes by distributing the load across additional power supplies to prevent failure and maintain stable operation.
Claim(s) 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Fleming et al. (2003/0048004 A1) in view of English Machine Translation of applicant cited Wang (CN105024450 A) in further view of Bose et al. (11,258,296 B1) in further view of Shaikh et al. (2018/0059754 A1) as applied to claim 3, and in further view of Garrity et al. (2017/0033597 A1).
Regarding Claim 4,
The combination teaches the claimed subject matter in claim 3. The combination does not explicitly disclose wherein the isolation and inverter circuit generates the first isolation and inverter power supply in a current source mode.
Garrity, however, teaches it is known in the art for an inverter to operate in a current source mode (pars [40-41] and related discussion; Garrity teaches an inverter can operate in either a current source mode or a voltage source mode).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the teachings of the combination so that the inverter in the isolation and inverter power circuit generates power in a current source mode. The motivation would have been because Garrity teaches the obviousness of selecting between a current source mode or a voltage source mode and one skilled in the art would have obviously selected the current source mode according to the intended use of the system and the type of load being driven.
Claim(s) 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Fleming et al. (2003/0048004 A1) in view of English Machine Translation of applicant cited Wang (CN105024450 A) in further view of Bose et al. (11,258,296 B1) in further view of Sastry et al. (9,659,721) in further view of Serrano et al. (2005/0057878 A1).
Regarding Claim 5,
The combination teaches the claimed subject matter in claim 1 and further teaches detecting a current
state of the current gated power supply (Fleming, pars [28-29, 32]; Fleming teaches control module 116
sensing the power quality including the current of current gated power supply 101), and when it is
detected that that an operating current of the current gated power supply is not greater than a third
threshold (Fleming, pars [28-29, 32]; Fleming teaches monitoring the power quality of current gated
power supply 101 which includes monitoring the current of the source and determining if it falls outside
of bounds/falls outside of a low and high threshold. If the current does, the switching process to another source occurs. If the current is not greater than a higher undefined third threshold and is within the low and high bounds, the current corresponds to being normal and utilizing the current gated power supply 101 is maintained), controlling the power supply gating module to maintain the current gated power supply (Fleming, pars [28-29, 32]; Fleming teaches monitoring the power quality/operating current of the current gated power supply 101 and determining if it falls outside of bounds/thresholds. When it is within the bounds (i.e., not greater than an undefined high third threshold), the SCR switch 110 is maintained on/no switching to another source is initiated and the currently gated power supply 101 is maintained).
The combination does not explicitly disclose a change speed of the operating current not greater than a threshold.
Sastry, however, teaches it is known in the art to detect a change speed of the operating current is not greater than a threshold (abstract, Col.1, lines 41-51 and related discussion; change speed of current read on by “rate of change of the current” that is compared to a threshold and determining when the rate of change exceeds a threshold which obviously also includes knowledge of when the rate of change is not greater than a threshold and no action, such as opening the switch, is required to take place).
In the combination, when the operating current is not greater than a third threshold and the change speed of the operating current is not greater than a fourth threshold, it corresponds to normal conditions of the current and to maintain the current gated power supply.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the teachings of the combination to incorporate Sastry’s detecting a change speed of the current being not greater than a fourth undefined threshold. The motivation would have been because Fleming already teaches detecting “transient” power conditions and incorporating change speed of the current detection improves detection of transient or rapidly changing conditions, thereby enabling more responsive and reliable control decisions.
The combination not explicitly disclose a first circuit breaker is further provided between the first input terminal and the first power supply, and a second circuit breaker is further provided between the power supply output terminal and a load, wherein a circuit is protected by disconnecting of at least one of the first circuit breaker and the second circuit breaker.
Serrano, however, teaches it is known in the art to have a first circuit breaker (fig.1, 20) further provided
between the first input terminal (see fig.1; input terminal of 12) and the first power supply (see fig.1,
14), and a second circuit breaker (fig.1, 24) is further provided between the power supply output
terminal (fig.1, output terminal of 12) and a load (fig.1, 18), wherein a circuit is protected by
disconnecting of at least one of the first circuit breaker and the second circuit breaker (par [17]).
It would have been obvious before the effective filing date of the claimed invention to have combined
the teachings of the combination to that of Serrano’s circuit breakers. The motivation would have been
to protect the various components in the system as is well-known and well-understood in the art.
Claim(s) 11, 12, 14, 17-19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Fleming et al. (2003/0048004 A1) in view of English Machine Translation of applicant cited Wang (CN105024450 A) in further view of Lin et al. (2013/0106190 A1).
Regarding Claim 11,
Fleming teaches a method comprising:
gating, by a power supply gating circuit, one of a first power supply input through a first
input terminal and a second power supply input through a second input terminal as a current
gated power supply (see rejection of claim 1);
detecting, by a control circuit, a circuit state (see rejection of claim 1);
controlling, by the control circuit and based on a result of the detecting, an inverter circuit to generate an inverter power supply (see rejection of claim 1, Fleming, pars [32-35]);
controlling, by the control circuit and based on a result of the detecting, switching of the current gated power supply by the power supply gating circuit in a switching process (see rejection of claim 1); and
controlling, by the control circuit and based on a result of the detecting, a power supply output terminal to output at least one of the current gated power supply and the inverter power supply (see rejection of claim 1; Fleming, pars [32-35]),
wherein the power supply gating circuit includes a first solid-state switch (pars [32-35, 42], claims 1 and 3; first switch 110 being SCRs with a gate/first solid-state switch) between the first power supply input and the power supply output terminal (for e.g., fig.2, pars [32-35, 42], claims 1 and 3) and a second solid-state switch (pars [32-35, 42], claims 1 and 3; second switch 111 being SCRs with a gate/second solid-state switch) between the first second power supply input and the power supply output terminal (for e.g., fig.2, pars [32-35, 42], claims 1 and 3).
While claim 11’s recitation of “isolation and inverter circuit” is simply nomenclature/a label for a circuit that does not actually require any isolation to take place, Fleming does not explicitly disclose said inverter circuit as further including isolation. Wang is being relied upon to further expedite prosecution.
Wang (fig.1) teaches an isolation (see fig.1, pars [15, 24, 48] “auxiliary power supply unit” includes a transformer depicted as having primary and secondary windings, which includes isolation) in the inverter module pathway either upstream or downstream of the inverter (see fig.1, pars [15, 24, 48]; isolation of the transformer arranged before the inverter or after the inverter- this makes it an “isolation and inverter circuit”).
In the combination, the pathway in Fleming’s inverter circuit would further include an isolation of the transformer upstream of the inverter to form an “isolation and inverter circuit” configured to “generate an isolation and inverter power supply”. Alternatively, Fleming’s autotransformer 117 is used to boost the output voltage of the inverter (Fleming, par [39]) and Wang teaches placing a transformer with isolation that uses boost functionality after the inverter unit (pars [24, 48])- Thus, Fleming’s autotransformer 117 would be substituted with the transformer having isolation to perform the same functionality of boosting the output voltage of the inverter to meet the requirements of the load.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Fleming’s inverter circuit pathway with isolation, as discussed within Wang, to form an “isolation and inverter circuit”. The motivation would have been because it is well-known and well-desired in the art to have isolation in the inverter module pathway of Fleming as taught by Wang and the skilled artisan would have considered it because it provides predictable results. Alternatively, the motivation to substitute Fleming’s autotransformer 117 at the output of the inverter with the transformer of Wang having isolation would have been the obvious substitution of one known component for another to achieve predictable results, namely to boost the output voltage of the inverter to meet the requirements of the load.
The combination does not explicitly disclose the power supply gating circuit further includes a first mechanical switch between the first power supply input and the power supply output and a second mechanical switch between the second power supply input and the power supply output terminal.
Lin, however teaches it is known in the art to have a combination of the first solid-state switch (104) and a first mechanical switch (102) between the first power supply input (see for e.g., figs.2 or 3, input that inputs first power supply V1) and the power supply output terminal (see for e.g., figs.2 or 3) and the second solid-state switch (204) and a second mechanical switch (202) between the second power supply input (see for e.g., figs.2 or 3, second input that inputs second power supply V2) and the power supply output terminal (see for e.g., figs.2 or 3).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the teachings of the combination’s power supply gating circuit to further include a first mechanical switch and a second mechanical switch as claimed and as discussed within Lin. The motivation would have been for purposes of providing known transfer switch components and circuit predictably able to selectively control connection of multiple power sources to a load (see Lin, pars [29-30]). Further, providing a first mechanical switch and a second mechanical switch in the power supply gating circuit provides complete isolation and play important roles of coordination of transferring power between power supplies (Lin, par [31]).
Regarding Claim 12,
The combination teaches the claimed subject matter in claim 11 and further teaches turning on the first solid-state switch and the first mechanical switch (Fleming, see rejection of claim 11, Wang, see rejection of claim 11, Lin, pars [39, 44]; Lin teaches the first solid-state switch 104 and the first mechanical switch 102 are turned on during t5-t6); and turning off the second solid-state switch and the second mechanical switch (Fleming, see rejection of claim 11, Wang, see rejection of claim 11, Lin, pars [39, 44]; Lin teaches the second solid-state switch 204 and second mechanical switch 202 are turned off).
Regarding Claim 14,
The combination teaches the claimed subject matter in claim 11 and further teaches wherein a circuit state includes at least one of a voltage state (Fleming, pars [28, 32, 37] and Wang, par [48]; for e.g., voltage drop), an overload state (non-selected option), a current state (non-selected option), or a current change speed (non-selected option).
Regarding Claim 17,
The combination teaches the claimed subject matter in claim 14.
Claim 17 recites “wherein when the result of the detecting includes the overload state exceeding a second threshold, controlling the power supply output terminal comprises supplying power to a load as a constant current source.” Claim 17 is rejected, because it is directed to the non-selected option of the “overload state”.
Regarding Claim 18,
The combination teaches the claimed subject matter in claim 14. Claim 18 recites “wherein when the result of the detecting includes the current state at the first power supply input not being greater than a third threshold and the current change speed the first power supply input not being greater than a fourth threshold, controlling the power supply output terminal comprises: maintaining the current gated power supply.” Claim 18 is rejected, because it is directed to the non-selected option of the “current state” and “current change speed”.
Regarding Claim 19,
The combination teaches the claimed subject matter in claim 14. Claim 19 recites “further comprising disconnecting a cascading circuit breaker when the result of the detecting includes the current state at the first power supply input exceeding third threshold or the current change speed the first power supply input exceeding a fourth threshold”. Claim 19 is rejected, because it is directed to the non-selected option of the “current state”.
Claim(s) 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Fleming et al. (2003/0048004 A1) in view of English Machine Translation of applicant cited Wang (CN105024450 A) in further view of Lin et al. (2013/0106190 A1) in further view of Zhou et al. (CN112186877)
Regarding Claim 13,
The combination teaches the claimed subject matter in claim 13 and further teaches synchronizing/matching at least one of a phase or an amplitude of one of the first power supply input and the second power supply input during the switching process (Fleming, pars [34-35]; Fleming teaches a gradual adjustment and synchronization of the inverter phase to the second power input during the switching process).
While the combination teaches gradual adjustment and synchronization of the inverter phase to the phase of the second power input, which suggests tracking, the combination does not explicitly disclose tracking.
Zhou, however, teaches it is known in the art to track at least one of a phase (pars [11, 13, 14, 16]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the teachings of the combination to that of tracking of at least one of a phase as discussed within Zhou in order to improve synchronization accuracy and ensure seamless transfer between the sources.
Allowable Subject Matter
Claims 15, 16, 20 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
With respect to claim 15, the prior art of record, taken alone or in combination, does not teach “wherein when the result of the detecting includes the voltage state at the first power supply input exceeding a first threshold, controlling switching of the current gated power supply comprises: turning off the first solid-state switch and the first mechanical switch; switching a contact from the first power supply input to the second power supply input tracking at least one of a phase or an amplitude of the second power supply input until locking occurs; and turning on the second solid-state switch and the second mechanical switch.”
Claim 16 depends on claim 15 and therefore is indicated as allowable for similar reasons.
With respect to claim 20, the prior art of record, taken alone or in combination, does not teach “wherein the isolation and inverter circuit comprises: a first switch having a first end connected to the first input terminal; a second switch having a first end connected to the second input terminal; a switching mode power supply (SMPS) connected to a second end of the first switch and a second end of the second switch; a boost circuit connected to the SMPS; and an inverter connected to the boost circuit.”
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/RASEM MOURAD/Examiner, Art Unit 2836
/REXFORD N BARNIE/Supervisory Patent Examiner, Art Unit 2836
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