Prosecution Insights
Last updated: April 19, 2026
Application No. 18/564,631

IMAGING DEVICE, IMAGING METHOD, AND IMAGING PROGRAM

Non-Final OA §101§102§103
Filed
Nov 28, 2023
Examiner
KY, KEVIN
Art Unit
2671
Tech Center
2600 — Communications
Assignee
Sony Semiconductor Solutions Corporation
OA Round
1 (Non-Final)
76%
Grant Probability
Favorable
1-2
OA Rounds
2y 6m
To Grant
99%
With Interview

Examiner Intelligence

Grants 76% — above average
76%
Career Allow Rate
420 granted / 549 resolved
+14.5% vs TC avg
Strong +25% interview lift
Without
With
+25.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
33 currently pending
Career history
582
Total Applications
across all art units

Statute-Specific Performance

§101
17.6%
-22.4% vs TC avg
§103
46.5%
+6.5% vs TC avg
§102
20.8%
-19.2% vs TC avg
§112
9.9%
-30.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 549 resolved cases

Office Action

§101 §102 §103
DETAILED ACTION Election/Restrictions Applicant’s election without traverse of Group 1, Claims 1-11 and 15-16, in the reply filed on 12/18/2025 is acknowledged. Claims 12-14 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 12/18/2025. Claim Interpretation The following is a quotation of 35 U.S.C. 112(f): (f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph: An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: sensor in claim 1. Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof: Referring to the specifications as filed, the sensor refers to Fig. 1 & Fig. 3 sensor 11 & corresponding ¶32 wherein “the sensor 11 includes a pixel array unit 101, a vertical scanning unit 102, an analog to digital (AD) conversion unit 103, pixel signal lines 106, vertical signal lines VSL, a control unit 1100, and a signal processing unit 1101”. If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. Claim Rejections - 35 USC § 101 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Claim 16 is rejected under 35 U.S.C. 101 because the claimed invention is directed to non-statutory subject matter. Claim 16 covers both statutory and non-statutory embodiments (under the broadest reasonable interpretation of the claim when read in light of the specification and in view of one skilled in the art) and embraces subject matter that is not eligible for patent protection and therefore is directed to non-statutory subject matter. Specifically, the Specification at ¶27-29 wherein “The program that is executed by the imaging device 1 according to the embodiment is recorded in a computer-readable storage medium such as a CD-ROM, a memory card, a CD-R, and a DVD as a file in an installable format or an executable format, and is provided as a computer program product” given the broadest reasonable interpretation does not exclude a signal. Thus, the claims are not eligible subject matter. It is recommended to amend and narrow the claims to cover only statutory embodiments to avoid a rejection under 35 U.S.C. § 101 by adding the limitation "non- transitory" to the claims. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1-4, 6, & 15-16 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Balasubramanian (US 20190102640). Regarding claim 1, Balasubramanian teaches an imaging device (Fig. 1 CNN system 100) including: a sensor that outputs first image data (¶33 An automated navigation system 100 for example can include one or more sensors 102 providing data sets as inputs to a CNN 104 that includes multiple different computational/processing layers with various components; ¶34 sensor 102 can include an image capturing device such as a camera, radar, light detection and ranging (LIDAR), other image scanning devices, or other sensors for detecting and processing data from images, such as those received on the signals from an image capturing device); a first processing unit that executes processing of a first layer in a neural network having a layered structure (¶39 The CNN 104 can comprise a number of computational layers, including a convolution layer 202, a rectified linear unit (RELU) layer 204, a pooling layer 206, a fully connected (FC) layer 208 (artificial neural network layer), and an output layer 210) on the first image data in units of second image data having a size smaller than an entire size of the first image data (¶29 a convolution sliding window (e.g., a 3×3 convolution sliding window or other size of n x n convolution sliding window, with n as a positive integer) can be selected to perform convolution of an image that has been received from sensor data retrieved, and then multiplied with the filter kernel as an inner dot product operation; ¶40 The convolution processes can be performed on sets/segments/subsets/portions of the image data, for example, along sections of an image 232 for a particular feature); and a second processing unit that executes processing of a second layer in the neural network on a processing result output from the first processing unit (¶59 Execution pipelining or pipeline processing can be referred to herein as a set of data processing elements, components or functions connected in series, where the output of one component or element is the input of the next one). Regarding claim 2, Balasubramanian teaches the imaging device according to claim 1, wherein the second image data is image data for a predetermined number of lines in the first image data (¶68 Further utilizing the 3×3 window 308, small sized image data portions that are size 3×3 as an example can be analyzed from the image data stored in memory 304; Sliding the window over by another column, the window results can be 3, 4, 5, 9, 1, 3, 5, 9, 3, forming another sliding window result; e.g. a sliding convolution window necessarily operates on a limited set of image rows and columns, corresponding to a predetermined number of lines). Regarding claim 3, Balasubramanian teaches the imaging device according to claim 1, wherein the processing of the first layer includes convolution processing (¶40 The convolution layer 202, for example, can include one or more convolution components 212 that extract data slices of an image 232 as data sets. The convolution layer 202 can be combined with the rectified linear unit (RELU) layer 204 to also be considered or referred to as one computational layer 230, or, in general, as a convolution layer 230). Regarding claim 4, Balasubramanian teaches the imaging device according to claim 3, wherein the second image data is image data for the number of lines corresponding to the number of rows of a filter used in the convolution processing (¶29 a convolution sliding window (e.g., a 3×3 convolution sliding window or other size of n x n convolution sliding window, with n as a positive integer) can be selected to perform convolution of an image that has been received from sensor data retrieved, and then multiplied with the filter kernel as an inner dot product operation; ¶68 Sliding the window over by another column, the window results can be 3, 4, 5, 9, 1, 3, 5, 9, 3, forming another sliding window result). Regarding claim 6, Balasubramanian teaches the imaging device according to claim 3, wherein the processing of the second layer includes full-connection processing (¶39 The CNN 104 can comprise a number of computational layers, including a convolution layer 202, a rectified linear unit (RELU) layer 204, a pooling layer 206, a fully connected (FC) layer 208 (artificial neural network layer), and an output layer 210). Regarding claim(s) 15 (drawn to a method): The rejection/proposed combination of Balasubramanian, explained in the rejection of device claim(s) 1, anticipates/renders obvious the steps of the method of claim(s) 15 because these steps occur in the operation of the proposed combination as discussed above. Thus, the arguments similar to that presented above for claim(s) 1 is/are equally applicable to claim(s) 15. Regarding claim(s) 16 (drawn to an imaging program): The rejection/proposed combination of Balasubramanian, explained in the rejection of device claim(s) 1, anticipates/renders obvious the steps of the imaging program of claim(s) 16 because these steps occur in the operation of the proposed combination as discussed above. Thus, the arguments similar to that presented above for claim(s) 1 is/are equally applicable to claim(s) 16. See further Balasubramanian ¶134-135. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Balasubramanian as applied to claim 4 above, and further in view of Kondo et al (US 20120182321). Regarding claim 5, Balasubramanian teaches the imaging device according to claim 4, but fails teach where Kondo teaches further including a line memory for the number of lines corresponding to the number of rows of the filter (¶92 The line memory 102 need only be capable of storing as many rows of pixel data as the number of taps of the interpolation filter 103), the sensor sequentially reads the first image data in units of lines and inputs the first image data to the line memory (¶360 the pixel data is sequentially read into the line memory 22 in the order in which the partial image is raster scanned), and the first processing unit executes the processing of the first layer on the second image data stored in the line memory (¶360 the pixel data is sequentially read into the line memory 22 in the order in which the partial image is raster scanned; when the enlarging or reducing processing of a next row begins, the rows of data that were read in the past remain stored in the line memory 22). Therefore, it would have been obvious to one with ordinary skill in the art before the effective filing date of the invention to have implemented the teaching of further including a line memory for the number of lines corresponding to the number of rows of the filter, the sensor sequentially reads the first image data in units of lines and inputs the first image data to the line memory, and the first processing unit executes the processing of the first layer on the second image data stored in the line memory from Kondo into the imaging device as disclosed by Balasubramanian. The motivation for doing this is to improve image conversion method, program and electronic equipment for enlarging or reducing an image. Claim(s) 7-9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Balasubramanian as applied to claim 1 and 3 above, and further in view of Han et al (US 20190251694). Regarding claim 7, Balasubramanian teaches the imaging device according to claim 3, but fails teach where Han teaches wherein the processing of the second layer includes deconvolution processing (¶69 one or more deconvolutional layers). Therefore, it would have been obvious to one with ordinary skill in the art before the effective filing date of the invention to have implemented the teaching of wherein the processing of the second layer includes deconvolution processing from Han into the imaging device as disclosed by Balasubramanian. The motivation for doing this is to improve imaging techniques such as image segmentation with the integration of deep learning. Regarding claim 8, Balasubramanian teaches the imaging device according to claim 1, but fails to teach where Han teaches wherein at least one of the processing of the first layer and the processing of the second layer includes enlargement processing of enlarging the second image data (¶69 one or more deconvolutional layers; ¶87 deconvolution network 434 enlarges the intermediate activation maps or feature maps by using a selection of deconvolutional layers 436 and/or unpooling layers (not shown)). Therefore, it would have been obvious to one with ordinary skill in the art before the effective filing date of the invention to have implemented the teaching of wherein at least one of the processing of the first layer and the processing of the second layer includes enlargement processing of enlarging the second image data from Han into the imaging device as disclosed by Balasubramanian. The motivation for doing this is to improve imaging techniques such as image segmentation with the integration of deep learning. Regarding claim 9, Balasubramanian teaches the imaging device according to claim 1, but fails to teach where Han teaches wherein at least one of the processing of the first layer and the processing of the second layer includes interpolation processing of interpolating between pixels in the second image data (¶86 various functions may be used to implement the pixel-wise prediction layer, such as backwards upsampling or unpooling (e.g., bilinear or nonlinear interpolation)). Therefore, it would have been obvious to one with ordinary skill in the art before the effective filing date of the invention to have implemented the teaching of wherein at least one of the processing of the first layer and the processing of the second layer includes interpolation processing of interpolating between pixels in the second image data from Han into the imaging device as disclosed by Balasubramanian. The motivation for doing this is to improve imaging techniques such as image segmentation with the integration of deep learning. Claim(s) 10-11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Balasubramanian as applied to claim 1 above, and further in view of Kouada et al (US Patent 9588240 B1). Regarding claim 10, Balasubramanian teaches the imaging device according to claim 1, but fails to teach where Kouada teaches wherein the sensor, the first processing unit, and the second processing unit are mounted on a single chip (col 1 lines 5-27 CMOS image sensors can be integrated with all kinds of functional circuitry and blocks in a single chip; A digital imager typically can include a photodiode array, column readout structure, A/D conversion, and digital controllers (or processors) on single or multiple substrates; FIG. 1 depicts conventional four-side buttable BSI imager 100 using multiple layers of chips stacked in a three-dimensional (3D) package. On a first layer, the 3D BSI imager includes imaging sensor array 110 with pixels containing photodiodes that are exposed to incident light). Therefore, it would have been obvious to one with ordinary skill in the art before the effective filing date of the invention to have implemented the teaching of wherein the sensor, the first processing unit, and the second processing unit are mounted on a single chip from Kouada into the imaging device as disclosed by Balasubramanian. The motivation for doing this is to improve performance of image sensors. Regarding claim 11, the combination of Balasubramanian and Kouada teaches the imaging device according to claim 10, wherein the single chip is a stacked chip, and the sensor is disposed in a first layer in the stacked chip, and at least one of the first processing unit and the second processing unit is disposed in a second layer in the stacked chip (Kouada col 1 lines 5-27 CMOS image sensors can be integrated with all kinds of functional circuitry and blocks in a single chip; A digital imager typically can include a photodiode array, column readout structure, A/D conversion, and digital controllers (or processors) on single or multiple substrates; FIG. 1 depicts conventional four-side buttable BSI imager 100 using multiple layers of chips stacked in a three-dimensional (3D) package. On a first layer, the 3D BSI imager includes imaging sensor array 110 with pixels containing photodiodes that are exposed to incident light). Therefore, it would have been obvious to one with ordinary skill in the art before the effective filing date of the invention to have implemented the teaching of wherein the single chip is a stacked chip, and the sensor is disposed in a first layer in the stacked chip, and at least one of the first processing unit and the second processing unit is disposed in a second layer in the stacked chip from Kouada into the imaging device as disclosed by Balasubramanian. The motivation for doing this is to improve performance of image sensors. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to KEVIN KY whose telephone number is (571)272-7648. The examiner can normally be reached Monday-Friday 9-5PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Vincent Rudolph can be reached at 571-272-8243. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /KEVIN KY/Primary Examiner, Art Unit 2671
Read full office action

Prosecution Timeline

Nov 28, 2023
Application Filed
Mar 13, 2026
Non-Final Rejection — §101, §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
76%
Grant Probability
99%
With Interview (+25.3%)
2y 6m
Median Time to Grant
Low
PTA Risk
Based on 549 resolved cases by this examiner. Grant probability derived from career allow rate.

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