Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
This Office Action is sent in response to Application’s Communication received on 11/29/2023 for application number 18/565414. The Office hereby acknowledges receipt of the following and placed of record in file: Specification, Drawing, Abstract, Oath/Declaration, and Claims.
Claims (1-13), (14-20), (21-27) and (28-30) are presented for examination.
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 05/15/2025, 01/08/2025 and 11/29/2023 was filed prior to current Office Action. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Allowable Subject Matter
Claims (1-13), (14-20), (21-27) and (28-30) are directed to allowable subject matter if 101 rejection is addressed.
Claim Rejections - 35 USC§ 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefore, subject to the conditions and requirements of this title.
Claims (1-13), (14-20), (21-27) and (28-30) are rejected under 35 U.S.C. 101 because the claimed invention is directed to a judicial exception (i.e., a law of nature, a natural phenomenon, or an abstract idea) without significantly more.
Step 1: Claims (1-13), (14-20), (21-27) and (28-30) are drawn to a method each of which is within the four statutory categories (e.g., a process, a machine).
Step 2A - Prong One: In prong one of step 2A, the claims are analyzed to evaluate whether they recite a judicial exception.
Claim 1.
An apparatus, comprising:
computation circuitry configured to perform a convolution operation, the computation circuitry having multiple input rows; and
an activation buffer having multiple buffer segments coupled to the multiple input rows of the computation circuitry, respectively, wherein:
each of the multiple buffer segments comprises a first multiplexer having a plurality of multiplexer inputs; and
each of the plurality of multiplexer inputs of one of the first multiplexers on one of the multiple buffer segments is coupled to a data output of the activation buffer on another one of the multiple buffer segments.
The limitation that recites “computation circuitry configured to perform a convolution operation, the computation circuitry having multiple input rows …” which can be defined as mathematical concept, the limitation includes a step of performing a convolution operation which is a mathematical calculation wherein in neural network convolution, input activation are combined with kernel/filter weights, typically through repeated multiplication and accumulation which is a numerical calculation. Thus, the limitation is a mathematical concept.
Similarly, the same rational applies to claim 14 as includes the step of “computation circuitry configured to perform a convolution operation”.
Similarly, the same rational applies to claims 21 and 28 as they include the step of “performing a convolution operation”
MPEP 2106.04(a)(2).I.C states:
. . . A mathematical calculation is a mathematical operation (such as multiplication) or an act of calculating using mathematical methods to determine a variable or number, e.g., performing an arithmetic operation such as exponentiation. There is no particular word or set of words that indicates a claim recites a mathematical calculation. That is, a claim does not have to recite the word "calculating" in order to be considered a mathematical calculation.
Step 2A Prong 2:
Claim 1 recites additional elements such as “circuitry”, “activation buffer”, “multiple buffer segments” and “multiplexer” which are recited at a high level, the elements are merely reciting the words that pertain to a generic computer (or an equivalent) with the judicial exception, or merely including instructions to implement an abstract idea on a computer, or merely using a computer as a tool to perform an abstract idea, as discussed in MPEP § 2106.05(f). The additional element(s) amount to merely the words “apply it” (or an equivalent) or are mere instructions to implement an abstract idea or other exception on a computer. The limitation does not integrate the judicial exception into a practical application.
Dependent claims (2-13), (15-20), (22-25) and (29-30) fail to include any additional elements. In other words, each of the limitations/elements recited in respective dependent claims (2-13), (15-20), (22-25) and (29-30) are further part of the abstract idea as identified by the Examiner for each respective dependent claim (i.e. they are part of the abstract idea recited in each respective claim).
The Examiner has therefore determined that the elements, or combination of additional elements, do not integrate the abstract idea into a practical application. Accordingly, the claims are directed to an abstract idea.
Step 2B: The claim does not provide an inventive concept (significantly more than the abstract idea). The claim is ineligible.
The circuitry”, “activation buffer”, “multiple buffer segments” and “multiplexer” which are recited at a high level and are steps considered insignificant extra solution activity. The limitations are mere data gathering and output input data that is recited at a high level of generality and amount to processing input data using devices that are recited at high level of generality using a generic computer. Even when considered in combination, the additional elements represent mere instructions to apply an exception and insignificant extra-solution activity, which cannot provide an inventive concept.
Dependent claims (2-13), (15-20), (22-25) and (29-30) fail to include any additional elements. In other words, each of the limitations/elements recited in respective dependent claims (2-13), (15-20), (22-25) and (29-30) are further part of the abstract idea as identified by the Examiner for each respective dependent claim (i.e. they are part of the abstract idea recited in each respective claim).
The Examiner has therefore determined that the elements, or combination of additional elements, do not integrate the abstract idea into a practical application. Accordingly, the claims are directed to an abstract idea.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to HASSAN MRABI whose telephone number is (571)272-8875. The examiner can normally be reached on Monday-Friday, 7:30am-5pm. Alt, Friday, EST.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Viker Lamardo can be reached on 571-270-5871. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/HASSAN MRABI/Examiner, Art Unit 2144
Prosecution Insights