DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
1. Claims 1, 3, 8 are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Hosoda et al (USPN 2010/0036555)
Regarding claim 1, Hosoda discloses a power supply control device (a power control device shown in figure 1) that controls a supply of power to a load (a load 1u), comprising:
an upstream switch (an upper arm switch 13a of U phase) configured to be arranged upstream of the load in a current path of a flow of current through the load;
a downstream switch (a lower arm switch 13b of U phase) configured to be arranged downstream of the load in the current path; and
a processing unit (a control unit 8) configured to execute processing (such as execute processing shown in figure 8),
wherein the processing unit (the control unit 8) gives an instruction to switch ON or OFF a first switch (such as a first switch 11b is turned OFF, step 21 in figure 8) that is either one of the upstream switch (13a) and the downstream switch (13b), the processing unit (the control unit 8) determines whether or not current is flowing through the first switch 11b while an instruction to switch OFF the first switch has been given (the current continues to flow due to a short circuit failure while an instruction to switch off, see par. 0042), and
in a case of determining that current is flowing through the first switch (11b), the processing unit gives an instruction to switch OFF a second switch (11a) that is another one of the upstream switch and the downstream switch (see par. 0050, and step 26).
Regarding claim 3, wherein the processing unit (the control unit 8) gives an instruction to switch ON or OFF the upstream switch (such as the switch 13a is turned off , see step 21), the processing unit determines whether or not current is flowing through the upstream switch while an instruction to switch OFF the upstream switch has been given (due to the short circuit failure of the switch 13a, the current continues to flow, see par. 0042), and in a case of determining that current is flowing through the upstream switch, the processing unit gives an instruction to switch OFF the downstream switch (the switch 13b, see step 31 in figure 8).
Regarding claim 8, Hosoda discloses a power supply control method (see figures 1, 8) of controlling a supply of power to a load (such as a load 1U), the power supply control method causing a computer to execute the steps of:
giving an instruction to switch ON or OFF a first switch (such as a first switch 11b is turned OFF, step 21 in figure 8) that is either one of an upstream switch (an upper arm switch 13a) arranged upstream of the load (1U) in a current path of a flow of current through the load and a downstream switch (a lower arm switch 13b) arranged downstream of the load in the current path;
determining whether or not current is flowing through the first switch 11b while an instruction to switch OFF the first switch has been given (the current continues to flow due to a short circuit failure while an instruction to switch off, see par. 0042), and
giving an instruction to switch OFF a second switch (11a) that is another one of the upstream switch (13a) and the downstream switch (13b) in a case where a determination was made that current is flowing through the first switch
(the current continues to flow due to a short circuit failure of the first switch 11b while an instruction to switch off, a second switch 11a turned off, see par. 0042, 0050, and step 26 of figure 8).
2. Claims 1, 3, 4 are rejected under 35 U.S.C. 102 (a)(2) as being anticipated by Masubara et al (USPN 2022/0268854)
Regarding claim 1, Masubara discloses a power supply control device (a power control device 100 shown in figure 1) that controls a supply of power to a load (a load Z), comprising:
an upstream switch (an upper arm switch 110) configured to be arranged upstream of the load in a current path of a flow of current through the load;
a downstream switch (a lower arm switch 120) configured to be arranged downstream of the load in the current path; and
a processing unit (a control device includes 10, 20, 30) configured to execute processing (such as controlling the switches 110, 120),
wherein the processing unit (10, 20, 30) gives an instruction to switch ON or OFF a first switch (during a normal mode, the upper switch 110 is ON and the lower switch 120 is OFF) and the downstream switch (120) (see par. 0060), the processing unit (10, 20, 30) determines whether or not current is flowing through the first switch 11b while an instruction to switch OFF the first switch has been given (the current continues to flow due to a short circuit failure while an instruction to switch off, see par. 0067), and
in a case of determining that current is flowing through the first switch ( the short circuit failure of the upper arm switch 110), the processing unit(10, 20, 30) gives an instruction to switch OFF a second switch (the lower switch 120) that is another one of the upstream switch and the downstream switch (see par. 0065, 0067).
Regarding claim 3, Masubara wherein the processing unit (the control device 10, 20, 30) gives an instruction to switch ON or OFF the upstream switch (see par. 0060), the processing unit determines whether or not current is flowing through the upstream switch (120) while an instruction to switch OFF the upstream switch has been given (due to the short circuit failure of the upper switch 110, the current continues to flow, see par. 0067), and in a case of determining that current is flowing through the upstream switch (the current flows through the upper switch 110 is determined by a current sensor 40 during the short circuit failure of the upper switch 110), the processing unit (10, 20, 30) gives an instruction to switch OFF the downstream switch (the lower switch 120, see par. 0065, 0067).
Regarding claim 4, Masubara discloses wherein the processing unit (10, 20, 30) acquires a voltage value of a downstream end of the upstream switch while the instruction to switch OFF the upstream switch has been given (a voltage detector 31), and in a case where the acquired voltage value is greater than or equal to a voltage threshold value (a second threshold V0), the processing unit determines that current is flowing through the upstream switch (see par. 0071).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
3. Claims 5-6 are rejected under 35 U.S.C. 103 as being unpatentable over Hosoda et al (USPN 2010/0036555) in view of Kawano et al (USPN 2017/0201204).
Regarding claims 5, 6, Hosoda discloses all limitations of claims 1 and 3 as discussed above, but does not explicitly disclose two downstream switches as claimed.
Kawano discloses a power conversion circuit (see figure 2) comprises two of the downstream switches (such as lower arm switches 32U, 37U), the two downstream switches are each a semiconductor switch, a parasitic diode is connected across each of the two downstream switches (such as a parasitic diode shown in figure 2), and an anode of the parasitic diode of one of the downstream switches is connected to an anode of the parasitic diode of another one of the downstream switches, and a cathode of the parasitic diode of one of the downstream switches is connected to a cathode of the parasitic diode of another one of the downstream switches (an anode and a cathode of a parasitic diode of the first switch 32U of the two downstream switches 32U, 37U electrically coupled to an anode and cathode of the switch 37U, see figure 2).
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to have modified the downstream switch of Hosoda to incorporate a two of the downstream switches as disclosed by Kawano in order to allow a motor drive to be continued without generation of a wasted brake torque. Thus, improving a power conversion performance.
4. Claims 2, 9 are rejected under 35 U.S.C. 103 as being unpatentable over Hosoda et al (USPN 2010/0036555) in view of Inada et al (USPN 2024/0204710).
Regarding claim 2, Hosoda discloses wherein the current path is a path of current output from a contactor (5), the processing unit (a control unit 8) receives a supply of power from a connection node (3a) between the contactor and the upstream switch (13a), and the processing unit executes transmission processing for transmitting data to an external device (an external device 4).
Hosoda does not explicitly disclose a fuse as claimed.
Inada discloses a short circuit failure protection for a power device (see figure 3) comprises a current path (from an upper arm to a lower arm) is a path of current output from a fuse (a fuse 60).
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to have modified the contactor switch of Hosoda to incorporate a fuse as disclosed by Kawano in order to provide an overcurrent protection so that protecting circuits from damage due to excessive current flow.
Regarding claim 9, Hosoda discloses wherein the processing unit (the control unit 8) gives an instruction to switch ON or OFF the upstream switch (a switch 11a of the upper arm switch 13a is turned on), the processing unit (8) determines whether or not current is flowing through the upstream switch (13a) while an instruction to switch OFF the upstream switch has been (when a short circuit occurs at the upper switch 13a, see step 21 of figure 8) , and in a case of determining that current is flowing through the upstream switch, the processing unit gives an instruction to switch OFF the downstream switch (in a case a short circuit failure of the upper arm switch 13a, a current continues to flows and determined by the control unit 8 and a downstream switch 13b is cut off, see steps 29-31 of figure 8) (see par. 0057).
5. Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Hosoda et al (USPN 2010/0036555) in view of Masubara et al (USPN 2022/0268854).
Regarding claim 4, Hosoda discloses all limitations of claims 1 and 3 as discussed above, but does not explicitly disclose the processing unit acquires a voltage as claimed.
Masubara discloses a short circuit failure protection circuit (see figure 1) comprises a processing unit (10, 20, 30), wherein the processing unit (10, 20, 30) acquires a voltage value of a downstream end of the upstream switch while the instruction to switch OFF the upstream switch has been given (a voltage detector 31), and in a case where the acquired voltage value is greater than or equal to a voltage threshold value (a second threshold V0), the processing unit determines that current is flowing through the upstream switch (see par. 0071).
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to have modified the processing unit of Hosoda to incorporate a voltage acquire as disclosed by Masubaran order to determine a fault accurately so that location of a failure is quickly identified.
6. Claims 10-11 are rejected under 35 U.S.C. 103 as being unpatentable over Hosoda et al (USPN 2010/0036555) in view of Masubara et al (USPN 2022/0268854), and further in view of Kawano et al (USPN 2017/0201204).
Regarding claims 10, 11, Hosoda and Masubara disclose all limitations of claims 1, 3 and 4 as discussed above, but do not explicitly disclose two downstream switches as claimed.
Kawano discloses a power conversion circuit (see figure 2) comprises two of the downstream switches (such as lower arm switches 32U, 37U), the two downstream switches are each a semiconductor switch, a parasitic diode is connected across each of the two downstream switches (such as a parasitic diode shown in figure 2), and an anode of the parasitic diode of one of the downstream switches is connected to an anode of the parasitic diode of another one of the downstream switches, and a cathode of the parasitic diode of one of the downstream switches is connected to a cathode of the parasitic diode of another one of the downstream switches (an anode and a cathode of a parasitic diode of the first switch 32U of the two downstream switches 32U, 37U electrically coupled to an anode and cathode of the switch 37U, see figure 2).
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to have modified the downstream switch of Hosoda and Masubara to incorporate a two of the downstream switches as disclosed by Kawano in order to allow a motor drive to be continued without generation of a wasted brake torque. Thus, improving a power conversion performance.
Allowable Subject Matter
7. Claims 7, 12-14 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
8. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DANNY NGUYEN whose telephone number is (571)272-2054. The examiner can normally be reached M-F 8:00AM-4:30PM.
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/DANNY NGUYEN/ Primary Examiner, Art Unit 2838
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