DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1 and 5-9 are rejected under 35 U.S.C. 103 as being unpatentable over Sueyoshi (US 2022/0128691 A1).
Regarding Claim 1, Sueyoshi teaches a distance measuring device ([0047] project pulse laser light to a target T, to receive reflected light of the pulse laser light reflected by a target T and to calculate a distance from the laser radar 10 to the target T by multiplying the speed of light which is speed of the pulse laser light by a time period obtained by dividing a round trip time T1 of the pulse laser light by 2) comprising:
a light source unit that continuously emits reference emission light emitted in synchronization with a reference clock signal ([0047] The projection unit 20 projects pulse laser light by a START signal which is in synchronization with a clock signal [0049] The clock generator 41 generates a clock signal of, for example, 400 [MHz] (several hundred [MHz]), that is, a 2.5 [ns] period (constant period) [0062] At time t1, the pulse laser light is projected in synchronization with generation of the clock signal [0068] The clock generator 41 generates the clock signal of the constant period (2.5 [ns] period). The projection unit 20 projects the pulse laser light in synchronization with the clock signal. It is therefore possible to make a generation timing of the clock signal correspond to a projection timing of the laser light) and delayed emission light emitted in synchronization with a delayed clock signal having a delay phase at a same cycle as the reference clock signal ([0051] The delay circuit 44 includes a plurality of delay units 44a, 44b, 44c, . . . which are connected in series. The respective delay units transmit input signals while delaying the input clock signals from the clock generator 41. [0052] A clock signal and 1 are input to the first delay unit 44a. Thus, each delay unit outputs 1 as the carry signal while the clock signal is 1 and outputs 0 as the carry signal while the clock signal is 0. In other words, the respective delay units output signals of the first level when the signals of the first level are input and output signals of the second level (different from the first level) when the signals of the level different from the first level are input [0069] The delay circuit 44 is a circuit in which a plurality of stages of delay units 44a, 44b, 44c, . . . which transmit input signals while delaying the input signals are connected, and to which the clock signal is successively input. Thus, the clock signal is input to the first delay unit 44a sequentially from the head of the clock signal, and is sequentially transmitted to the subsequent delay units 44b, 44c Examiner Note: Sueyoshi teaches transmitting and sequentially delaying the reference clock signal through a continuous chain of serial delay units, where each stage maintains the same cycle but introduces a progressive phase delay, thereby generating functionally equivalent delayed phases of the clock cycle) in a predetermined emission cycle for every predetermined measurement cycle ([0038] to measure a minute time period next using the delay circuit after a minute time period is calculated using the delay circuit. It is therefore possible to successively execute calculation of a minute time period even in a case where measurement of a minute time period is executed as a result of reflected light from smoke, dust, or the like, existing from the laser radar to a target being received, and reflected light from the target is successively received [0065] At time t6, if the pulse laser light is reflected by, for example, the target T… the reflected light is detected, and a time point at which the reflected light is detected becomes a second light reception timing [0071] This eliminates the need to reset output of all the delay units 44a, 44b, 44c to measure a subsequent minute time period using the delay circuit 44, after a minute time period is measured using the delay circuit 44. It is therefore possible to successively execute measurement of a minute time period even in a case where measurement of a minute time period is executed as a result of reflected light from smoke, dust, or the like, between the laser radar 10 to the target T, and reflected light from the target T being successively received);
a light reception signal generation unit that includes a light receiving unit that receives reflected light emitted from the light source unit and reflected by an object ([0047] The light reception unit 30 receives reflected light of the pulse laser light reflected by a target T (object)), detects the reflected light based on the reference emission light and the reflected light on the delayed emission light in synchronization with the reference clock signal, and generates a reference light reception signal and a delayed light reception signal ([0047] outputs a STOP signal when the reflected light is detected [0050] The light reception unit 30 detects the reflected light when intensity of the reflected light exceeds a determination value Ir and sets a time point at which the intensity exceeds the determination value Ir as the light reception timing [0053] The sampling unit 46 samples output of the respective delay units in the delay circuit 44 when the STOP signal is input from the light reception unit 30. The sampling unit 46 connects the sampled output of the respective delay units and acquires binary output for measurement [0054] The encoder 47 receives input of the output for measurement and calculates a fractional time T3 which is a time period from the head of the clock signal until the light reception timing in the period of the clock signal including the light reception timing on the basis of the output for measurement Examiner Note: Sueyoshi teaches that the device detects the reflected light via a STOP signal, which triggers the sampling unit to capture the state of the reference counter (reference signal component) and the position of the clock edge within the delay line chain (delayed signal components) to isolate the light reception timing);
a time-of-flight detection unit that detects time-of-flight data including a reference time of flight based on the generated reference light reception signal ([0050] The counter 42 counts a counter value which is the number of the clock signals generated from a timing at which the START signal which is in synchronization with a generation timing of a clock signal (head) is input until a timing at which the STOP signal is input… The counter 42 calculates a counter time T2 which is a time period obtained by multiplying the counter value by the period of the clock signal. The counter 42 outputs the calculated counter time T2 to the integration unit 48 [0057] The integration unit 48 adds the counter time T2 input from the counter 42 and the fractional time T3 input from the encoder 47 to calculate the round trip time T1 of the pulse laser light (T1=T2+T3) Examiner Note: The reference counter time T2 represents the reference portion of the total time-of-flight data calculation) and a delayed time of flight based on the generated delayed light reception signal ([0054] The encoder 47 receives input of the output for measurement and calculates a fractional time T3 which is a time period from the head of the clock signal until the light reception timing in the period of the clock signal including the light reception timing on the basis of the output for measurement [0056] The encoder 47 multiplies the number of hops by the delay periods of signals delayed by the respective delay units to calculate the fractional time T3. In other words, the encoder 47 encodes the output for measurement to calculate the fractional time T3. The encoder 47 outputs the calculated fractional time T3 to the integration unit 48 [0057] The encoder 47 multiplies the number of hops by the delay periods of signals delayed by the respective delay units to calculate the fractional time T3. In other words, the encoder 47 encodes the output for measurement to calculate the fractional time T3. The encoder 47 outputs the calculated fractional time T3 to the integration unit 48 Examiner Note: The reference fractional time T3 represents the fine or delayed phase portion of the total time-of-flight data calculation) for the every measurement cycle ([0038] the time calculation unit calculates a round trip time of the pulse laser light on the basis of the counter value and the above-described number of hops in the period of the clock signal including the light reception timing. This eliminates the need of resetting outputs of all the delay units to measure a minute time period next using the delay circuit after a minute time period is calculated [0071] This eliminates the need to reset output of all the delay units 44a, 44b, 44c to measure a subsequent minute time period using the delay circuit 44, after a minute time period is measured using the delay circuit 44. It is therefore possible to successively execute measurement of a minute time period even in a case where measurement of a minute time period is executed as a result of reflected light from smoke, dust, or the like, between the laser radar 10 to the target T, and reflected light from the target T being successively received); and
a distance detection unit that detects a distance to the object based on the detected time-of-flight data ([0047] calculate a distance from the laser radar 10 to the target T by multiplying the speed of light which is speed of the pulse laser light by a time period obtained by dividing a round trip time T1 of the pulse laser light by 2).
To the extent that Sueyoshi does not explicitly isolate a standalone, physically separate “delayed clock signal” line to govern emission and detection, it would have been obvious to a person of ordinary skill in the art at the time of the invention to implement the claimed phase-delayed clock architecture using the multi-stage serial delay units taught by Sueyoshi. Sueyoshi teaches a master clock generator that feeds a constant-period reference clock into a tapped delay line consisting of a plurality of serial delay units. Each individual stage within this carry chain delays the input signal by a predictable interval while maintaining the master clock’s constant cycle. Sampling across these consecutive delay stages provides a series of progressive, localized phase shifts of the master clock. It is well-established within the field of digital circuit design and Time-to-Digital Converters (TDCs) that routing a reference clock through a multi-stage tapped delay line is the functional and predictable equivalent of utilizing a reference clock alongside a phase-delayed clock entity to resolve sub-cycle time intervals. A person of ordinary skill in the art would have been motivated to utilize Sueyoshi’s continuous carry signal delay architecture because it eliminates the multi-cycle reset periods typical of conventional phase-difference circuits, thereby enabling high-frequency, back-to-back distance calculations for every sequential measurement cycle without losing successive target data due to atmospheric noise or smoke. Therefore, substituting or implementing the claimed phase-delayed clock arrangement via Sueyoshi’s serial delay stages represents nothing more than the predictable application of known prior elements according to their established function to yield the identical result of continuous fractional time-of-flight resolution. The claimed device is thus rendered obvious.
Regarding Claim 5, Sueyoshi teaches that the light source unit continuously emits a plurality of the delayed emission light in the predetermined emission cycle ([0047] The projection unit 20 projects pulse laser light by a START signal which is in synchronization with a clock signal. [0049] The clock generator 41 generates a clock signal of… a 2.5 [ns] period (constant period) [0069] The delay circuit 44 is a circuit in which a plurality of stages of delay units 44a, 44b, 44c, . . . which transmit input signals while delaying the input signals are connected, and to which the clock signal is successively input. Thus, the clock signal is input to the first delay unit 44a sequentially from the head of the clock signal, and is sequentially transmitted to the subsequent delay units 44b, 44c), the plurality of delayed emission light being emitted in synchronization with a plurality of the delayed clock signals ([0052] each delay unit outputs 1 as the carry signal while the clock signal is 1 and outputs 0 as the carry signal while the clock signal is 0 [0038] the plurality of stages of delay units continue to repeatedly transmit the clock signal of the constant period) having different phase delays from the reference emission light ([0050] generated from a timing at which the START signal which is in synchronization with a generation timing of a clock signal (head) [0056] The number of stages that “10” proceeds in the output for measurement represents the number of hops which is the number of stages of the delay units to which the head of the clock signal is transmitted from when the head of the clock signal is input to the first delay unit 44a until the light reception timing in the period of the clock signal including the light reception timing Examiner Note: Each hop corresponds to a different phase delay relative to the reference transmission which occurs at the head of the clock),
the light reception signal generation unit generates a plurality of delayed light reception signals based on the reference light reception signal and the plurality of delayed emission light ([0053]-[0054] The sampling unit 46 samples output of the respective delay units in the delay circuit 44 when the STOP signal is input from the light reception unit 30. The sampling unit 46 connects the sampled output of the respective delay units and acquires binary output for measurement, for example as shown in FIG. 3. For example, if output of the delay units 44a, 44b, 44c, . . . is respectively “1”, “1”, “0”, . . . , the output for measurement becomes 110 . . . . The sampling unit 46 outputs the acquired output for measurement to the encoder 47. The encoder 47 receives input of the output for measurement and calculates a fractional time T3 which is a time period from the head of the clock signal until the light reception timing in the period of the clock signal including the light reception timing on the basis of the output for measurement. [0056] the encoder 47 searches for “10” from the left in the acquired output for measurement and calculates the number of stages that “10” proceeds. The number of stages that “10” proceeds in the output for measurement represents the number of hops which is the number of stages of the delay units to which the head of the clock signal is transmitted from when the head of the clock signal is input to the first delay unit 44a until the light reception timing in the period of the clock signal including the light reception timing.), and
the time-of-flight detection unit detects the time-of-flight data including the reference time of flight and a plurality of delayed times of flight based on the plurality of delayed light reception signals ([0057]-[0058] The integration unit 48 adds the counter time T2 input from the counter 42 and the fractional time T3 input from the encoder 47 to calculate the round trip time T1 of the pulse laser light (T1=T2+T3). In other words, the integration unit 48 calculates the round trip time T1 of the pulse laser light on the basis of an additional value of the counter time T2 and the fractional time T3. The integration unit 48 outputs the calculated round trip time T1 of the pulse laser light to the distance calculation unit 50… The distance calculation unit 50 multiplies the speed of light, which is the speed of the pulse laser light, by a time period obtained by dividing the round trip time T1 of the pulse laser light by 2 to calculate a distance from the laser radar 10 to the target T. In other words, the distance calculation unit 50 calculates a distance to an object on the basis of the speed of the pulse laser light and the round trip time T1 of the pulse laser light calculated by the time calculation unit.).
Regarding Claim 6, Sueyoshi teaches that the light source unit emits the reference emission light and the plurality of delayed emission light in synchronization with the reference clock signal ([0047] The projection unit 20 projects pulse laser light by a START signal which is in synchronization with a clock signal. [0050] The counter 42 counts a counter value which is the number of the clock signals generated from a timing at which the START signal which is in synchronization with a generation timing of a clock signal (head) is input until a timing at which the STOP signal is input. In other words, the counter 42 counts the number of the clock signals generated from a projection timing at which the pulse laser light is projected by the projection unit 20 until a light reception timing at which reflected light is received by the light reception unit 30. [0069] The delay circuit 44 is a circuit in which a plurality of stages of delay units 44a, 44b, 44c, . . . which transmit input signals while delaying the input signals… the clock signal is successively input… and is sequentially transmitted to the subsequent delay units [0038] the plurality of stages of delay units continue to repeatedly transmit the clock signal of the constant period) and the plurality of delayed clock signals having phase differences at equal intervals, respectively ([0056] The number of stages that “10” proceeds in the output for measurement represents the number of hops which is the number of stages of the delay units to which the head of the clock signal is transmitted from when the head of the clock signal is input to the first delay unit 44a until the light reception timing in the period of the clock signal including the light reception timing [0052] each delay unit outputs 1 as the carry signal while the clock signal is 1 and outputs 0 as the carry signal while the clock signal is 0 Examiner Note: The uniform propagation of the head of the clock through identical delay units corresponds to equal-interval phase differences).
Regarding Claim 7, Sueyoshi teaches that the light source unit emits a plurality of the delayed emission light in the predetermined emission cycles different from each other ([0049] the clock generator 41 generates a clock signal of… a 2.5 [ns] period (constant period) [0047] The projection unit 20 projects pulse laser light by a START signal which is in synchronization with a clock signal [0063] At time t2, the head of the clock signal of the next period is input to the delay circuit 44 while the clock signal of the next period is simultaneously input to the counter 42. At this timing, the counter 42 increments the counter value from 0 to 1. [0064]-[0066] At time t4… the fractional time T31…At time t6, the fractional time T32… the integration unit 48 adds… to calculate a round trip time T11… and… T12 Examiner Note: The system produces delayed emission events in successive, different clock periods, satisfying the requirement that the plurality of delayed emission light is emitted “in predetermined emission cycles different from each other”).
Regarding Claim 8, Sueyoshi teaches a distance measuring method ([0047] project pulse laser light to a target T, to receive reflected light of the pulse laser light reflected by a target T and to calculate a distance from the laser radar 10 to the target T by multiplying the speed of light which is speed of the pulse laser light by a time period obtained by dividing a round trip time T1 of the pulse laser light by 2) comprising:
continuously emitting reference emission light emitted in synchronization with a reference clock signal ([0047] The projection unit 20 projects pulse laser light by a START signal which is in synchronization with a clock signal [0049] The clock generator 41 generates a clock signal of, for example, 400 [MHz] (several hundred [MHz]), that is, a 2.5 [ns] period (constant period) [0062] At time t1, the pulse laser light is projected in synchronization with generation of the clock signal [0068] The clock generator 41 generates the clock signal of the constant period (2.5 [ns] period). The projection unit 20 projects the pulse laser light in synchronization with the clock signal. It is therefore possible to make a generation timing of the clock signal correspond to a projection timing of the laser light) and delayed emission light emitted in synchronization with a delayed clock signal having a delay phase at the same cycle as the reference clock signal ([0051] The delay circuit 44 includes a plurality of delay units 44a, 44b, 44c, . . . which are connected in series. The respective delay units transmit input signals while delaying the input clock signals from the clock generator 41. [0052] A clock signal and 1 are input to the first delay unit 44a. Thus, each delay unit outputs 1 as the carry signal while the clock signal is 1 and outputs 0 as the carry signal while the clock signal is 0. In other words, the respective delay units output signals of the first level when the signals of the first level are input and output signals of the second level (different from the first level) when the signals of the level different from the first level are input [0069] The delay circuit 44 is a circuit in which a plurality of stages of delay units 44a, 44b, 44c, . . . which transmit input signals while delaying the input signals are connected, and to which the clock signal is successively input. Thus, the clock signal is input to the first delay unit 44a sequentially from the head of the clock signal, and is sequentially transmitted to the subsequent delay units 44b, 44c Examiner Note: Sueyoshi teaches transmitting and sequentially delaying the reference clock signal through a continuous chain of serial delay units, where each stage maintains the same cycle but introduces a progressive phase delay, thereby generating functionally equivalent delayed phases of the clock cycle) in a predetermined emission cycle for every predetermined measurement cycle ([0038] to measure a minute time period next using the delay circuit after a minute time period is calculated using the delay circuit. It is therefore possible to successively execute calculation of a minute time period even in a case where measurement of a minute time period is executed as a result of reflected light from smoke, dust, or the like, existing from the laser radar to a target being received, and reflected light from the target is successively received [0065] At time t6, if the pulse laser light is reflected by, for example, the target T… the reflected light is detected, and a time point at which the reflected light is detected becomes a second light reception timing [0071] This eliminates the need to reset output of all the delay units 44a, 44b, 44c to measure a subsequent minute time period using the delay circuit 44, after a minute time period is measured using the delay circuit 44. It is therefore possible to successively execute measurement of a minute time period even in a case where measurement of a minute time period is executed as a result of reflected light from smoke, dust, or the like, between the laser radar 10 to the target T, and reflected light from the target T being successively received);
including a light receiving unit that receives reflected light emitted from the light source unit and reflected by an object ([0047] The light reception unit 30 receives reflected light of the pulse laser light reflected by a target T (object)), detecting the reflected light based on the reference emission light and the reflected light based on the delayed emission light in synchronization with the reference clock signal, and generating a reference light reception signal and a delayed light reception signal ([0047] outputs a STOP signal when the reflected light is detected [0050] The light reception unit 30 detects the reflected light when intensity of the reflected light exceeds a determination value Ir and sets a time point at which the intensity exceeds the determination value Ir as the light reception timing [0053] The sampling unit 46 samples output of the respective delay units in the delay circuit 44 when the STOP signal is input from the light reception unit 30. The sampling unit 46 connects the sampled output of the respective delay units and acquires binary output for measurement [0054] The encoder 47 receives input of the output for measurement and calculates a fractional time T3 which is a time period from the head of the clock signal until the light reception timing in the period of the clock signal including the light reception timing on the basis of the output for measurement Examiner Note: Sueyoshi teaches that the device detects the reflected light via a STOP signal, which triggers the sampling unit to capture the state of the reference counter (reference signal component) and the position of the clock edge within the delay line chain (delayed signal components) to isolate the light reception timing);
detecting time-of-flight data including a reference time of flight based on the generated reference light reception signal ([0050] The counter 42 counts a counter value which is the number of the clock signals generated from a timing at which the START signal which is in synchronization with a generation timing of a clock signal (head) is input until a timing at which the STOP signal is input… The counter 42 calculates a counter time T2 which is a time period obtained by multiplying the counter value by the period of the clock signal. The counter 42 outputs the calculated counter time T2 to the integration unit 48 [0057] The integration unit 48 adds the counter time T2 input from the counter 42 and the fractional time T3 input from the encoder 47 to calculate the round trip time T1 of the pulse laser light (T1=T2+T3) Examiner Note: The reference counter time T2 represents the reference portion of the total time-of-flight data calculation) and a delayed time of flight based on the generated delayed light reception signal for the measurement cycle ([0054] The encoder 47 receives input of the output for measurement and calculates a fractional time T3 which is a time period from the head of the clock signal until the light reception timing in the period of the clock signal including the light reception timing on the basis of the output for measurement [0056] The encoder 47 multiplies the number of hops by the delay periods of signals delayed by the respective delay units to calculate the fractional time T3. In other words, the encoder 47 encodes the output for measurement to calculate the fractional time T3. The encoder 47 outputs the calculated fractional time T3 to the integration unit 48 [0057] The encoder 47 multiplies the number of hops by the delay periods of signals delayed by the respective delay units to calculate the fractional time T3. In other words, the encoder 47 encodes the output for measurement to calculate the fractional time T3. The encoder 47 outputs the calculated fractional time T3 to the integration unit 48 Examiner Note: The reference fractional time T3 represents the fine or delayed phase portion of the total time-of-flight data calculation); and
detecting a distance to the object based on the detected time-of-flight data ([0047] calculate a distance from the laser radar 10 to the target T by multiplying the speed of light which is speed of the pulse laser light by a time period obtained by dividing a round trip time T1 of the pulse laser light by 2).
To the extent that Sueyoshi does not explicitly isolate a standalone, physically separate “delayed clock signal” line to govern the emission and detection steps of the method, it would have been obvious to a person of ordinary skill in the art at the time of the invention to implement the claimed phase-delayed clock steps using the multi-stage serial delay units taught by Sueyoshi. Sueyoshi teaches a master clock generator that feeds a constant-period reference clock into a tapped delay line consisting of a plurality of serial delay units. Each individual stage within this carry chain delays the input signal by a predictable interval while maintaining the master clock’s constant cycle. Sampling across these consecutive delay stages provides a series of progressive, localized phase shifts of the master clock. It is well-established within the field of digital circuit design and Time-to-Digital Converters (TDCs) that routing a reference clock through a multi-stage tapped delay line is the functional and predictable equivalent of utilizing a reference clock step alongside a phase-delayed clock step to resolve sub-cycle time intervals. A person of ordinary skill in the art would have been motivated to utilize Sueyoshi’s continuous carry delay method steps because they eliminate the multi-cycle reset periods typical of conventional phase-difference circuits, thereby enabling high-frequency, back-to-back distance calculations for every sequential measurement cycle without losing successive target data due to atmospheric noise or smoke. Therefore, substituting or implementing the claimed phase-delayed clock steps via Sueyoshi’s sequential serial delay stages represents nothing more than the predictable application of known prior art elements according to their established functions to achieve the identical method result of continuous fractional time-of-flight resolution. The claimed method is thus rendered obvious.
Regarding Claim 9, Sueyoshi teaches a distance measuring sensor ([0047] project pulse laser light to a target T, to receive reflected light of the pulse laser light reflected by a target T and to calculate a distance from the laser radar 10 to the target T by multiplying the speed of light which is speed of the pulse laser light by a time period obtained by dividing a round trip time T1 of the pulse laser light by 2) comprising:
a light reception signal generation unit that includes a light receiving unit that receives reflected light emitted from a light source unit and reflected by an object ([0047] The light reception unit 30 receives reflected light of the pulse laser light reflected by a target T (object), the reflected light obtained by continuously emitting reference emission light emitted in synchronization with a reference clock signal ([0047] The projection unit 20 projects pulse laser light by a START signal which is in synchronization with a clock signal [0049] The clock generator 41 generates a clock signal of, for example, 400 [MHz] (several hundred [MHz]), that is, a 2.5 [ns] period (constant period) [0062] At time t1, the pulse laser light is projected in synchronization with generation of the clock signal [0068] The clock generator 41 generates the clock signal of the constant period (2.5 [ns] period). The projection unit 20 projects the pulse laser light in synchronization with the clock signal. It is therefore possible to make a generation timing of the clock signal correspond to a projection timing of the laser light) and delayed emission light emitted in synchronization with a delayed clock signal having a delay phase at a same cycle as the reference clock signal ([0051] The delay circuit 44 includes a plurality of delay units 44a, 44b, 44c, . . . which are connected in series. The respective delay units transmit input signals while delaying the input clock signals from the clock generator 41. [0052] A clock signal and 1 are input to the first delay unit 44a. Thus, each delay unit outputs 1 as the carry signal while the clock signal is 1 and outputs 0 as the carry signal while the clock signal is 0. In other words, the respective delay units output signals of the first level when the signals of the first level are input and output signals of the second level (different from the first level) when the signals of the level different from the first level are input [0069] The delay circuit 44 is a circuit in which a plurality of stages of delay units 44a, 44b, 44c, . . . which transmit input signals while delaying the input signals are connected, and to which the clock signal is successively input. Thus, the clock signal is input to the first delay unit 44a sequentially from the head of the clock signal, and is sequentially transmitted to the subsequent delay units 44b, 44c Examiner Note: Sueyoshi teaches transmitting and sequentially delaying the reference clock signal through a continuous chain of serial delay units, where each stage maintains the same cycle but introduces a progressive phase delay, thereby generating functionally equivalent delayed phases of the clock cycle) in a predetermined emission cycle for every predetermined measurement cycle ([0038] to measure a minute time period next using the delay circuit after a minute time period is calculated using the delay circuit. It is therefore possible to successively execute calculation of a minute time period even in a case where measurement of a minute time period is executed as a result of reflected light from smoke, dust, or the like, existing from the laser radar to a target being received, and reflected light from the target is successively received [0065] At time t6, if the pulse laser light is reflected by, for example, the target T… the reflected light is detected, and a time point at which the reflected light is detected becomes a second light reception timing [0071] This eliminates the need to reset output of all the delay units 44a, 44b, 44c to measure a subsequent minute time period using the delay circuit 44, after a minute time period is measured using the delay circuit 44. It is therefore possible to successively execute measurement of a minute time period even in a case where measurement of a minute time period is executed as a result of reflected light from smoke, dust, or the like, between the laser radar 10 to the target T, and reflected light from the target T being successively received), detects the reflected light based on the reference emission light and the reflected light based on the delayed emission light in synchronization with the reference clock signal , and generates a reference light reception signal and a delayed light reception signal ([0047] The light reception unit 30 receives reflected light of the pulse laser light reflected by a target T (object))… outputs a STOP signal when the reflected light is detected [0050] The light reception unit 30 detects the reflected light when intensity of the reflected light exceeds a determination value Ir and sets a time point at which the intensity exceeds the determination value Ir as the light reception timing [0053] The sampling unit 46 samples output of the respective delay units in the delay circuit 44 when the STOP signal is input from the light reception unit 30. The sampling unit 46 connects the sampled output of the respective delay units and acquires binary output for measurement [0054] The encoder 47 receives input of the output for measurement and calculates a fractional time T3 which is a time period from the head of the clock signal until the light reception timing in the period of the clock signal including the light reception timing on the basis of the output for measurement Examiner Note: Sueyoshi teaches that the device detects the reflected light via a STOP signal, which triggers the sampling unit to capture the state of the reference counter (reference signal component) and the position of the clock edge within the delay line chain (delayed signal components) to isolate the light reception timing);
a time-of-flight detection unit that detects time-of-flight data including a reference time of flight based on the generated reference light reception signal ([0050] The counter 42 counts a counter value which is the number of the clock signals generated from a timing at which the START signal which is in synchronization with a generation timing of a clock signal (head) is input until a timing at which the STOP signal is input… The counter 42 calculates a counter time T2 which is a time period obtained by multiplying the counter value by the period of the clock signal. The counter 42 outputs the calculated counter time T2 to the integration unit 48 [0057] The integration unit 48 adds the counter time T2 input from the counter 42 and the fractional time T3 input from the encoder 47 to calculate the round trip time T1 of the pulse laser light (T1=T2+T3) Examiner Note: The reference counter time T2 represents the reference portion of the total time-of-flight data calculation) and a delayed time of flight based on the generated delayed light reception signal ([0054] The encoder 47 receives input of the output for measurement and calculates a fractional time T3 which is a time period from the head of the clock signal until the light reception timing in the period of the clock signal including the light reception timing on the basis of the output for measurement [0056] The encoder 47 multiplies the number of hops by the delay periods of signals delayed by the respective delay units to calculate the fractional time T3. In other words, the encoder 47 encodes the output for measurement to calculate the fractional time T3. The encoder 47 outputs the calculated fractional time T3 to the integration unit 48 [0057] The encoder 47 multiplies the number of hops by the delay periods of signals delayed by the respective delay units to calculate the fractional time T3. In other words, the encoder 47 encodes the output for measurement to calculate the fractional time T3. The encoder 47 outputs the calculated fractional time T3 to the integration unit 48 Examiner Note: The reference fractional time T3 represents the fine or delayed phase portion of the total time-of-flight data calculation) for the every measurement cycle ([0038] the time calculation unit calculates a round trip time of the pulse laser light on the basis of the counter value and the above-described number of hops in the period of the clock signal including the light reception timing. This eliminates the need of resetting outputs of all the delay units to measure a minute time period next using the delay circuit after a minute time period is calculated [0071] This eliminates the need to reset output of all the delay units 44a, 44b, 44c to measure a subsequent minute time period using the delay circuit 44, after a minute time period is measured using the delay circuit 44. It is therefore possible to successively execute measurement of a minute time period even in a case where measurement of a minute time period is executed as a result of reflected light from smoke, dust, or the like, between the laser radar 10 to the target T, and reflected light from the target T being successively received); and
a distance detection unit that detects a distance to the object based on the detected time-of-flight data ([0047] calculate a distance from the laser radar 10 to the target T by multiplying the speed of light which is speed of the pulse laser light by a time period obtained by dividing a round trip time T1 of the pulse laser light by 2).
To the extent that Sueyoshi does not explicitly isolate a standalone, physically separate “delayed clock signal” line to govern emission and detection, it would have been obvious to a person of ordinary skill in the art at the time of the invention to implement the claimed phase-delayed clock architecture using the multi-stage serial delay units taught by Sueyoshi. Sueyoshi teaches a master clock generator that feeds a constant-period reference clock into a tapped delay line consisting of a plurality of serial delay units. Each individual stage within this carry chain delays the input signal by a predictable interval while maintaining the master clock’s constant cycle. Sampling across these consecutive delay stages provides a series of progressive, localized phase shifts of the master clock. It is well-established within the field of digital circuit design and Time-to-Digital Converters (TDCs) that routing a reference clock through a multi-stage tapped delay line is the functional and predictable equivalent of utilizing a reference clock alongside a phase-delayed clock entity to resolve sub-cycle time intervals. A person of ordinary skill in the art would have been motivated to utilize Sueyoshi’s continuous carry signal delay architecture because it eliminates the multi-cycle reset periods typical of conventional phase-difference circuits, thereby enabling high-frequency, back-to-back distance calculations for every sequential measurement cycle without losing successive target data due to atmospheric noise or smoke. Therefore, substituting or implementing the claimed phase-delayed clock arrangement via Sueyoshi’s serial delay stages represents nothing more than the predictable application of known prior elements according to their established function to yield the identical result of continuous fractional time-of-flight resolution. The claimed device is thus rendered obvious.
Claims 2-4 are rejected under 35 U.S.C. 103 as being unpatentable over Sueyoshi (US 2022/0128691 A1) in view of Caporale et al. (US 2022/0035010 A1).
Regarding Claim 2, Sueyoshi is not relied upon as teaching that the time-of-flight detection unit detects, as the time-of-flight data, a time-of-flight histogram representing a time of flight as a frequency, the time-of-flight histogram being represented in a bin in which the reference time of flight and the delayed time of flight are shifted by the emission cycle.
However, Caporale teaches that the time-of-flight detection unit detects, as the time-of-flight data, a time-of-flight histogram representing a time of flight as a frequency, the time-of-flight histogram being represented in a bin in which the reference time of flight and the delayed time of flight are shifted by the emission cycle ([0100] Data regarding detected photons by the detector during one of the strobe windows may be stored within histogram bins. The histogram bins may be statistically analyzed to detect a peak number of detected photons within the strobe window. An image subframe may include multiple laser pulses with an associated laser cycle, with a strobe window active in each of the laser cycles. [0115] In general, the effective timing resolution will be a function of the bin width used in the system and the offset duration… In some embodiments, the offset may be controlled by changing the relationship between the internal bin clock reference (gclk, described further herein) and the external laser clock.).
Sueyoshi and Caporale are considered to be analogous to the claimed invention because they are both in the same field of optical distance measurement and time-of-flight (ToF) ranging systems. Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified the time-of-flight detection architecture of Sueyoshi by incorporating the clock-shifting histogram architecture taught by Caporale, to configure the time-of-flight detection unit to record histogram data representing time of flight as a frequency within discrete bins shifted across consecutive emission cycles with a reasonable expectation of success. This modification would have been motivated by the desire to mitigate sensor non-linearities and photon pile-up distortion when ranging highly reflective targets. By integrating Caporale’s teaching of systematically applying incremental timing offsets (dithering) between the detector activation windows (strobe pulses) and the master emitter clock across successive laser cycles within a subframe, the relative alignment of the reference and delayed time-of-flight windows is shifted. This ensures that strong echo returns are distributed across multiple adjacent bins rather than saturating a single leading-edge bin. A person of ordinary skill in the art would recognize that this would yield the predictable result of preserving linear photon sensing capabilities across a wide dynamic range, allowing the system to perform high-resolution interpolation and recover accurate target distances even under high-signal or specular reflection conditions.
Regarding Claim 3, Sueyoshi is not relied upon as teaching that the time-of-flight detection unit detects, as the time-of-flight data, the time-of-flight histogram in which a width of the bin is a cycle of the reference clock signal.
However, Caporale teaches that that the time-of-flight detection unit detects, as the time-of-flight data, the time-of-flight histogram in which a width of the bin is a cycle of the reference clock signal ([0106] In a system incorporating histograms, a strobe window may be broken into n discrete time durations, or bins. Thus, a strobe window oft time duration may be broken into n bins. The bin width, or time duration of the bin as part of the strobe window, may be given by t/n [0115] In general, the effective timing resolution will be a function of the bin width used in the system and the offset duration. In some embodiments, the offset may be controlled by changing the relationship between the internal bin clock reference (gclk, described further herein) and the external laser clock.).
Sueyoshi (as previously modified by Caporale) and Caporale are considered to be analogous to the claimed invention because they are both in the same field of optical distance measurement and time-of-flight ranging systems. Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified the time-of-flight detection architecture of Sueyoshi (as previously modified by Caporale) to further configure the histogram parameters such that the width of each bin corresponds to a single cycle of the reference clock signal with a reasonable expectation of success. This modification would have been motivated by the desire to simplify digital readout logic and eliminate calculation latency within the high-speed time-of-flight detection circuitry. Setting the temporal width of the histogram bins exactly equal to a cycle of the internal reference clock represents a matter of routine design optimization to establish a direct, synchronized timing relationship between incoming photon arrival windows and the master clock distribution network. By matching the clock period directly to the bin duration, the receiver electronics can increment specific memory address locations sequentially on each clock edge without requiring complex sub-cycle phase-tracking or multi-phase division circuitry. A person of ordinary skill in the art would recognize that this would yield the predictable result of providing an efficient, highly stable clock-driven sampling mechanism that streamlines raw data accumulation while maintaining consistent time-stamping accuracy across the sensor array.
Regarding Claim 4, Sueyoshi is not relied upon as teaching that the distance detection unit generates a second time-of-flight histogram that is the time-of-flight histogram formed based on the time-of-flight histogram and configured to have a width of the bin based on a phase difference between the reference clock signal and the delayed clock signal, and detects the distance based on the generated second time-of-flight histogram.
However, Caporale teaches that the distance detection unit generates a second time-of-flight histogram that is the time-of-flight histogram formed based on the time-of-flight histogram ([0156] the signal from the detectors of a pixel may be used to create multiple histograms in response to a single laser pulse, each of which is offset by a fraction of a bin and/or pulse width from the histograms of the other detectors. Thus, in some embodiments, rather than generating the offset histograms sequentially within a subframe in response to multiple laser pulses (one histogram per laser pulse), the multiple histograms can be acquired simultaneously in response to a single laser pulse) and configured to have a width of the bin based on a phase difference between the reference clock signal and the delayed clock signal, and detects the distance based on the generated second time-of-flight histogram ([0163] the outputs of all detectors are routed to their respective memory cells, based on their time, and an arithmetic operation may be performed to increment the arrival counts for the appropriate bin based on the signals from all the detectors, thus recording a set of dithered histograms for this sub-unit. A processing circuit identifies whether a signal echo has been acquired and computes the distance to the target based on the one or more histograms collected [0165] For example, a time-offset clock signal may be distributed to each detector 110d in the macropixel 501. For example, each clock may be offset by an amount T.sub.offset that is given by the equation: T.sub.offset(i)=i*T.sub.clk/n
where T.sub.clk is a global bin clock period).
Sueyoshi (as previously modified by Caporale) and Caporale are considered to be analogous to the claimed invention because they are both in same field of optical distance measurement and time-of-flight (ToF) ranging systems. Therefore, it would have been obvious to a person of ordinary skill in the art before effective filing date of the claimed invention to have modified the time-of-flight detection architecture of Sueyoshi (as previously modified by Caporale) to configure the distance detection unit to synthesize a secondary time-of-flight histogram featuring a fine bin resolution defined by the precise phase difference between multi-phase clock lines and to compute target distance directly from this synthesized histogram with a reasonable expectation of success. This modification would have been motivated by the desire to drastically reduce data acquisition times and power dissipation while maintaining ultra-high temporal precision. Instead of firing multiple sequential laser pulses across several subframes to achieve fine resolution (which increases power consumption and scene latency), integrating Caparole’s teaching allows the system to distribute multiple clock signals with distinct sub-bin phase offsets to a spatial group of detectors simultaneously. This enables the parallel capture of multi-phase histograms from a single laser pulse, which are then combined into a single, high-resolution secondary histogram where the phase differences form fine, interleaved measurement bins. A person of ordinary skill in the art would recognize that this would yield the predictable result of enabling super-resolution distance calculations within a single acquisition frame, thereby capturing fast-moving targets accurately without the temporal artifacts or pulse overhead of sequential multi-phase dithering.
Conclusion
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/E.H.H./Patent Examiner, Art Unit 3645
/HELAL A ALGAHAIM/SPE , Art Unit 3645
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