Office Action Predictor
Last updated: April 17, 2026
Application No. 18/566,846

METHOD, COMMUNICATION DEVICE, PROCESSING DEVICE, AND STORAGE MEDIUM FOR PERFORMING CHANNEL ENCODING, AND METHOD AND COMMUNICATION DEVICE FOR PERFORMING CHANNEL DECODING

Non-Final OA §102
Filed
Dec 04, 2023
Examiner
NDIAYE, CHEIKH T
Art Unit
2447
Tech Center
2400 — Computer Networks
Assignee
LG electronics Inc.
OA Round
1 (Non-Final)
79%
Grant Probability
Favorable
1-2
OA Rounds
2y 10m
To Grant
98%
With Interview

Examiner Intelligence

Grants 79% — above average
79%
Career Allow Rate
564 granted / 717 resolved
+20.7% vs TC avg
Strong +19% interview lift
Without
With
+19.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 10m
Avg Prosecution
23 currently pending
Career history
740
Total Applications
across all art units

Statute-Specific Performance

§101
13.0%
-27.0% vs TC avg
§103
35.9%
-4.1% vs TC avg
§102
31.6%
-8.4% vs TC avg
§112
8.0%
-32.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 717 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Applicant amended claims 1, 5-7, and 11 and cancelled claims 8-10 in the preliminary amendment filed on 12/04/2025. The claims 1-7 and 11 are pending. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1- 7 and 11 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Jang et al (US Publication No. 2019/0305887 A1). With respect to claim 1, Jang teaches a method of performing channel encoding by a communication device (transmitting end 110, Figs. 1-2) in a wireless communication system (Abstract), the method comprising: generating coded bits d_0,d_1,d_2, ..., d_(N - 1) by encoding an information block of length K based on a polar code of length N (paragraph 0096-0097 disclose the polar code encoder 406 may receive the generated coding input bit sequence from the encoding input sequence mapper 404 and perform polar code encoding. That is, the polar code encoder 406 may receive the generated coding input bit sequence u from the encoding input sequence mapper 404, perform polar code encoding, and output a bit sequence having the same length. Specifically, the polar code encoder 406 may generate an encoding output bit sequence v={v.sub.0, v.sub.1, . . . , v.sub.K−1} having the same length N by multiplying the encoding input bit sequence u having the length N and a generator matrix G of the polar code); performing limited buffer rate matching (LBRM) to store the coded bits d_0,d_1, d_2,d_(N - 1) in a circular buffer of length NIR, where N is greater than NIR (paragraph 0100-0101; 0233-0235 disclose the encoding output bit sequence x may be interleaved in units of 32 sub-blocks and rearranged to be x′={(x′.sub.0, x′.sub.1, . . . , x′.sub.N-1}. Further, the rate matcher 408 may store x′ in a circular buffer, extract x′ sequentially starting at a preset bit, and generate a codeword sequence of a length E); performing rate matching on the coded bits stored in the circular buffer to generate a rate matching output sequence of length E (paragraph 0100-0101; 0233-0235 disclose the rate matcher 408 may receive the output bit sequence x from the polar code encoder 406 and output a bit sequence having a length E to be transmitted…a process of generating, from the encoded output bit sequence x, the bit sequence having the length E to be transmitted may be referred to as rate matching); and transmitting the rate matching output sequence (paragraph 0100-0101; 0233-0235 disclose transmitting, the transmission bit sequence c), wherein performing the LBRM comprises: i) puncturing (N - NIR) coded bits among the coded bits d_0,d_1,d_2,..., d_(N - 1) based on that K/E is smaller than or equal to R (paragraph 0100-0101; 0231-0235; Table 14; Table 15 disclose the rate matcher 408 may perform one of puncturing and shortening operations. The rate matcher 408 may puncture preset bits in the output bit sequence x of the encoding input sequence mapper 404 through the puncturing process and may not transmit the preset bits. The rate matcher 408 may map zero-capacity bits which cannot transmit information in the input bit sequence u of the polar code to frozen bits based on the location of a preset bit which is not transmitted in the output bit sequence x; The Bit selection may be performed by using a circular buffer. The bit sequence after the sub-block interleaver y.sub.0, y.sub.1, y.sub.2, . . . , y.sub.N-1 is written into the circular buffer of length N. [0235] Denoting by E the rate matching output sequence length, a bit selection output bit sequence e.sub.k, k=0, 1, 2, . . . , E−1, may be generated by repetitions, puncturing or shortening. For example, the bit selection output bit sequence may be generated according to Table 15 below); and ii) shortening (N - NIR) coded bits among the coded bits d_0,d_1,d_2,..., d_(N - 1) based on that K/E is greater than R, where R is a predetermined value (paragraph 0100-0101; 0232-0235; Table 14; Table 15 disclose the Bit selection may be performed by using a circular buffer. The bit sequence after the sub-block interleaver y.sub.0, y.sub.1, y.sub.2, . . . , y.sub.N-1 is written into the circular buffer of length N. [0235] Denoting by E the rate matching output sequence length, a bit selection output bit sequence e.sub.k, k=0, 1, 2, . . . , E−1, may be generated by repetitions, puncturing or shortening. For example, the bit selection output bit sequence may be generated according to Table 15 below), wherein puncturing the (N - NIR) coded bits comprises excluding first (N - NIR) coded bits among the coded bits d_0,d_1,d_2,...,d_(N-1) (paragraph 0100-0101; 0232-0235; Table 14; Table 15 disclose the Bit selection may be performed by using a circular buffer. The bit sequence after the sub-block interleaver y.sub.0, y.sub.1, y.sub.2, . . . , y.sub.N-1 is written into the circular buffer of length N. [0235] Denoting by E the rate matching output sequence length, a bit selection output bit sequence e.sub.k, k=0, 1, 2, . . . , E−1, may be generated by repetitions, puncturing or shortening. For example, the bit selection output bit sequence may be generated according to Table 15 below), and wherein shortening the (N - NIR) coded bits comprises excluding last (N - NIR) coded bits among the coded bits d_0,d_1,d_2,...,d_(N-1) (paragraph 0100-0101; 0232-0235; Table 14; Table 15 disclose the Bit selection may be performed by using a circular buffer. The bit sequence after the sub-block interleaver y.sub.0, y.sub.1, y.sub.2, . . . , y.sub.N-1 is written into the circular buffer of length N. [0235] Denoting by E the rate matching output sequence length, a bit selection output bit sequence e.sub.k, k=0, 1, 2, . . . , E−1, may be generated by repetitions, puncturing or shortening. For example, the bit selection output bit sequence may be generated according to Table 15 below). With respect to claim 2, Jang teaches wherein performing the rate matching comprises performing puncturing to exclude first (NIR - E) coded bits among the coded bits stored in the circular buffer based on that K/E is smaller than or equal to R and that E is smaller than NIR (Fig. 4; paragraph 0232-0235; Table 14; Table 15 disclose the Bit selection may be performed by using a circular buffer. The bit sequence after the sub-block interleaver y.sub.0, y.sub.1, y.sub.2, . . . , y.sub.N-1 is written into the circular buffer of length N. [0235] Denoting by E the rate matching output sequence length, a bit selection output bit sequence e.sub.k, k=0, 1, 2, . . . , E−1, may be generated by repetitions, puncturing or shortening. For example, the bit selection output bit sequence may be generated according to Table 15 below). With respect to claim 3, Jang teaches wherein performing the rate matching comprises performing shortening to exclude last (NIR - E) coded bits among the coded bits stored in the circular buffer based on that K/E is greater than R and that E is smaller than NIR (paragraph 0232-0235; Table 14; Table 15 disclose the Bit selection may be performed by using a circular buffer. The bit sequence after the sub-block interleaver y.sub.0, y.sub.1, y.sub.2, . . . , y.sub.N-1 is written into the circular buffer of length N. Denoting by E the rate matching output sequence length, a bit selection output bit sequence e.sub.k, k=0, 1, 2, . . . , E−1, may be generated by repetitions, puncturing or shortening. For example, the bit selection output bit sequence may be generated according to Table 15 below). With respect to claim 4, Jang teaches wherein performing the rate matching comprises cyclically repeating first (E- NIR) coded bits among the coded bits stored in the circular buffer based on that E is greater than NIR (paragraph 0232-0235; Table 14; Table 15 disclose the Bit selection may be performed by using a circular buffer. The bit sequence after the sub-block interleaver y.sub.0, y.sub.1, y.sub.2, . . . , y.sub.N-1 is written into the circular buffer of length N. [0235] Denoting by E the rate matching output sequence length, a bit selection output bit sequence e.sub.k, k=0, 1, 2, . . . , E−1, may be generated by repetitions, puncturing or shortening. For example, the bit selection output bit sequence may be generated according to Table 15 below). With respect to claim 5, Jang teaches freezing bit indices corresponding to coded bits d_0 to d_(N -NIR - 1) among the coded bits d_0,d_1, d_2, ..., d_(N - 1) among N input bit indices of the polar code, based on that K/E is smaller than or equal to R (paragraph 0101 disclose the rate matcher 408 may puncture preset bits in the output bit sequence x of the encoding input sequence mapper 404 through the puncturing process and may not transmit the preset bits. The rate matcher 408 may map zero-capacity bits which cannot transmit information in the input bit sequence u of the polar code to frozen bits based on the location of a preset bit which is not transmitted in the output bit sequence x). With respect to claim 6, Jang teaches freezing bit indices corresponding to coded bits d_NIR to d (N-1) among the coded bits d_0,d_1,d_2, ..., d_(N - 1) among N input bit indices of the polar code, based on that K/E is greater than R (paragraph 0101 disclose the shortening process of the rate matcher 408 may include a process of mapping frozen bits to preset bits in the input bit sequence u of the polar code such that preset bits become “0” in the encoding output bit sequence x). The limitations of claim 7 are rejected in the analysis of claim 1 above, and the claim is rejected on that basis. With respect to claim 11, Jang teaches a communication device configured to perform channel decoding (receiving apparatus 120 performing decoding, Figs. 1 and 3) in a wireless communication system, the communication device comprising: at least one transceiver; at least one processor; and at least one computer memory operably connected to the at least one processor (Fig. 3) and storing instructions that, when executed, cause the at least one processor to perform operations comprising: receiving a rate-matched sequence of length E from another communication device; (paragraph 0100-0105; 0195 disclose a process of generating, from the encoded output bit sequence x, the bit sequence having the length E to be transmitted may be referred to as rate matching; the receiving end receiving encoded signals from the transmitting end through a channel); determining NIR coded bits based on the rate-matched sequence, where NIR is a length of a circular buffer of the other communication device (paragraph 0197; 0234 disclose the receiving end may inversely perform the rate-matching process performed by the transmitter before performing the polar code decoding. For example, the receiving end may determine an LLR value corresponding to relevant bits according to the puncturing, shortening, or repetition scheme determined based on the number of input bits and the number of transmission bits; The bit sequence after the sub-block interleaver y.sub.0, y.sub.1, y.sub.2, . . . , y.sub.N-1 is written into the circular buffer of length N); determining coded bits d_0,d_1, d_2, ..., d_(N - 1) based on limited buffer rate matching (LBRM) and the NIR coded bits (paragraph 0197 disclose the receiving end may inversely perform the rate-matching process performed by the transmitter before performing the polar code decoding. For example, the receiving end may determine an LLR value corresponding to relevant bits according to the puncturing, shortening, or repetition scheme determined based on the number of input bits and the number of transmission bits); and decoding the coded bits d_0,d_1, d_2, ..., d_(N - 1) based on a polar code of length N to determine an information block of length K (paragraph 0197-0198 disclose the receiving end performs polar code decoding. For example, the receiving end may output an estimated value for the encoding input bit sequence through SC-based decoding based on the LLR value determined through the rate dematching process. In some embodiments, the SC-based decoding scheme may include SC-list and SC-stack decoding schemes), wherein the LBRM (rate matching) comprises: i) puncturing (N - NIR) coded bits among the coded bits d_0,d_1,d_2,..., d_(N - 1) based on that K/E is smaller than or equal to R (paragraph 0100-0101; 0231-0235; Table 14; Table 15 disclose the rate matcher 408 may perform one of puncturing and shortening operations. The rate matcher 408 may puncture preset bits in the output bit sequence x of the encoding input sequence mapper 404 through the puncturing process and may not transmit the preset bits. The rate matcher 408 may map zero-capacity bits which cannot transmit information in the input bit sequence u of the polar code to frozen bits based on the location of a preset bit which is not transmitted in the output bit sequence x; The Bit selection may be performed by using a circular buffer. The bit sequence after the sub-block interleaver y.sub.0, y.sub.1, y.sub.2, . . . , y.sub.N-1 is written into the circular buffer of length N. [0235] Denoting by E the rate matching output sequence length, a bit selection output bit sequence e.sub.k, k=0, 1, 2, . . . , E−1, may be generated by repetitions, puncturing or shortening. For example, the bit selection output bit sequence may be generated according to Table 15 below); and ii) shortening (N - NIR) coded bits among the coded bits d_0,d_1,d_2,..., d_(N - 1) based on that K/E is greater than R, where R is a predetermined value (paragraph 0100-0101; 0232-0235; Table 14; Table 15 disclose the Bit selection may be performed by using a circular buffer. The bit sequence after the sub-block interleaver y.sub.0, y.sub.1, y.sub.2, . . . , y.sub.N-1 is written into the circular buffer of length N. [0235] Denoting by E the rate matching output sequence length, a bit selection output bit sequence e.sub.k, k=0, 1, 2, . . . , E−1, may be generated by repetitions, puncturing or shortening. For example, the bit selection output bit sequence may be generated according to Table 15 below), wherein puncturing the (N - NIR) coded bits comprises excluding first (N - NIR) coded bits among the coded bits d_0,d_1,d_2,...,d_(N-1) (paragraph 0100-0101; 0232-0235; Table 14; Table 15 disclose the Bit selection may be performed by using a circular buffer. The bit sequence after the sub-block interleaver y.sub.0, y.sub.1, y.sub.2, . . . , y.sub.N-1 is written into the circular buffer of length N. [0235] Denoting by E the rate matching output sequence length, a bit selection output bit sequence e.sub.k, k=0, 1, 2, . . . , E−1, may be generated by repetitions, puncturing or shortening. For example, the bit selection output bit sequence may be generated according to Table 15 below), and wherein shortening the (N - NIR) coded bits comprises excluding last (N - NIR) coded bits among the coded bits d_0,d_1,d_2,...,d_(N-1) (paragraph 0100-0101; 0232-0235; Table 14; Table 15 disclose the Bit selection may be performed by using a circular buffer. The bit sequence after the sub-block interleaver y.sub.0, y.sub.1, y.sub.2, . . . , y.sub.N-1 is written into the circular buffer of length N. [0235] Denoting by E the rate matching output sequence length, a bit selection output bit sequence e.sub.k, k=0, 1, 2, . . . , E−1, may be generated by repetitions, puncturing or shortening. For example, the bit selection output bit sequence may be generated according to Table 15 below). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHEIKH T NDIAYE whose telephone number is (571)270-3914. The examiner can normally be reached Monday-Friday 8:00am-5:30pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, JOON H HWANG can be reached at 571-272-4036. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CHEIKH T NDIAYE/Primary Examiner, Art Unit 2447 12/11/2025
Read full office action

Prosecution Timeline

Dec 04, 2023
Application Filed
Dec 13, 2025
Non-Final Rejection — §102
Mar 19, 2026
Response Filed

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12603751
AN INCOHERENT CLOCKING METHOD
2y 5m to grant Granted Apr 14, 2026
Patent 12592918
Browser Extension for Validating Communications
2y 5m to grant Granted Mar 31, 2026
Patent 12587433
NODE HEALTH PREDICTION BASED ON FAILURE ISSUES EXPERIENCED PRIOR TO DEPLOYMENT IN A CLOUD COMPUTING SYSTEM
2y 5m to grant Granted Mar 24, 2026
Patent 12581545
SESSION MANAGEMENT FUNCTION SELECTION AND BLOCKING
2y 5m to grant Granted Mar 17, 2026
Patent 12580808
PROCESSOR FOR PERFORMING, WHEN PROBLEM OCCURS, RECOVERY ROUTINE ON BASIS OF MONITORING OF NETWORK STATE AND THROUGHPUT, AND ELECTRONIC DEVICE INCLUDING SAME
2y 5m to grant Granted Mar 17, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

AI Strategy Recommendation

Get an AI-powered prosecution strategy using examiner precedents, rejection analysis, and claim mapping.
Powered by AI — typically takes 5-10 seconds

Prosecution Projections

1-2
Expected OA Rounds
79%
Grant Probability
98%
With Interview (+19.0%)
2y 10m
Median Time to Grant
Low
PTA Risk
Based on 717 resolved cases by this examiner. Grant probability derived from career allow rate.

Sign in for Full Analysis

Enter your email to receive a magic link. No password needed.

Free tier: 3 strategy analyses per month