Prosecution Insights
Last updated: July 17, 2026
Application No. 18/567,567

COMPONENT HAVING IMPROVED PROPERTIES WITH REGARD TO WAVELENGTH BROADENING

Non-Final OA §103
Filed
Dec 06, 2023
Priority
Jun 11, 2021 — DE 10 2021 115 230.5 +2 more
Examiner
NIU, XINNING
Art Unit
Tech Center
Assignee
Ams-osram AG
OA Round
1 (Non-Final)
83%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
87%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allowance Rate
846 granted / 1021 resolved
+22.9% vs TC avg
Minimal +4% lift
Without
With
+4.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
23 currently pending
Career history
1048
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
92.0%
+52.0% vs TC avg
§102
1.5%
-38.5% vs TC avg
§112
2.5%
-37.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1021 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 1-16 are rejected under 35 U.S.C. 103 as being unpatentable over Raring et al. (US 9,800, 017) in view of Ishida et al. (US PG Pub 2020/0313398). Regarding claim 1, Raring et al. disclose: a component having a semiconductor chip which is formed as a double-emitter with exactly two emitter regions (laser 1 and laser 2) or each as a triple-emitter with exactly three emitter regions and are thus different from a single-emitter (Fig. 3, col. 20, lines 20-28), the semiconductor chip having laser diodes having respective ridges, the ridges defining the emitter regions (col. 14, lines 31-46). Raring et al. do not disclose: a component having a carrier and exactly two semiconductor chips which are arranged next to one another on the carrier, wherein the emitter regions of the component are assigned to exactly the two semiconductor chips, and the exactly two semiconductor chips are electrically contacted via the carrier. Ishida et al. disclose: a component having a carrier (32) and exactly two semiconductor chips (14 and 15) which are arranged next to one another on the carrier (Fig. 6, [0056], [0061], [0062]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Raring by placing two of the semiconductor chips on the carrier of Ishida in order to obtain a combined laser beam with high power output. The device as modified disclose: wherein the emitter regions of the component are assigned to exactly the two semiconductor chips, and the exactly two semiconductor chips are electrically contacted via the carrier (Ishida, [0062]). PNG media_image1.png 516 786 media_image1.png Greyscale Fig. 1 of Raring PNG media_image2.png 408 616 media_image2.png Greyscale Fig. 6 of Ishida Regarding claim 2, Raring as modified disclose: wherein the exactly two semiconductor chips are each formed as double-emitters with exactly two emitter regions (each of the emitters in the device as modified is a double emitter with exactly two emitter regions) (Raring, Fig. 3, col. 20, lines 20-28). Regarding claim 3, Raring as modified do not disclose: wherein the exactly two semiconductor chips are each formed as triple-emitters with exactly three emitter regions. Ishida et al. disclose: laser chip with three emitter regions (11, 12 and 13) (Fig. 1, [0038]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Raring by forming each semiconductor chip with three emitter regions on each chip in order to obtain a combined laser beam with high power output. Regarding claim 4, Raring as modified disclose: wherein the emitter regions are each configured to generate coherent radiation (lasers generate coherent radiation) (see the rejection of claim 1). Regarding claim 5, Raring as modified disclose: wherein the exactly two semiconductor chips have the same structure (see the rejection of claim 1). Regarding claim 6, Raring as modified do not disclose: wherein the emitter regions of the same semiconductor chip are parallel to each other and are spatially spaced apart by a lateral distance (Fig. 3, col. 20, lines 20-28). Raring as modified do not disclose: the lateral distance being from 20 μm to 60 μm. However, In accordance with MPEP 2144.05 II, Optimization of Ranges: Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation. In the prior art the general conditions are disclosed, a component comprising semiconductor chips, each semiconductor chip having emitter regions that are parallel to each other spaced apart by a lateral distance. Therefore, it would have been obvious to one of ordinary skill in the art at the time of the invention to obtain a workable range of values for the lateral distance by routine experimentation. Regarding claim 7, Raring as modified do not disclose: wherein the exactly two semiconductor chips are spatially spaced apart from each other by a lateral intermediate region (see the rejection of claim 1). Raring as modified do not disclose: the lateral intermediate region being from 5 μm to 50 μm wide. However, In accordance with MPEP 2144.05 II, Optimization of Ranges: Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation. In the prior art the general conditions are disclosed, a component comprising semiconductor chips, the exactly two semiconductor chips are spatially spaced apart from each other by a lateral intermediate region. Therefore, it would have been obvious to one of ordinary skill in the art at the time of the invention to obtain a workable range of values for the lateral intermediate region by routine experimentation. Regarding claim 8, Raring as modified disclose: which has an equidistant lateral separation distance for all emitter regions (lateral separation distance between emitter regions in each laser chip is the same) (Raring, Fig. 3, col. 20, lines 20-28). Regarding claim 9, Raring as modified disclose: wherein the exactly two semiconductor chips each have the same lateral distance between the emitter regions associated with the respective semiconductor chip, wherein two adjacent emitter regions of different semiconductor chips are spatially spaced apart from each other by an intermediate distance (see the rejection of claim 1). Raring as modified do not disclose: and the lateral intermediate distance between the two adjacent emitter regions of different semiconductor chips is different from the lateral distance between two adjacent emitter regions of the same semiconductor chip. However, In accordance with MPEP 2144.05 II, Optimization of Ranges: Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation. In the prior art the general conditions are disclosed, a component comprising semiconductor chips, each semiconductor chip having emitter regions with a lateral distance between the emitter regions, each semiconductor chip having a lateral distance from the other semiconductor chip. Therefore, it would have been obvious to one of ordinary skill in the art at the time of the invention to obtain a workable range of values for the lateral distance between each semiconductor chip routine experimentation. Regarding claim 10, Raring as modified disclose: wherein the lateral intermediate distance between the two adjacent emitter regions of different semiconductor chips is greater than the lateral distance between the two adjacent emitter regions of the same semiconductor chip (see the rejection of claim 9). Regarding claim 11, Raring as modified disclose: wherein the exactly two semiconductor chips each have connection pads (electrode on an upper surface of each laser chip), the exactly two semiconductor chips being electrically conductively connected to a contact structure of the carrier via the connection pads (Ishida, Fig. 6, [0056], [0061]-[0063]). Regarding claim 12, Raring as modified disclose: wherein the number of connection pads of a semiconductor chip is equal to the number of the emitter regions of the associated semiconductor chip (Ishida, Fig. 6, [0056], [0061]-[0063]). Regarding claim 13, Raring as modified do not disclose: wherein the semiconductor chips have through-contacts, each of which is formed to make electrical contact with one of the ridges, the through-contacts extend along the entire lateral extent of the associated ridges, and the number of through-contacts is identical to the number of connection pads and/or the number of ridges. The examiner takes official notice that a semiconductor chip having through-contacts that extend along the entire lateral extent of the associated ridges was well known in the art before the time of filing. For example, see Takeya et al. (US PG Pub 2003/0136970) which discloses through contact (19) that extend along the entire lateral extent of the associated ridges (14) and electrical contact (20) (Fig. 2, [0110]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Raring as modified by forming a through contact for each ridge in order to reduce current spreading in each emitter. Regarding claim 14, Raring as modified do not disclose: wherein the emitter regions are arranged next to each other in such a way that a wavelength broadening of 10 nm+/−5 nm is achieved. However, In accordance with MPEP 2144.05 II, Optimization of Ranges: Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation. In the prior art the general conditions are disclosed, a component comprising semiconductor chips, each semiconductor chip having emitter regions arranged next to each other to cause wavelength broadening (inherent). Therefore, it would have been obvious to one of ordinary skill in the art at the time of the invention to obtain a workable range of values for the wavelength broadening by routine experimentation. Regarding claim 15, Raring as modified do not disclose: which comprises a plurality of resonators, wherein the emitter regions are arranged next to each other such that, in operation of the component, spectra of individual emitter regions are superimposed with a wavelength offset that is from 2 μm to 5 μm between the individual resonators, thereby achieving a spectral width of 10 nm+/−5 nm. However, In accordance with MPEP 2144.05 II, Optimization of Ranges: Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation. In the prior art the general conditions are disclosed, a component comprising semiconductor chips, each semiconductor chip having emitter regions arranged next to each other, spectra of individual emitter regions are superimposed with a wavelength offset. Therefore, it would have been obvious to one of ordinary skill in the art at the time of the invention to obtain a workable range of values for the wavelength offset by routine experimentation. Regarding claim 16, Raring as modified do not disclose: an AR, VR or data glasses comprising the component according to claim 1. The examiner takes official notice that an AR, VR or data glasses was well known in the art before the time of filing. For example, see Rudy et al. (US PG Pub 2015/0103404) ([0003]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Raring as modified by using the component in an AR, VR or data glasses in order to project the emitted light beam to a user’s eyes. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Miyabe et al. (US PG Pub 2004/0028097) disclose: a first semiconductor laser element and a second semiconductor laser element are arranged on an identical block, a first electrode of the first semiconductor laser element is in direct contact with the block, and heat radiating effect is high. A second electrode of the second semiconductor laser element is arranged on an insulating dielectric layer, and the block and second semiconductor laser element are electrically insulated. Therefore, irrespective of the material to compose the block, the first semiconductor laser element and the second semiconductor laser element can be independently driven. In addition, the light emitting point distance between the first semiconductor laser element and second semiconductor laser element is limited only by the distance between the electrodes of the respective semiconductor lasers and the positions of light emitting points on the semiconductor laser chip end face and can, therefore, be made as short as possible (Abstract). Yousefi (US PG Pub 2011/0142085) discloses: a chaotic light generator device comprises laser structures integrated on a common substrate. Each laser structure comprises a ridge of light amplifying material that forms a waveguide extending between at least partly reflective surfaces. Each laser structure comprises an injection electrode for injecting electric current into the ridge of light amplifying material. The laser structures are mutually coupled for exchanging light. A current feed circuit is coupled to the electrodes and configured to apply mutually different current densities to the electrodes of the laser structures. Choosing different lengths of the laser structures and suitable current densities, chaotic light emission is achieved suitable for telecommunication. Ultrashort pulses result from coupling of Eigenmodes with relaxation oscillations (Abstract). Any inquiry concerning this communication or earlier communications from the examiner should be directed to XINNING(TOM) NIU whose telephone number is (571)270-1437. The examiner can normally be reached M-F: 9:30am-6:00pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Minsun Harvey can be reached at 571-272-1835. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /XINNING(Tom) NIU/Primary Examiner, Art Unit 2828
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Prosecution Timeline

Dec 06, 2023
Application Filed
Jun 10, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
83%
Grant Probability
87%
With Interview (+4.0%)
2y 5m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1021 resolved cases by this examiner. Grant probability derived from career allowance rate.

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