DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This office action is in response to the filling of the Amendment on 12/11/2025.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3, 4 and 7 are rejected under 35 U.S.C. 103 as being unpatentable over Hiroshi (JP 2005/224011; rejection based on English translation), in view of Elghrawi et al. (US 2019/0315296), hereinafter Elghrawi.
Regarding claim 1, claim 4 has the same limitations, except that is not a method claim, based on this is rejected for the same reasons.
Regarding claim 3, claim 7 has the same limitations, except that is not a method claim, based on this is rejected for the same reasons.
Regarding claim 4, Hiroshi discloses (see figures 1-6) a power supply device (figure 3, part 23) comprising: a voltage converter (figure 3, part 25) which converts input voltage (figure 3, part Vin) from a power source (figure 3, part 20) to supply voltage (figure 3, part Vout) based on a control signal (figure 3, part control signal from 11) (paragraph [0019]; The boost circuit 25 is controlled by the microcomputer 11 to boost the power supply voltage Vin of the DC power supply 20 and output it to the output circuit 12); a power source voltage monitor (figure 3, part 29) which monitors the input voltage (figure 3, part Vin) from the power source (figure 3, part 20) to decide a maximum suppliable power value (figure 4, part maximum suppliable power value Plim) (paragraph [0023]; A voltage sensor 29 for detecting the power supply voltage Vin is connected to the microcomputer 11), which is a maximum power suppliable to a device (figure 2, part device generated by 12 and 2), based on a predetermined input-output relationship set in advance (figure 4, part predetermined input-output relationship of Vin vs. Plim), wherein: (i) in the predetermined input-output relationship (figure 4, part predetermined input-output relationship of Vin vs. Plim), first to Nth input voltage ranges (figure 4, part input voltage ranges of Vin [0-Vb and Va-up]; N=2) are defined in ascending order as input voltage ranges (figure 4, part input voltage ranges of Vin [0-Vb and Va-up]; N=2) while first to Nth output power values (figure 4, part output power values of Plim [P2 and P1]; N=2) having discrete values are defined in ascending order as output power values (figure 4, part output power values of Plim [P2 and P1]; N=2), where N is an integer and equal to or larger than 2 (figure 4, part N=2), and the first to the Nth input voltage ranges (figure 4, part input voltage ranges of Vin [0-Vb and Va-up]; N=2) are respectively made to correspond to the first to Nth output power values (figure 4, part output power values of Plim [P2 and P1]; N=2), and (ii) an output power value (figure 4, part output power values of Plim [P2 and P1]; N=2) corresponding to the input voltage range (figure 4, part input voltage ranges of Vin [0-Vb and Va-up]; N=2) to which the input voltage (figures 3 and 4, part Vin) from the power source (figure 3, part 20) belongs is set as the maximum suppliable power value (figure 4, part maximum suppliable power value Plim) (paragraph [0027]; the relationship between the power supply voltage Vin and the upper limit power Plim shown in FIG. 4 is determined in advance as a limit power for the power supply voltage at which heat generation in the boost circuit becomes noticeable, and is stored in memory (not shown) in the form of a map. Then, the microcomputer 11 determines the upper limit power Plim corresponding to the detected power supply voltage Vin by referring to the map); and a controller (figure 3, part 11) which controls the voltage converter (figure 3, part 25) so that the supply voltage (figure 3, part Vout) corresponds to a power value (figure 3, part Pout) equal to or smaller than the maximum suppliable power value (figure 3, part maximum suppliable power value Plim) (paragraph [0029]; the microcomputer 11 controls the output voltage Vout of the boost circuit 25 so that the calculated output power Pout is equal to or less than the upper limit power Plim).
Hiroshi does not expressly disclose a terminal device and a PD (power delivery) controller.
Elghrawi teaches (see figures 1-2) a power supply device (figure 1) comprising: a voltage converter (figure 1, part 14) which converts input voltage from a power source (figure 1, part input voltage of 14) to supply voltage (figure 1, part output voltage of 14) based on a control signal (figure 1, part control signal from 16) (paragraph [0013]; FIG. 1 illustrates an electrical power supply device, e.g. a Universal Serial Bus (USB) power delivery (PD) device, hereinafter referred to as the PD device 10 that is designed for use in a motor vehicle 12. The PD device 10 may be used to support battery charging of USB enabled devices in the vehicle 12 (not shown). The PD device 10 includes a boost-buck DC-DC power convertor, hereinafter referred to as the DC convertor 14, that receives an input voltage from a vehicle's electrical system. In other embodiments of the invention, the PD device 10 may be a buck only DC-DC power convertor. The output voltage can by one of at least two different voltages, a higher voltage, e.g. a 20 volt output to support a fast USB charge rate, or a lower voltage, e.g. a 5 volt output to support a normal USB charge rate); a power source voltage monitor (figure 1, part power source voltage monitor at 18) which monitors the input voltage from the power source (figure 1, part input voltage of 14) (paragraph [0015]; The PD device 10 also includes interface circuitry 18, such as a controller area network (CAN) transceiver, a local interconnect network (LIN) transceiver, a USB transceiver, and/or an input voltage detection circuit) to decide a maximum suppliable power value (paragraphs [0018]- [0024] ; the PD device 10 includes an input voltage detection circuit that is in communication with the vehicle power supply, e.g. vehicle battery (not shown) and the device controller 16. The input voltage detection circuit is configured to determine the input voltage to the PD device 10 from the vehicle battery and transmit that information to the device controller 16. The memory includes additional instructions which cause the device controller 16 to command the DC convertor 14 to output the higher output voltage when the input voltage detection circuit determines that the input voltage is greater than a threshold voltage, e.g. 9.5 or 10 volts and which cause the device controller 16 to command the DC convertor 14 to output the lower output voltage when the input voltage detection circuit determines that the input voltage is less than the threshold voltage… if the PD device 10 has negotiated a PD contract with a consumer device (not shown) at 100 watts i.e. the output voltage is 20 volts and current capacity is 5 amperes and a start-stop event occurs, in the vehicle 12, i.e. the start-stop controller 20 sends a stop signal, the PD device 10 will change the power negotiation from 100 watts to 15 watts, i.e. output voltage is 5 volts and current capacity is 3 amperes, thereby reducing power required to be supplied to the PD device 10 by the vehicle 12 and reducing the current drawn by the PD device 10 and staying within the limits of the circuits current protection devices. Per the USB PD specifications, the consumer device will select the new 15 watt capability. After the stop-start event ends, i.e. the start-stop controller 20 sends a run signal, the PD device 10 will renegotiate 100 watt capability and the consumer device will choose highest power needed), which is a maximum power suppliable to a terminal device (figure 1, part terminal device connected to USB connector at 10), and a PD (power delivery) controller (figure 1, part PD controller 16) which controls the voltage converter (figure 1, part 14) so that the supply voltage (figure 1, part output voltage of 14) (paragraphs [0012]-[0025]; The PD device 10 also includes a device controller 16 that is in communication with the DC convertor 14).
It would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to apply the power supply device of Hiroshi to the USB power delivery (PD) device features as taught Elghrawi and obtain a power supply device comprising: a voltage converter which converts input voltage from a power source to supply voltage based on a control signal; a power source voltage monitor which monitors the input voltage from the power source to decide a maximum suppliable power value, which is a maximum power suppliable to a terminal device, based on a predetermined input-output relationship set in advance, wherein (i) the predetermined input-output relationship, first to Nth input voltage ranges are defined in ascending order as input voltage ranges while first to Nth output power values having discrete values are defined in ascending order as output power values, where N is an integer and equal to or larger than 2, and the first to the Nth input voltage ranges are respectively made to correspond to the first to Nth output power values, and (ii) an output power value corresponding to the input voltage range to which the input voltage from the power source belongs is set as the maximum suppliable power value; and a PD (power delivery) controller which controls the voltage converter so that the supply voltage corresponds to a power value equal to or smaller than the maximum suppliable power value, because the combination result in more efficient and protected power supply that provides more accurate and constant output power requirement based on protection limits (paragraphs [0008]-[0012]).
Regarding claim 7, Hiroshi and Elghrawi teach everything claimed as applied above (see claim 4). Further, Hiroshi discloses (see figures 1-6) the controller (figure 3, part 11) controls the voltage converter (figure 3, part 25) so that the supply voltage corresponds to a power value (figure 3, part Vout) smaller than the Nth output power value (figure 4, part output power values of Plim [P2 and P1]; N=2) when the input voltage (figure 3, part Vin) from the power source (figure 3, part 20) is higher than the Nth input voltage range (figure 4, part input voltage ranges of Vin [0-Vb and Va-up]; N=2) (paragraph [0042]; If the calculated output power Pout exceeds the upper limit power Plim, the microcomputer 11 reduces the output voltage Vout of the boost circuit 25 so that the output power Pout becomes the upper limit power Plim, i.e., Vout = Plim/Iout. This makes it possible to effectively suppress heat generation in the boost circuit even when the output current Iout increases, and to output a high output voltage Vout within a range in which heat generation does not pose a problem). However, Hiroshi does not expressly disclose the PD controller.
Elghrawi teaches (see figures 1-2) the PD (power delivery) controller (figure 1, part PD controller 16) (paragraphs [0012]-[0025]; The PD device 10 also includes a device controller 16 that is in communication with the DC convertor 14).
It would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to apply the power supply device of Hiroshi to the USB power delivery (PD) device features as taught Elghrawi and obtain the PD controller controls the voltage converter so that the supply voltage corresponds to a power value smaller than the Nth output power value when the input voltage from the power source is higher than the Nth input voltage range, because the combination result in more efficient and protected power supply that provides more accurate and constant output power requirement based on protection limits (paragraphs [0008]-[0012]).
Claims 2, 5 and 8 are rejected under 35 U.S.C. 103 as being unpatentable over Hiroshi (JP 2005/224011; rejection based on English translation), in view of Elghrawi et al. (US 2019/0315296), hereinafter Elghrawi, and further in view of Hirotaka (JP 2020/036491; rejection based on English translation).
Regarding claim 2, claim 5 has the same limitations, except that is not a method claim, based on this is rejected for the same reasons.
Regarding claim 5, Hiroshi and Elghrawi teach everything claimed as applied above (see claim 4). Further, Hiroshi discloses (see figures 1-6) the controller (figure 4, part 11) controls the voltage converter (figure 4, part 25) so that the supply voltage (figure 4, part Vout) corresponds to a voltage value (figure 4, part Vout) equal to or smaller than the maximum suppliable power value (figure 4, part maximum suppliable power value Plim) and the calculated power value (figure 4, part Pout calculated based on Iu-Iw and θ) (paragraphs [0028] and [0029]; the microcomputer 11 calculates the power consumption P of the motor based on the phase current values Iu, Iv (, Iw) detected by the current sensors 17, 18 and the rotation angle θ detected by the rotation angle sensor 19… the microcomputer 11 controls the output voltage Vout of the boost circuit 25 so that the calculated output power Pout is equal to or less than the upper limit power Plim. Specifically, when the calculated output power Pout exceeds the upper limit power Plim, the microcontroller 11 reduces the output voltage Vout of the boost circuit 25 so that the output power Pout becomes the upper limit power Plim, i.e., Vout = Plim/Iout. If the calculated output power Pout is equal to or less than the upper limit power Plim, the output voltage Vout of the boost circuit 25 is set to a predetermined voltage V1. In this embodiment, the predetermined voltage V1 is set to the maximum output voltage Vmax of the booster circuit 25). However, Hiroshi does not expressly disclose the PD controller obtains terminal information including a request power value, which is a maximum power value requested by the terminal device, from the terminal device and controls the voltage converter so that the supply voltage corresponds to a voltage value equal to or smaller than the maximum suppliable power value and the request power value.
Hirotaka teaches (see figures 1-4) the PD controller (figure 1, part 110) obtains terminal information including a request power value (figure 1, part request power value through 204), which is a maximum power value requested (figure 1, part request power value through 204) by the terminal device (figure 1, part 300) (paragraph [0002]; the USB PD standard allows communication between a power supply device and an electronic device, allowing the electronic device to request the required power from the power supply device, and the power supply device will supply the requested power if possible, or stop supplying power if not possible), from the terminal device (figure 1, part 300) and controls (figure 1, part 110) the voltage converter (figure 1, part 106) so that the supply voltage (figure 1, part supply voltage output from 106) corresponds to the request power value (figure 1, part request power value through 204) (paragraphs [0010]-[0018]; the system control circuit 110 transmits a voltage/current confirmation command regarding the voltage/current required by the electronic device 300 via the communication unit 112, and upon receiving the voltage/current confirmation command, the electronic device 300 replies to the power supply device 100 with a voltage/current response command regarding the required voltage/current).
It would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to configure the combination of Hiroshi and Elghrawi with the PD control features as taught Hirotaka and obtain the PD controller obtains terminal information including a request power value, which is a maximum power value requested by the terminal device, from the terminal device and controls the voltage converter so that the supply voltage corresponds to a voltage value equal to or smaller than the maximum suppliable power value and the request power value, because it provides more efficient power supply with an accurate output power depending on requested power value (paragraph [0004]-[0005]).
Regarding claim 8, Hiroshi and Elghrawi teach everything claimed as applied above (see claim 4). Further, Hiroshi discloses (see figures 1-6) the power supply device (figure 3, part 23). However, Hiroshi does not expressly disclose a USB (universal serial bus) connector; and the USB connector is connected to the PD controller and used as a connection interface for the terminal device.
Hirotaka teaches (see figures 1-4) the power supply device (figure 1, part 100) further comprises a USB (universal serial bus) connector (figure 1, part 108/112); and the USB connector (figure 1, part 108/112) is connected to the PD controller (figure 1, part 110) and used as a connection interface for the terminal device (figure 1, part 300) (paragraph [0010]).
It would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to configure the combination of Hiroshi and Elghrawi with the PD control features as taught Hirotaka and obtain the power supply device further comprises a USB (universal serial bus) connector; and the USB connector is connected to the PD controller and used as a connection interface for the terminal device, because it provides more efficient power supply with an accurate output power depending on requested power value (paragraph [0004]-[0005]).
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Hiroshi (JP 2005/224011; rejection based on English translation), in view of Elghrawi et al. (US 2019/0315296), hereinafter Elghrawi, and further in view of Kuwabara et al. (US 2020/0247267), hereinafter Kuwabara.
Regarding claim 6, Hiroshi and Elghrawi teach everything claimed as applied above (see claim 4). Further, Hiroshi discloses (see figures 1-6) the power source voltage monitor (figure 3, part 29) and the controller (figure 4, part 11). However, Hiroshi does not expressly disclose the power source voltage monitor is provided in the PD controller.
Kuwabara teaches (see figures 1-12) the power source voltage monitor (figure 2, part 12) is provided in the PD controller (figure 2, part 50).
It would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to configure the combination of Hiroshi and Elghrawi with the PD control features as taught Kuwabara and obtain the power source voltage monitor is provided in the PD controller, because it reduces circuit space in order to obtain more compact device.
Response to Arguments
Applicant's arguments filed 12/11/2025 have been fully considered but they are not persuasive.
Applicant’s argues on pages 9-11 of the Applicant's Response (“It is respectfully submitted that Suzuki and Elghrawi et al, even in combination, fail to achieve or render obvious all of the features recited in amended independent claim 1… It is respectfully submitted, however, that Suzuki does not teach or suggest the features recited in amended independent claim 1 whereby (i) first to Nth output power values having discrete values are defined in ascending order as output power values, and (ii) the first to Nth output power values are respectively made to correspond to the first to the Nth input voltage ranges."”).
The Examiner respectfully disagrees with Applicant’s arguments, because the primary reference Hiroshi discloses a predetermined input-output relationship set in advance (figure 4, part predetermined input-output relationship of Vin vs. Plim), wherein: (i) in the predetermined input-output relationship (figure 4, part predetermined input-output relationship of Vin vs. Plim), first to Nth input voltage ranges (figure 4, part input voltage ranges of Vin [0-Vb and Va-up]; N=2) are defined in ascending order as input voltage ranges (figure 4, part input voltage ranges of Vin [0-Vb and Va-up]; N=2) while first to Nth output power values (figure 4, part output power values of Plim [P2 and P1]; N=2) having discrete values are defined in ascending order as output power values (figure 4, part output power values of Plim [P2 and P1]; N=2), where N is an integer and equal to or larger than 2 (figure 4, part N=2), and the first to the Nth input voltage ranges (figure 4, part input voltage ranges of Vin [0-Vb and Va-up]; N=2) are respectively made to correspond to the first to Nth output power values (figure 4, part output power values of Plim [P2 and P1]; N=2), and (ii) an output power value (figure 4, part output power values of Plim [P2 and P1]; N=2) corresponding to the input voltage range (figure 4, part input voltage ranges of Vin [0-Vb and Va-up]; N=2) to which the input voltage (figures 3 and 4, part Vin) from the power source (figure 3, part 20) belongs is set as the maximum suppliable power value (figure 4, part maximum suppliable power value Plim) (paragraph [0027]; the relationship between the power supply voltage Vin and the upper limit power Plim shown in FIG. 4 is determined in advance as a limit power for the power supply voltage at which heat generation in the boost circuit becomes noticeable, and is stored in memory (not shown) in the form of a map. Then, the microcomputer 11 determines the upper limit power Plim corresponding to the detected power supply voltage Vin by referring to the map); and a controller (figure 3, part 11) which controls the voltage converter (figure 3, part 25) so that the supply voltage (figure 3, part Vout) corresponds to a power value (figure 3, part Pout) equal to or smaller than the maximum suppliable power value (figure 3, part maximum suppliable power value Plim) (paragraph [0029]; the microcomputer 11 controls the output voltage Vout of the boost circuit 25 so that the calculated output power Pout is equal to or less than the upper limit power Plim). As discussed above, Hiroshi’s reference discloses the predetermined input-output relationship set in advance (figure 4, part predetermined input-output relationship of Vin vs. Plim) (paragraph [0027]; the relationship between the power supply voltage Vin and the upper limit power Plim shown in FIG. 4 requires a limit power at which the heat generation of the booster circuit becomes significant with respect to the power supply voltage in advance. (Not shown). Then, the microcomputer 11 determines the upper limit power Plim corresponding to the power supply voltage Vin detected by referring to the map), wherein the first to Nth output power values (figure 4, part output power values of Plim [P2 and P1]; N=2) having discrete values are defined in ascending order as output power values (figure 4, part output power values of Plim [P2 and P1]; N=2) and (ii) an output power value (figure 4, part output power values of Plim [P2 and P1]; N=2) corresponding to the input voltage range (figure 4, part input voltage ranges of Vin [0-Vb and Va-up]; N=2). More specific, when the input voltage range is between 0 to Vb (figure 4, part input voltage ranges of Vin between 0-Vb), the output power value is a discreate value of P2 (figure 4, part output power values of Plim at P2) and when the input voltage range is between Va to up (figure 4, part input voltage ranges of Vin between Va-up), the output power value is a discreate value of P1 (figure 4, part output power values of Plim at P1) that is in ascending order. Therefore, the combination of Suzuki and Elghrawi meet with the claimed limitation in independent claims 1 and 4.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Carlos O. Rivera-Pérez, whose telephone number is (571) 272-2432 and fax is (571) 273-2432. The examiner can normally be reached on Monday through Friday, 8:30 AM – 5:00 PM EST.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thienvu V. Tran can be reached on (571) 270-1276. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/C.O.R. /
Examiner, Art Unit 2838
/THIENVU V TRAN/ Supervisory Patent Examiner, Art Unit 2838