DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This office action is a response to an application filed on 05/06/2026, in which claims 54 and 56-74 are pending and ready for examination.
Response to Amendment
Claim 57 is currently amended.
Response to Argument
Applicant's arguments filed 05/06/2026 have been fully considered but they are not persuasive.
With respect to claim rejected under 35 USC 103, the Applicant argues, see Pg. 10-12 of the filed Remarks, that the cited reference does not teach (1) the targe block is generated based on a decoder side refinement process by asserting that De Lagrange merely teach a process for refining motion vectors, rather than the prediction itself, which is operating at different conceptual levels of coding pipelines.
Examiner cannot concur. The claim merely recites that the targe block is generate based on a decoder side refinement process without any specificity as to the inclusion or exclusion of any specific process of steps. Whether it is operating at different conceptual levels of coding pipeline is irrelevant, since all the feature requires is the involvement of a decoder side refinement process.
The Applicant further argues that the cited reference does not teach (2) the at least one hypothesis of the target block is generated based on position dependent prediction combination (PDPC) by asserting that Chiang teaches a simplified MH process that excluding the use of PDPC.
Examiner cannot concur. The cited Para. [0070] of Chiang states that in certain embodiments, the use of PDPC can be omitted, and this very fact indicates the teaching that in some embodiment PDPC is used to perform multiple hypothesis coding process. In addition, the last portion of Para. [0070] states “For example, a simplified planar mode (for simplified intra prediction) may apply part (or a subset) or none of these four planar prediction steps: (1) reference sample availability check and substitution, (2) reference sample filtering, (3) horizontal and vertical planar predictor generation and averaging, and (4) PDPC, whereas normal planar mode may include all four planar prediction steps.”, which indicates the PDPC may be applied in the process when it is not omitted.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 54, 56, 61, 63-65, 69-74 are rejected under 35 U.S.C. 103 as being unpatentable over Chiang (US Pub. 20200120339 A1) in view of De Lagrange (US Pub. 20220345693 A1).
Regarding claim 54, Chiang discloses a method of video processing, comprising (Chiang; Para. [0076]. A video coding system/method is used.):
generating, during a conversion between a target block of a video and a bitstream of the target block, at least one hypothesis of the target block based on a prediction method of the target block or a coding method of the target block, the target block being a multiple hypothesis prediction block (Chiang; Para. [0070]. At least one hypothesis of a target block is generated in accordance with a prediction method or a coding method of a target block in accordance with multiple hypothesis prediction block.),
wherein the at least one hypothesis of the target block is generated based on position dependent prediction combination (PDPC) (Chiang; Para. [0070]. At least one hypothesis of a target block is generated in accordance with PDPC.); and
performing the conversion based on the at least one hypothesis (Chiang; Para. [0070, 76]. Video data is converted in accordance with at least one hypothesis.).
But Chiang does not specifically disclose wherein the target block is generated based on a decoder side refinement process.
However, De Lagrange wherein the target block is generated based on a decoder side refinement process (De Lagrange; Fig. 5, Para. [0057-61]. A target block is generated in accordance with a decoder side refinement process.).
Therefore, it would have been obvious to a person with ordinary skill in the pertinent before the effective filing date of the claimed invention to modify the video coding system of Chiang to adapt an DMVR approach, by incorporating De Lagrange’s teaching wherein DMVR is employed for Pus for prediction, for the motivation to enable propagation modes for video coding (De Lagrange; Abstract.).
Regarding claim 56, Chiang discloses wherein a prediction sample of the at least one hypothesis is processed by the PDPC, before the prediction sample is used to generate the target block, or wherein the at least one hypothesis of the target block is generated by a predictor obtained based on the PDPC that utilizes a neighboring sample value, or wherein the at least one hypothesis of the target block is generated by a predictor obtained based on a gradient based PDPC that utilizes a gradient of a neighboring sample value (Chiang; Para. [0070]. A prediction of at least one hypothesis is processed by PDPC prior to a prediction is used to generated a target block.).
Regarding claim 61, Chiang discloses wherein the target block is coded with at least one of the followings: a combined intra and inter prediction mode, a geometric partition prediction mode, a multi-hypothesis prediction mode, or a multiple hypothesis prediction mode, or wherein inter prediction motion data of the target block is further refined by at least one of the followings: a decoder side template matching, a decoder side bilateral matching, or a decoder side bi-directional optical flow, or wherein an inter prediction sample of the target block is further refined by at least one of the followings: a decoder side template matching, a decoder side bilateral matching, a decoder side bi-directional optical flow, or a decoder side prediction refinement with optical flow, or wherein an intra prediction part the target block is further refined by at least one of the followings: a decoder side mode derivation, or a decoder side intra template matching, or wherein refined intra prediction mode or motion information of the target block is disallowed to predict subsequent blocks to be coded or decoded, wherein the subsequent blocks are in one of: a same slice, a same tile, a same picture, or a same subpicture, or wherein a decoder side refinement process is not allowed to apply to the target block (Chiang; Para. [0070]. A target block is coded with a least one of a CIIP, GPM, or MHP.).
Regarding claim 63, Chiang discloses wherein the conversion includes encoding the target block into the bitstream, or wherein the conversion includes decoding the target block from the bitstream (Chiang; Para. [0076]. A target block is coded into a bitstream.).
Regarding claim 64, Chiang discloses wherein an indication of whether to and/or how to generate the at least one hypothesis of the target block is indicated at one of the followings: sequence level, group of pictures level, picture level, slice level, or tile group level, or wherein an indication of whether to and/or how to generate the at least one hypothesis of the target block is indicated in one of the following: a sequence header, a picture header, a sequence parameter set (SPS), a video parameter set (VPS), a dependency parameter set (DPS), a decoding capability information (DCI), a picture parameter set (PPS), an adaptation parameter sets (APS), a slice header, or a tile group header, or wherein an indication of whether to and/or how to generate the at least one hypothesis of the target block is included in one of the following: a prediction block (PB), a transform block (TB), a coding block (CB), a prediction unit (PU), a transform unit (TU), a coding unit (CU), a virtual pipeline data unit (VPDU), a coding tree unit (CTU), a CTU row, a slice, a tile, a sub-picture, or a region containing more than one sample or pixel, or wherein the method further comprises: determining, based on coded information of the target block, whether to and/or how to generate the at least one hypothesis of the target block, the coded information including at least one of: a block size, a colour format, a single and/or dual tree partitioning, a colour component, a slice type, or a picture type (Chiang; Para. [0062, 65]. An indication of whether and how to generate at least one hypothesis is indicated at one of sequence level, group of pictures level, picture level, slice level, or tile group level.).
Regarding claim 65, Chiang discloses wherein the method further comprises: determining, during a conversion between a target block of a video and a bitstream of the target block, whether to apply a first mode to generate a hypothesis of the target block, the target block being a multiple hypothesis prediction block coded with a second mode; and performing the conversion based on the determining (Chiang; Para. [0062, 65]. A target block is determined whether to use a first mode to generate a hypothesis, the target block being a MHP with a second mode, wherein video coding is performed in accordance with the determining.).
Regarding claim 69, Chiang discloses wherein the conversion includes encoding the target block into the bitstream, or wherein the conversion includes decoding the target block from the bitstream (Chiang; Para. [0076]. A target block is coded into a bitstream.).
Regarding claim 70, Chiang discloses wherein an indication of whether to and/or how to apply the first mode is indicated at one of the followings: sequence level, group of pictures level, picture level, slice level, or tile group level, or wherein an indication of whether to and/or how to apply the first mode is indicated in one of the following: a sequence header, a picture header, a sequence parameter set (SPS), a video parameter set (VPS), a dependency parameter set (DPS), a decoding capability information (DCI), a picture parameter set (PPS), an adaptation parameter sets (APS), a slice header, or a tile group header, or wherein an indication of whether to and/or how to apply the first mode is included in one of the following: a prediction block (PB), a transform block (TB), a coding block (CB), a prediction unit (PU), a transform unit (TU), a coding unit (CU), a virtual pipeline data unit (VPDU), a coding tree unit (CTU), a CTU row, a slice, a tile, a sub-picture, or a region containing more than one sample or pixel (Chiang; Para. [0062, 65]. An indication of whether and how to generate at least one hypothesis is indicated at one of sequence level, group of pictures level, picture level, slice level, or tile group level.).
Regarding claim 71, Chiang discloses determining, based on coded information of the target block, whether and/or how the first mode is applied, the coded information including at least one of: a block size, a colour format, a single and/or dual tree partitioning, a colour component, a slice type, or a picture type (Chiang; Para. [0065]. A first mode is determined whether to be used or not in accordance with coded information of block size, settings, and modes.).
Claim 72 is directed to an apparatus for processing video data comprising a processor and a non-transitory memory with instructions thereon, wherein the instructions upon execution by the processor, cause the processor to perform acts comprising a sequence of processing steps corresponding to the same as claimed in claim 54, and is rejected for the same reason of anticipation as outlined above.
Claim 73 is directed to a non-transitory computer-readable storage medium storing instructions that cause a processor to perform acts comprising a sequence of processing steps corresponding to the same as claimed in claim 54, and is rejected for the same reason of anticipation as outlined above.
Regarding claim 74, Chiang discloses storing the bitstream in a non-transitory computer-readable recording medium (Chiang; Para. [0125, 132]. A bitstream is stored in a non-transitory computer readable recording medium.).
Claims 57-59 are rejected under 35 U.S.C. 103 as being unpatentable over Chiang (US Pub. 20200120339 A1) in view of De Lagrange (US Pub. 20220345693 A1), as applied to claim 54, and further in view of Ray (US Pub. 20210176465 A1).
Regarding claim 57, Chiang discloses the PDPC (Chiang; See remarks regarding claim 55 above.).
But Chiang does not specifically disclose wherein the gradient based PDPC is applied to an intra mode coded hypothesis.
However, Ray teaches wherein the gradient based PDPC is applied to an intra mode coded hypothesis (Ray; Para. [0075]. A gradient-based PDPC is used for an intra mode hypothesis.).
Therefore, it would have been obvious to a person with ordinary skill in the pertinent before the effective filing date of the claimed invention to modify the video coding system of Chiang to adapt an image processing approach, by incorporating Ray’s teaching wherein a gradient-based PDPC is used for intra prediction, for the motivation to perform intra-prediction with the gradient term (Ray; Abstract.).
Regarding claim 58, modified Chiang further teaches wherein a PDPC predictor is not based on a prediction sample inside the target block (Ray; Para. [0075]. A gradient-based PDPC is used for an intra mode hypothesis in accordance with neighboring samples.).
Regarding claim 59, modified Chiang further teaches wherein the PDPC predictor is based on at least one of: a prediction sample or a reconstructed sample neighboring the target block, or wherein the PDPC predictor is based on both the prediction sample inside the target block and at least one of: a prediction sample or a reconstructed sample neighboring the target block (Ray; Para. [0075]. A prediction sample or a reconstructed sample is used for a PDPC prediction.).
Claims 60 are rejected under 35 U.S.C. 103 as being unpatentable over Chiang (US Pub. 20200120339 A1) in view of De Lagrange (US Pub. 20220345693 A1), as applied to claim 54, and further in view of Bordes (US Pub. 20220021869 A1).
Regarding claim 60, Chiang discloses the target block (Chiang; See remarks regarding claim 54 above.).
But it does not specifically disclose wherein the decoder side refinement process is applied to the at least one hypothesis of the target block, or wherein the decoder side refinement process is applied to the target block, or wherein the decoder side refinement process is based on one of the followings: a decoder side template matching, a decoder side bilateral matching, a decoder side bi-directional optical flow, or a decoder side prediction refinement with optical flow.
However, Bordes teaches wherein the decoder side refinement process is applied to the at least one hypothesis of the target block, or wherein the decoder side refinement process is applied to the target block, or wherein the decoder side refinement process is based on one of the followings: a decoder side template matching, a decoder side bilateral matching, a decoder side bi-directional optical flow, or a decoder side prediction refinement with optical flow (Bordes; Para. [0066]. A DMVR process is used for at least one hypothesis of a target block.).
Therefore, it would have been obvious to a person with ordinary skill in the pertinent before the effective filing date of the claimed invention to modify the video coding system of Chiang to adapt an image processing approach, by incorporating Bordes’s teaching wherein a DMVR process is performed on coded blocks, for the motivation to enable or disable different coding tools for video coding (Bordes; Abstract.).
Claims 62 and 66-68 are rejected under 35 U.S.C. 103 as being unpatentable over Chiang (US Pub. 20200120339 A1) in view of De Lagrange (US Pub. 20220345693 A1), as applied to claim 54, and further in view of Li (US Pub. 20200413047 A1).
Regarding claim 62, Chiang discloses a target block is a multiple hypothesis predicted coded block (Chiang; See remarks regarding claim 1.).
But it does not specifically disclose wherein if the target block is a multiple hypothesis predicted coded block, the decoder side refinement process is not allowed to apply to the target block.
However, Li teaches wherein if the target block is a multiple hypothesis predicted coded block, the decoder side refinement process is not allowed to apply to the target block (Para. [0224]. DMVR is disable for a target block being an MHP/CIIP, also see Para. [0148].).
Therefore, it would have been obvious to a person with ordinary skill in the pertinent before the effective filing date of the claimed invention to modify the video coding system of Chiang to adapt an image processing approach, by incorporating Li’s teaching wherein a DMVR process is disabled when MHP is applied, for the motivation to perform CIIP during video coding (Li; Abstract.).
Regarding claim 66, modified Chiang further teaches wherein a base hypothesis of the multiple hypothesis prediction bock is not allowed to be coded by the first mode, or wherein an additional hypothesis of the multiple hypothesis prediction bock is not allowed to be coded by the first mode, or wherein for a candidate block coded by the first mode, block level coding information related to the second mode is not indicated, or wherein the first mode comprises a palette coded block mode, or wherein the first mode is allowed to generate the hypothesis of the target block, if the first mode comprises one of the followings: a symmetric motion vector difference coding mode, a template matching based process, a bilateral matching based process, a combined intra and inter prediction mode, or a geometric partition prediction mode, or wherein the second mode comprises one of the followings: a combined intra and inter prediction mode, a geometric partition prediction mode, or a multi-hypothesis prediction mode, or wherein if the second mode is a combined intra and inter prediction mode, the first mode and the second mode are used together for the target block(Li; Para. [0224]. A base hypothesis of multiple hypothesis prediction block is disabled to be coded by a first mode of DMVR, also see Para. [0148].).
Regarding claim 67, modified Chiang further teaches wherein the first mode is a geometric partition prediction mode, and at least one hypothesis in the geometric partition prediction mode is generated by the combined intra and inter prediction mode, or wherein the first mode is a geometric partition prediction mode, and at least one hypothesis in the combined intra and inter prediction mode is generated by the geometric partition prediction mode, or wherein the first mode is a merge mode with motion vector difference, and at least one hypothesis in the combined intra and inter prediction mode is generated by the merge mode with motion vector difference, or wherein the first mode is an affine mode, and at least one hypothesis in the combined intra and inter prediction mode is generated by the affine mode, or wherein whether the first mode is used together with the combined intra and inter prediction mode is based on coding information of the target block, or wherein an indication of whether the first mode is used together with the combined intra and inter prediction mode is indicated in the bitstream of the target block (Li; Para. [0148, 224]. A first mode is a merge mode with motion vector difference, and at least one hypothesis in CIIP is generated by a merge mode with motion vector difference, also see Para. [0108].).
Regarding claim 68, modified Chiang further teaches wherein the indication is conditioned by coding information of the target block (Li; Para. [0159]. An indication is conditioned by coding information of a target block.).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Zhao (US Pub. 20200296421 A1) teaches a video coding system that uses inter PDPC mode in the coding process.
Deng (US Pub. 20250267275 A1) teaches a video coding system that perform multiple hypothesis coding process with DIMD.
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALBERT KIR whose telephone number is (571)272-6245. The examiner can normally be reached Monday - Friday, 8:30am - 5:00pm.
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/ALBERT KIR/ Primary Examiner, Art Unit 2485
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