DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 C.F.R. § 1.55.
Drawings
The drawings are objected to under 37 C.F.R. § 1.84(u) because the different views of Figs. 5 and 6 are not separately numbered (e.g., Figs. 5A, 5B, 6A, 6B). Applicant is reminded to amend the specification (i.e., references to Figs. 5 and 6) to correspond to the amended figure numbers.
The drawings are further objected to as follows:
Fig. 4 is objected to because the values Da, Db, and Dc should be written as Da, Db, and Dc (for consistency with the specification and Fig. 5).
Fig. 5 is objected to for the following reasons:
The term “GBIR” in Fig. 5 is misspelled as “BGIR” in two instances;
The “Plate deformation images” at the top are confusing and inaccurate; the specification states that these images pertain to the condition of the upper plate as they wear, in which case the upper plates should not appear as tilted rectangles, but as trapezoids where the upper surfaces of the upper plates are parallel to the bottom surfaces of the lower plates;
The scale for value Dc[nm] appears to be reversed relative to the “Plate deformation images” and the chart data because Dc is defined as Da-Db (see Fig. 4), where Da is the radially outer inter-plate distance and Db is the radially inner inter-plate distance; therefore, the highest Dc value should be on the left side of the chart and not the right side;
The chart titled “GBIR (Signed)” is confusing because there are no axes marked on this chart, and it is unclear exactly what this chart pertains to; if this chart pertains to the range of actual shapes of a wafer due to the range of plate deformation (as shown in the left chart of Fig. 5), then Examiner suggests marking the vertical axis as GBIR (with 0 value indicated appropriately in the middle) and the horizontal axis as radial position of the wafer (with 0 value indicated appropriately at the center of the wafer);
The “Image of wafer shape” is confusing and inaccurate because the left and right extents of the wafer as shown do not intersect the outside box, thereby making it unclear where the wafer begins and ends.
Fig. 6 is objected to because the “Image of change in plate shape” is confusing and inaccurate; the specification states that these images pertain to the condition of the upper plate as the outer radial portion expands and contracts due to thermal expansion, in which case the upper plates should not appear as tilted rectangles, but as trapezoids.
Corrected drawing sheets in compliance with 37 C.F.R. § 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” in compliance with 37 C.F.R. § 1.121(d). No new matter should be entered. If the changes are not accepted by the examiner, Applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Objections
Claims 1, 3, and 5 are objected to because of the following informalities:
“including” (claim 1, line 1) should be changed to --comprising,--;
“a upper plate” (claim 1, line 3) should be changed to --an upper plate--;
“the rotation of a sun gear” (claim 1, lines 4-5) should be changed to --a rotation of a sun gear--;
“the center” (claim 1, line 5) should be changed to --a center--;
“the rotation of an internal gear” (claim 1, line 5) should be changed to --a rotation of an internal gear--;
“the periphery” (claim 1, line 6) should be changed to --a periphery--;
“wherein the method includes” (claim 1, line 7) should be changed to --wherein the method further comprises:--;
“a relational data obtaining process;” (claim 1, line 8) should be changed to --a relational data obtaining process, including--;
“the relationship” (claim 1, lines 8-9) should be changed to --a relationship--;
“between inter-plate distance” (claim 1, line 9) should be changed to --between an inter-plate distance--;
“the flatness” (claim 1, line 11) should be changed to --a flatness--;
“an optimum distance calculation process;” (claim 1, line 12) should be changed to --an optimum distance calculation process, including--;
“the optimum value” (claim 1, lines 12-13) should be changed to --an optimum value--;
“the desired flatness” (claim 1, line 14) should be changed to --a desired flatness--;
“a control process;” (claim 1, line 16) should be changed to --and a control process, including--;
“the shape” (claim 1, line 16) should be changed to --a shape--;
“between;” (claim 3, line 4) should be changed to --between--;
“where” (claim 3, line 4) should be changed to --, where--;
“the center” (claim 5, line 2) should be changed to --a center--;
“the periphery” (claim 5, line 3) should be changed to --a periphery--;
“a work” (claim 5, line 4) should be changed to --the work--;
“wherein the apparatus comprises:” (claim 5, line 5) should be changed to --wherein the apparatus further comprises:--;
“the optimum value” (claim 5, line 6) should be changed to --an optimum value--;
“the desired flatness” (claim 5, line 8) should be changed to --a desired flatness--;
“the flatness” (claim 5, lines 10-11) should be changed to --a flatness--;
“the shape” (claim 5, line 12) should be changed to --a shape--.
Appropriate correction is required.
Claim Rejections – 35 U.S.C. § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. § 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Pietsch
Claims 1-3 and 5-6 are rejected under 35 U.S.C. § 102(a)(1) as being anticipated by US 20080233840 A1 (“Pietsch”).
Regarding claim 1, Tanaka discloses a double-side polishing method for a work [comprising,]
holding a work on a carrier plate having one or more holding holes to hold a work, sandwiching the work with a rotating plate comprising a[n] upper plate and a lower plate (Figs. 1-3, 25a-b, 26, wafers 15 are held in holes 14 on carriers 13 between the upper plate 1 and lower plate 4 for polishing; ¶¶ 0147-0150),
and simultaneously polishing both sides of the work by rotating the rotating plate and the carrier plate relative to each other through [a] rotation of a sun gear provided at [a] center of the rotating plate and [a] rotation of an internal gear provided at [a] periphery of the rotating plate (Figs. 1-3, 25a-b, 26, polishing both sides of wafer 15 by rotating upper plate 1 and lower plate 4 relative to the carriers 13 via sun gear 7 and internal gear 9; ¶¶ 0147-0150),
wherein the method [further comprises]:
a relational data obtaining process[, including] obtaining relational data, in advance, that indicates [a] relationship between [an] inter-plate distance, which is a distance between the upper plate and the lower plate at two or more positions where distances from the center of the rotating plate are different, and [a] flatness of the work (Figs. 8-10, 16-17, 25a-b, 26; ¶¶ 0152-0169, the relationship between the inter-plate distances at multiple positions and wafer flatness is obtained and known in advance (e.g., from previous polishing processes): “the greatest flatness of the semiconductor wafers in the case of machining by the method according to the invention is obtained if the working gap has a largely uniform width in the radial direction during machining, that is to say that the working disks run parallel to one another or have a slight gape from the inside toward the outside” (¶ 0168)),
an optimum distance calculation process[, including] calculating, by a calculation section, [an] optimum value of the inter-plate distance at two or more positions where distances from the center of the rotating plate are different to obtain [a] desired flatness of the work, based on the relational data obtained in the relational data obtaining process (Figs. 8-10, 16-17, 25a-b, 26; ¶¶ 0152-0169, calculation section 92, 93 calculates an optimum value (e.g., a value to obtain a flat wafer) of inter-plate distance at multiple positions as recited via distance sensors 37, 38, based on the relational data obtained above),
and a control process[, including]; controlling [a] shape of the rotating plate to control the inter-plate distance to the optimum value (Figs. 8-10, 16-17, 25a-b, 26; ¶¶ 0152-0169, control section 93 controls actuators 23 to adjust the tilt of the upper plate 1 to control the inter-plate distance at multiple positions to the optimum value).
Regarding claim 2, Pietsch discloses the double-side polishing method for a work of claim 1 as applied above and further discloses wherein in the relational data obtaining process and the optimum distance calculation process, the two or more positions where distances from the center of the rotating plate are different include, at least, a radially outer end position of the rotating plate and a radially inner end position of the rotating plate (Figs. 8-10, 16-17, 25a-b, 26; ¶¶ 0152-0169, the two or more positions include a radially inner end position (at sensor 37) and a radially outer end position (at sensor 38)).
Regarding claim 3, Pietsch discloses the double-side polishing method for a work of claim 1 as applied above and further discloses:
wherein
in the relational data obtaining process, differential relational data that indicates a relationship between[] a difference between the inter-plate distances at only two positions[,] where distances from the center of the rotating plate are different, and the flatness of the work is obtained in advance (Figs. 8-10, 16-17, 25a-b, 26; ¶¶ 0152-0169, the relationship between the difference of the inter-plate distances at two positions (at sensor positions 37 and 38, via differential element 92) and wafer flatness is obtained and known in advance (e.g., from previous polishing processes): “the greatest flatness of the semiconductor wafers in the case of machining by the method according to the invention is obtained if the working gap has a largely uniform width in the radial direction during machining, that is to say that the working disks run parallel to one another or have a slight gape from the inside toward the outside” (¶ 0168)),
in the optimum distance calculation process, the optimum value of the difference is calculated (Figs. 8-10, 16-17, 25a-b, 26; ¶¶ 0152-0169, calculation section 92, 93 calculates the optimum value of the difference (e.g., a value to obtain a flat wafer) between two inter-plate distance at two positions as recited via distance sensors 37, 38, based on the relational data obtained above),
and in the control process, the shape of the rotating plate is controlled to control the difference to the optimum value of the difference (Figs. 8-10, 16-17, 25a-b, 26; ¶¶ 0152-0169, control section 93 controls actuators 23 to adjust the tilt of the upper plate 1 to control the difference between the inter-plate distances at two positions to the optimum value).
Regarding claim 5, Pietsch discloses a double-side polishing apparatus for a work comprising a rotating plate having an upper plate and a lower plate, a sun gear provided at [a] center of the rotating plate, an internal gear provided at [a] periphery of the rotating plate, and a carrier plate provided between the upper plate and the lower plate having one or more holding holes to hold [the] work (Figs. 1-3, 25a-b, 26, double-side polishing apparatus as shown, with a rotating plate having upper plate 1 and lower plate 4, wafers 15 are held in holes 14 on carriers 13 between the upper plate 1 and lower plate 4 for polishing, where the carrier 13 is rotated by sun gear 7 and internal gear 9; ¶¶ 0147-0150),
wherein the apparatus [further] comprises:
a calculation section that calculates [an] optimum value of inter-plate distance, which is a distance between the upper plate and the lower plate at two or more positions where distances from the center of the rotating plate are different, to obtain [a] desired flatness of the work, based on previously obtained relational data indicating a relationship between the inter-plate distance at two or more positions where distances from the center of the rotating plate are different and [a] flatness of the work (Figs. 8-10, 16-17, 25a-b, 26; ¶¶ 0152-0169, calculation section 92, 93 calculates an optimum value (e.g., a value to obtain a flat wafer) of inter-plate distance at multiple positions as recited via distance sensors 37, 38, where the relationship between the inter-plate distances at multiple positions and wafer flatness is a previously known relationship: “the greatest flatness of the semiconductor wafers in the case of machining by the method according to the invention is obtained if the working gap has a largely uniform width in the radial direction during machining, that is to say that the working disks run parallel to one another or have a slight gape from the inside toward the outside” (¶ 0168)),
and a control section that controls [a] shape of the rotating plate to control the inter-plate distance to the optimum value (Figs. 8-10, 16-17, 25a-b, 26; ¶¶ 0152-0169, control section 93 controls actuators 23 to adjust the tilt of the upper plate 1 to control the inter-plate distance at multiple positions to the optimum value).
Regarding claim 6, Pietsch discloses the double-side polishing apparatus for a work of claim 5 as applied above and further discloses wherein the two or more positions where distances from the center of the rotating plate are different include, at least, a radially inner end position of the rotating plate and a radially outer end position of the rotating plate (Figs. 8-10, 16-17, 25a-b, 26; ¶¶ 0152-0169, the two or more positions include a radially inner end position (at sensor 37) and a radially outer end position (at sensor 38)).
Claim Rejections – 35 U.S.C. § 103
This application currently names joint inventors. In considering patentability of the claims, the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 C.F.R. § 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. § 102(b)(2)(C) for any potential 35 U.S.C. § 102(a)(2) prior art against the later invention.
The following is a quotation of 35 U.S.C. § 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. § 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Pietsch in view of Ogata
Claims 4 and 7 are rejected under 35 U.S.C. § 103 as being unpatentable over US 20080233840 A1 (“Pietsch”) in view of US 20150165585 A1 (“Ogata”).
Pietsch pertains to a wafer polishing apparatus and method (Abstr.; Figs. 1-4). Ogata pertains to a wafer polishing apparatus (Abstr.; Fig. 1). These references are in the same field of endeavor.
Regarding claim 4, Pietsch discloses the double-side polishing method for a work of claim 1 as applied above. Pietsch does not explicitly disclose wherein the flatness of the work is the flatness indexed by GBIR. However, the Pietsch/Ogata combination makes obvious this claim.
Ogata discloses wherein the flatness of the work is the flatness indexed by GBIR (Figs. 9, 13; ¶¶ 0091-0096, flatness of the polished wafer is evaluated under GBIR (global backside ideal focal plane range).
It would have been obvious to one of ordinary skill in the art before the effective filing date of this application to combine the teachings of Ogata with Pietsch by modifying the method of Pietsch to use flatness based on GBIR (as opposed to other measurements of flatness) as taught by Ogata because it is known that “GBIR is an indicator representing the flatness of the entire surface of the wafers and a smaller GBIR means a higher flatness”, and GBIR flatness would account for the entire surface of the wafer as opposed to other flatness metrics such as ESFQR that do not account for the entire surface of the wafer (Ogata ¶ 0091). Further, available measurement systems in the industry use GBIR to evaluate wafer flatness: “In this example, a flatness measurement system (WaferSight manufactured by KLA-Tencor Corporation) was used for the measurement.” (Ogata ¶ 0091).
Regarding claim 7, Pietsch discloses the double-side polishing apparatus for a work of claim 5 as applied above. Pietsch does not explicitly disclose wherein the flatness of the work is the flatness indexed by GBIR. However, the Pietsch/Ogata combination makes obvious this claim.
Ogata discloses wherein the flatness of the work is the flatness indexed by GBIR (Figs. 9, 13; ¶¶ 0091-0096, flatness of the polished wafer is evaluated under GBIR (global backside ideal focal plane range).
It would have been obvious to one of ordinary skill in the art before the effective filing date of this application to combine the teachings of Ogata with Pietsch by modifying the apparatus of Pietsch to use flatness based on GBIR (as opposed to other measurements of flatness) as taught by Ogata because it is known that “GBIR is an indicator representing the flatness of the entire surface of the wafers and a smaller GBIR means a higher flatness”, and GBIR flatness would account for the entire surface of the wafer as opposed to other flatness metrics such as ESFQR that do not account for the entire surface of the wafer (Ogata ¶ 0091). Further, available measurement systems in the industry use GBIR to evaluate wafer flatness: “In this example, a flatness measurement system (WaferSight manufactured by KLA-Tencor Corporation) was used for the measurement.” (Ogata ¶ 0091).
Status of Claims
Claims 1-7 are pending. Claims 1-7 are rejected.
Conclusion
The prior art made of record and not relied upon is considered pertinent to Applicant’s disclosure.
US 20080038989 A1 (“Boller”) discloses a two-sided grinding device with actuators to adjust the tilt of the upper grinding disc (Abstr.; Figs. 1-5);
US 20120164919 A1 (“Kanzow”) discloses a two-sided grinding device capable of adjusting the tilt of the upper grinding disc (Abstr.; Figs. 1-5).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KENT N SHUM whose telephone number is (703)756-1435. The examiner can normally be reached 1230-2230 EASTERN TIME M-TH.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, MONICA S CARTER can be reached at (571)272-4475. The fax phone number for the organization where this application or proceeding is assigned is (571)273-8300.
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/KENT N SHUM/Examiner, Art Unit 3723
/MONICA S CARTER/Supervisory Patent Examiner, Art Unit 3723