DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-11 have been submitted for examination and are pending further prosecution by the United States Patent & Trademark Office.
Allowable Subject Matter
Claims 2, 7, 8 and 10 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1 and 6 are rejected under 35 U.S.C. 103 as being unpatentable over WO 8301847 A1 - hereinafter "Bishop", in view of US 20190079507 A1 - hereinafter "Jones".
With respect to claims 1 and 6, Bishop teaches,
a first memory to store, in a case where a reference target is changed, the reference target after the change at a second address different from a first address of the reference target before the change, the reference target being a function or a library referenced by the plurality of programs; and - "FIG. 1 is a memory layout of an illustrative embodiment of the invention, showing the addressing relationships between present and modified versions of a program function;" (page 5:36 through page 6:2) "Function blocks 130, 140, and 150 of FIG. 1 each represent an area of memory for storing a program. Each has an area for storing a decision function (131, 141, and 151) and an area for storing a program function (132, 142, and 152) . The program functions represent a present version, F, (132), a modified version, F.sup.1, (142), and a second modification, F" , (152)." (page 8:24-30) "Since many programs may reference a program function, a list of the present addresses of all program functions is maintained and made available to all calling programs." (page 9:6-9) "When the modified version of the program function, F*, is loaded in system memory, the vector table entry at 121 is changed from f(2), the address of the present version of the program function, to f'(l).sub.f the address of the decision function associated with F'." (page 9:23-28)
processing circuitry configured as a version manager to associate and manage the first address or the second address with each of the plurality of programs based on whether each of the plurality of programs is to reference the reference target before the change or the reference target after the change. - "The central processing unit executes processes and program functions which are stored in memory." (page 11:8-9; Fig. 2) "Programs are assigned to any available segment of memory. Individual program functions may be used by many processes, but stored only once to save valuable memory space. Since many programs may reference a program function, a list of the present addresses of all program functions is maintained and made available to all calling programs. This list is referred to as a transfer vector table (version manager). When a change is loaded into the system, the transfer vector table address is updated to point to the decision function associated with the modified version. When a process calls the program function which was modified, the decision function pointed to by the transfer vector table will determine whether the present or modified version of the program function is to be used." (page 9:3-16)
Bishop does not explicitly teach A control device that controls a control target according to a control program including a plurality of programs,
However, in the analogous field of software deployment, Jones teaches:
"The process controllers (control device), which are also typically located within the plant environment, receive signals indicative of process measurements made by the field devices (control target) and/or other information pertaining to the field devices and execute a controller application (control program) that runs, for example, different control modules (programs) which make process control decisions, generate control signals based on the received information and coordinate with the control modules or blocks being performed in the field devices, such as HART®, WirelessHART®, and FOUNDATION® Fieldbus field devices." [0005]
It would have been obvious for one of ordinary skill in the art before the effective filing date of the invention to implement Bishop with Jones' teachings because doing so would provide Bishop's system with the ability to efficiently manage the configuration of a modular control system, as suggested by Jones [0013].
Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Bishop and Jones, and in view of US 20080109793 A1 - hereinafter "Buettner".
With respect to claim 3, Bishop does not explicitly teach,
processing circuitry configured as a merging checker to determine whether the plurality of programs reference the same version of the reference target.
However, in the analogous field of software testing, Buettner teaches:
"Embodiments of the invention trap module load operations and compute a hash or checksum of the loaded module. Hashes are compared to verify that all cooperating software applications are using the same version of the module. Mismatches are reported to the user." [0012]; Fig. 6
"Loadable modules may contain instructions and data specifically designed for use by a particular application, or may contain instructions and data to implement functions of general applicability. In the latter case, the loadable module is often called a shared library or a dynamically linked library ("DLL")." [0017]; Fig. 6
It would have been obvious for one of ordinary skill in the art before the effective filing date of the invention to implement Bishop and Jones with Buettner's teachings because doing so would provide Bishop/Jones' system with the ability to verify that multiple entities participating in a debugging session share a consistent view of instructions and data comprising a computer program, as suggested by Buettner [0001].
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Bishop and Jones, and in view of US 20200285462 A1 - hereinafter "Sabath".
With respect to claim 4, Bishop does not explicitly teach,
processing circuitry configured as a change notifier to notify, in a case where one engineering tool changes the reference target, another engineering tool of the change of the reference target.
However, in the analogous field of software updating, Sabath teaches:
"Further, in the existing system of FIG. 3, consider that the “random” library changes meanwhile, i.e. someone changes the code for the “random” library, in a separate source-code file that contains the code for that library, and for example, removes the randint( ) function." [0060]
"Further, the IDE instance 420, via the notification 719, can notify the first developer 310 that another developer is modifying a second source-code file 720 that affects the changes being made by the first developer 310 in the first source-code file 710, and particularly in the second block 714." [0070]; Fig. 7
It would have been obvious for one of ordinary skill in the art before the effective filing date of the invention to implement Bishop and Jones with Sabath's teachings because doing so would provide Bishop/Jones' system with the ability to resolve potential code-change conflicts in real-time, before committing the code change to a central repository, as suggested by Sabath [0001].
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Bishop and Jones, and in view of US 20080136832 A1 - hereinafter "Sangili".
With respect to claim 5, Bishop does not explicitly teach,
processing circuitry configured as a presenter to present, in a case where an engineering tool specifies one of the plurality of programs, information on the reference target referenced by the one program to the engineering tool.
However, in the analogous field of software development, Sangili teaches:
"Returning to FIG. 2, a first step may involve a user specifying 201 a process to be tuned and a symbol to be tuned." [0032]
"If objects that are tunable are to include shared libraries, then dynamic load information may be read 204 from the process executable. Using this dynamic load information, a list of the shared libraries used by the process may then be read 206. This list of shared libraries may be displayed via a user interface to the system administrator or other user." [0034]
It would have been obvious for one of ordinary skill in the art before the effective filing date of the invention to implement Bishop and Jones with Sangili's teachings because doing so would provide Bishop/Jones' system with the ability to dynamically tune a user-space process without having to restart the process, as suggested by Sangili (Abstract, [0033]).
Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Bishop, Jones and Buettner, in view of US 20200285462 A1 - hereinafter "Sabath".
With respect to claim 9, Bishop does not explicitly teach,
processing circuitry configured as a change notifier to notify, in a case where one engineering tool changes the reference target, another engineering tool of the change of the reference target.
However, in the analogous field of software updating, Sabath teaches:
"Further, in the existing system of FIG. 3, consider that the “random” library changes meanwhile, i.e. someone changes the code for the “random” library, in a separate source-code file that contains the code for that library, and for example, removes the randint( ) function." [0060]
"Further, the IDE instance 420, via the notification 719, can notify the first developer 310 that another developer is modifying a second source-code file 720 that affects the changes being made by the first developer 310 in the first source-code file 710, and particularly in the second block 714." [0070]; Fig. 7
It would have been obvious for one of ordinary skill in the art before the effective filing date of the invention to implement Bishop, Jones and Buettner with Sabath's teachings because doing so would provide Bishop/Jones/Buettner's system with the ability to resolve potential code-change conflicts in real-time, before committing the code change to a central repository, as suggested by Sabath [0001].
Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Bishop, Jones and Buettner, in view of US 20080136832 A1 - hereinafter "Sangili".
With respect to claim 11, Bishop does not explicitly teach,
processing circuitry configured as a presenter to present, in a case where an engineering tool specifies one of the plurality of programs, information on the reference target referenced by the one program to the engineering tool.
However, in the analogous field of software development, Sangili teaches:
"Returning to FIG. 2, a first step may involve a user specifying 201 a process to be tuned and a symbol to be tuned." [0032]
"If objects that are tunable are to include shared libraries, then dynamic load information may be read 204 from the process executable. Using this dynamic load information, a list of the shared libraries used by the process may then be read 206. This list of shared libraries may be displayed via a user interface to the system administrator or other user." [0034]
It would have been obvious for one of ordinary skill in the art before the effective filing date of the invention to implement Bishop, Jones and Buettner with Sangili's teachings because doing so would provide Bishop/Jones/Buettner's system with the ability to dynamically tune a user-space process without having to restart the process, as suggested by Sangili (Abstract, [0033]).
With respect to claim 6, Bishop teaches,
storing, in a case where a reference target is changed, the reference target after the change at a second address different from a first address of the reference target before the change by a first memory, the reference target being a function or a library referenced by the plurality of programs; and - "FIG. 1 is a memory layout of an illustrative embodiment of the invention, showing the addressing relationships between present and modified versions of a program function;" (page 5:36 through page 6:2) "Function blocks 130, 140, and 150 of FIG. 1 each represent an area of memory for storing a program. Each has an area for storing a decision function (131, 141, and 151) and an area for storing a program function (132, 142, and 152) . The program functions represent a present version, F, (132), a modified version, F.sup.1, (142), and a second modification, F" , (152)." (page 8:24-30) "Since many programs may reference a program function, a list of the present addresses of all program functions is maintained and made available to all calling programs." (page 9:6-9) "When the modified version of the program function, F*, is loaded in system memory, the vector table entry at 121 is changed from f(2), the address of the present version of the program function, to f'(l).sub.f the address of the decision function associated with F'." (page 9:23-28)
associating and managing the first address or the second address with each of the plurality of programs based on whether each of the plurality of programs is to reference the reference target before the change or the reference target after the change. - "Programs are assigned to any available segment of memory. Individual program functions may be used by many processes, but stored only once to save valuable memory space. Since many programs may reference a program function, a list of the present addresses of all program functions is maintained and made available to all calling programs. This list is referred to as a transfer vector table. When a change is loaded into the system, the transfer vector table address is updated to point to the decision function associated with the modified version. When a process calls the program function which was modified, the decision function pointed to by the transfer vector table will determine whether the present or modified version of the program function is to be used." (page 9:3-16)
Bishop does not explicitly teach An address management method for use in a control device that controls a control target according to a control program including a plurality of programs
However, in the analogous field of software deployment, Jones teaches:
"The process controllers (control device), which are also typically located within the plant environment, receive signals indicative of process measurements made by the field devices (control target) and/or other information pertaining to the field devices and execute a controller application (control program) that runs, for example, different control modules (programs) which make process control decisions, generate control signals based on the received information and coordinate with the control modules or blocks being performed in the field devices, such as HART®, WirelessHART®, and FOUNDATION® Fieldbus field devices." [0005]
It would have been obvious for one of ordinary skill in the art before the effective filing date of the invention to implement Bishop with Jones' teachings because doing so would provide Bishop's system with the ability to efficiently manage the configuration of a modular control system, as suggested by Jones [0013].
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. WO 2018150820 A1 discloses storing in memory an original function along with a new corrected function, and updating an address invoking the original function to point to the address of the corrected function in a jump table. The NPL document "Library (computing)" is Wikipedia's entry on the subject.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to GEOFFREY R ST LEGER whose telephone number is (571)270-7720. The examiner can normally be reached M-F (IFP) ~9:00-5:00 pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Hyung S Sough can be reached at 571-272-6799. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/GEOFFREY R ST LEGER/Primary Examiner, Art Unit 2192