Prosecution Insights
Last updated: July 17, 2026
Application No. 18/569,959

TERMINAL AND WIRELESS COMMUNICATION METHOD

Final Rejection §103
Filed
Dec 13, 2023
Priority
Jun 18, 2021 — nonprovisional of PCTJP2021023274
Examiner
NGUYEN, THUONG
Art Unit
2416
Tech Center
2400 — Computer Networks
Assignee
Nippon Telegraph and Telephone Corporation
OA Round
2 (Final)
68%
Grant Probability
Favorable
3-4
OA Rounds
1y 5m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 68% — above average
68%
Career Allowance Rate
452 granted / 663 resolved
+10.2% vs TC avg
Strong +32% interview lift
Without
With
+32.1%
Interview Lift
resolved cases with interview
Typical timeline
4y 0m
Avg Prosecution
41 currently pending
Career history
724
Total Applications
across all art units

Statute-Specific Performance

§101
6.3%
-33.7% vs TC avg
§103
84.8%
+44.8% vs TC avg
§102
6.7%
-33.3% vs TC avg
§112
1.5%
-38.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 663 resolved cases

Office Action

§103
DETAILED ACTION The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. This action is responsive to the Remark filed on 4/27/26. Claim(s) 7-9 was/were amended. Claim(s) 7-9 is/are presented for examination. Claim Objections Claim(s) 7-9 is/are unclear to the examiner; what does it mean by stating “a control section that determines a starting position of bit selection in a first bit sequence based on a redundancy version and determines a starting position of bit selection in an n-th bit sequence based on a last bit of an n-1-th bit sequence, the first bit sequence being transmitted in a first slot within N slots allocated for a transmission method of transmitting a transmission block over a plurality of slots, the n-th bit sequence being transmitted in an n-th slot except for the first slot within the N slots, the n-1-th bit sequence being transmitted in an n-1-th slot within the N slots, n being an integer of two or more and N or less”? The claim languages are not entirely sure what exactly does it mean by stating “determines a starting position of bit selection in a first bit sequence based on a redundancy version”? What exactly is a correlation between a redundancy and the starting position? What about n-th bit sequence being transmitted in an n-th slot except for the first slot? What is the claimed invention? Is the claimed invention about transmit the first bit sequence in the first slot or n-th bit sequence in the n-th slot? What does it have anything to do with “transmitted in an n-th slot except for the first slot”? Please clarify Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 7-9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chen, U.S. Patent/Pub. No. US 2020/0083912 A1 in view of Gao, U.S. Patent/Pub. No. US 2021/0160855 A1. As to claim 9, Chen teaches a radio communication system, comprising: a terminal including: a processor that determines a starting position of bit selection in a first bit sequence based on a redundancy version (Chen, page 1, paragraph 3; page 2, paragraph 18-21 & 42-43; i.e., [0003] cyclic redundancy check encoding; [0018] A starting bit position of the bit sequence in the circular buffer is taken as the predefined starting position. [0020] A position of P0=N-M in the circular buffer is taken as the predefined starting position, where PO represents the position index of the bit sequence, and N is a length of the initial bit sequence) and wherein the processor further determines a starting position of bit selection in an n-th bit sequence based on a last bit of an n-1-th bit sequence (Chen, page 1, paragraph 3; page 2, paragraph 18-21 & 42-43; i.e., [0018] A starting bit position of the bit sequence in the circular buffer is taken as the predefined starting position. [0020] A position of P0=N-M in the circular buffer is taken as the predefined starting position, where PO represents the position index of the bit sequence, and N is a length of the initial bit sequence. [0042] the initial bit sequence {S0 , S1 , ..., SN_1}, and a bit Sn with a bit position index n in the initial bit sequence is mapped onto a position with a position index), wherein the first bit sequence is transmitted in a first slot within N slots allocated for a transmission method of the n-1-th bit sequence being transmitted in an n-1-th slot within the N slots, wherein n is an integer of two or more and N or less (Chen, page 1, paragraph 3; page 2, paragraph 18-21 & 42-43; i.e., [0020] A position of P0=N-M in the circular buffer is taken as the predefined starting position, where PO represents the position index of the bit sequence, and N is a length of the initial bit sequence. [0021] An ending bit position of the bit sequence in the circular buffer is taken as the predefined starting position. [0042] the initial bit sequence {S0 , S1 , ..., SN_1}, and a bit Sn with a bit position index n in the initial bit sequence is mapped onto a position with a position index). But Chen failed to teach the claim limitation wherein transmitting a transmission block over a plurality of slots, wherein the n-th bit sequence is transmitted in an n-th slot except for the first slot within the N slots; a transmitter that transmits the first bit sequence in the first slot and transmits the n-th bit sequence in the n-th slot; and a base station including a receiver, the receiver receiving the first bit sequence in the first slot and receiving the n-th bit sequence in the n-th slot. However, Gao teaches the limitation wherein transmitting a transmission block over a plurality of slots, wherein the n-th bit sequence is transmitted in an n-th slot except for the first slot within the N slots (Gao, page 8, paragraph 127 & 129; i.e., [0127] In slots n+4, n+5 and n+6, since there is only PUCCH, the UCI is transmitted on the PUCCH. The UCI is transmitted in accordance with the encoded bit sequence obtained from the UCI in slot n+3. since the encoded UCI bit sequence in slot n+3 is obtained by encoding the UCI transmitted on the PUCCH, and the PUCCH transmission resources in slot n+3 and the subsequent slots are the same, the transmission of the encoded UCI bit sequence in slot n+3 on the PUCCH in the subsequent slots is the same as that in slot n+3); a transmitter that transmits the first bit sequence in the first slot and transmits the n-th bit sequence in the n-th slot (Gao, page 8, paragraph 127 & 129; i.e., [0127] In slots n+4, n+5 and n+6. The UCI is transmitted in accordance with the encoded bit sequence obtained from the UCI in slot n+3. the transmission of the encoded UCI bit sequence in slot n+3 on the PUCCH in the subsequent slots is the same as that in slot n+3; [0129] When receiving the last repeated transmission of UCI and after merging the bit sequences of the encoded UCI in the last slot); and a base station including a receiver, the receiver receiving the first bit sequence in the first slot and receiving the n-th bit sequence in the n-th slot (Gao, page 8, paragraph 127 & 129; i.e., [0127] In slots n+4, n+5 and n+6, since there is only PUCCH, the UCI is transmitted on the PUCCH. the encoded bit sequence obtained from the UCI in slot n+3. the UCI transmitted on the PUCCH, and the PUCCH transmission resources in slot n+3 and the subsequent slots are the same, the transmission of the encoded UCI bit sequence in slot n+3 on the PUCCH in the subsequent slots is the same as that in slot n+3; [0129] When receiving the last repeated transmission of UCI and after merging the bit sequences of the encoded UCI in the last slot). It would have been obvious to one of ordinary skill in the art before the effective date of the claimed invention to modify Chen to substitute logical block diagram from Gao for transport block from Chen to ensure that the network-side device merges the repetition transmission of the UCI correctly and improve the UCI transmission performance (Gao, page 1, paragraph 10). Claim(s) 7 & 8 is/are directed to a system and method claims and they do not teach or further define over the limitations recited in claim(s) 9. Therefore, claim(s) 7 & 8 is/are also rejected for similar reasons set forth in claim(s) 9. Response to Arguments Applicant’s argument(s) filed 4/27/26 have been fully considered but they are not persuasive. Applicant argues in substance that: A) with respect to claims 7-9; Chen does not teach "determining a starting position of bit selection based on a redundancy version," as required by the above-mentioned limitation. Paragraph [0003] of Chen describes that the check bits may be generated through cyclic redundancy check encoding and paragraph [0018] of Chen describes that a starting bit position of the bit sequence in the circular buffer is taken as the predefined starting position. Further, paragraph [0020] of Chen describes that a position of P0 = N - M in the circular buffer is taken as the predefined starting position and paragraph [0021] of Chen describes that an ending bit position of the bit sequence in the circular buffer is taken as the predefined starting position. As such, Chen describes fixed or preselected positions in a circular buffer determined by buffer length parameters (N and M), not by a redundancy version. Chen does not relate the starting position to a redundancy version (page 15-16); B) with respect to claims 6-9; Chen also fails to teach "determining a starting position of bit selection in an n-th bit sequence based on a last bit of an n-1-th bit sequence" as required by the above-mentioned limitation. Specifically, paragraph [0042] of Chen describes that a bit Sₙ with a bit position index n in the initial bit sequence is mapped onto a position with a position index in the circular buffer by means of a bit reversal order (BRO) interleaver. As such, Chen describes static bit-to-position mapping during interleaving, not basing the starting position of bit selection in the n-th bit sequence on the last bit of an n-1-th bit sequence (page 16-17); C) with respect to claims 6-9; Gao is also silent with respect to "determining a starting position of bit selection based on a redundancy version" and "determining a starting position of bit selection in an n-th bit sequence based on a last bit of an n-1-th bit sequence," as required by the above-mentioned limitation. Further, the Examiner relies on Gao to supply the slot-based transmission. Specifically, paragraph [0127] of Gao describes that the transmission of the encoded UCI bit sequence in slot n+3 on the PUCCH in the subsequent slots is the same as that in slot n+3. As such, Gao teaches repeated transmission of the encoded UCI bit sequence across multiple slots. However, Gao does not teach transmitting different bit sequences in different slots (page 16-17). In response to A); Chen does teach the claimed limitation of “determines a starting position of bit selection in a first bit sequence based on a redundancy version” (Chen, page 1, paragraph 3; page 2, paragraph 18-21 & 42-43; i.e., [0003] cyclic redundancy check encoding; [0018] A starting bit position of the bit sequence in the circular buffer is taken as the predefined starting position. [0020] A position of P0=N-M in the circular buffer is taken as the predefined starting position, where PO represents the position index of the bit sequence in the circular buffer, M is the length of the sequence to be transmitted, and N is a length of the initial bit sequence). Moreover, the claim limitation does not define the correlation between the “starting position” and the “redundancy version” and how is the “redundancy version” define the “starting position”. Clearly, the starting bit position of the bit sequence is predefined by the system. Therefore, Chen meets the claim limitation. In response to B); Chen does teach the claimed limitation of “determines a starting position of bit selection in an n-th bit sequence based on a last bit of an n-1-th bit sequence” (Chen, page 1, paragraph 3; page 2, paragraph 18-21 & 42-43; i.e., [0018] A starting bit position of the bit sequence in the circular buffer is taken as the predefined starting position. [0020] A position of P0=N-M in the circular buffer is taken as the predefined starting position, where PO represents the position index of the bit sequence in the circular buffer, M is the length of the sequence to be transmitted, and N is a length of the initial bit sequence. [0021] An ending bit position of the bit sequence in the circular buffer is taken as the predefined starting position. [0042] In some embodiments, the bit sequence in the circular buffer is obtained by performing bit reversal order (BRO) interleaving on the initial bit sequence {S0 , S1 , ..., SN_1}, and a bit Sn with a bit position index n in the initial bit sequence is mapped onto a position with a position index; [0042] the initial bit sequence {S0 , S1 , ..., SN_1}, and a bit Sn with a bit position index n in the initial bit sequence is mapped onto a position with a position index). Clearly, the starting bit position of the bit sequence is taken as the predefined starting position and ending bit position is equating to “1st bit of an n-1-th bit sequence”. Therefore, Chen meets the claim limitation. In response to C); Gao does teach the claimed limitation of “transmitting a transmission block over a plurality of slots, wherein the n-th bit sequence is transmitted in an n-th slot except for the first slot within the N slots” (Gao, page 8, paragraph 127 & 129; i.e., [0127] In slots n+4, n+5 and n+6, since there is only PUCCH, the UCI is transmitted on the PUCCH. The UCI is transmitted in accordance with the encoded bit sequence obtained from the UCI in slot n+3. That is, the UCI is not re-encoded for the current PUCCH resources; since the encoded UCI bit sequence in slot n+3 is obtained by encoding the UCI transmitted on the PUCCH, and the PUCCH transmission resources in slot n+3 and the subsequent slots are the same, the transmission of the encoded UCI bit sequence in slot n+3 on the PUCCH in the subsequent slots is the same as that in slot n+3). Clearly, transmission resources in slot n+3 and subsequent slots are equating to “transmitting a transmission block over a plurality of slots, wherein the n-th bit sequence is transmitted in an n-th slot except for the first slot within the N slots”. Therefore, Gao meets the claim limitation. In response to applicant's argument that there is no suggestion to combine the references, the examiner recognizes that obviousness can only be established by combining or modifying the teachings of the prior art to produce the claimed invention where there is some teaching, suggestion, or motivation to do so found either in the references themselves or in the knowledge generally available to one of ordinary skill in the art. See In re Fine, 837 F.2d 1071, 5 USPQ2d 1596 (Fed. Cir. 1988) and In re Jones, 958 F.2d 347, 21 USPQ2d 1941 (Fed. Cir. 1992). In this case, it would have been obvious to one of ordinary skill in the art before the effective date of the claimed invention to modify Chen to substitute logical block diagram from Gao for transport block from Chen to ensure that the network-side device merges the repetition transmission of the UCI correctly and improve the UCI transmission performance (Gao, page 1, paragraph 10). THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Listing of Relevant Arts Chen, U.S. Patent/Pub. No US 20210014824 A1 discloses transmitting slot except the starting position. JI, U.S. Patent/Pub. No. US 20180097607 A1 discloses transmitted slot without being transmitted in a first time slot. Contact Information The present application is being examined under the pre-AIA first to invent provisions. THUONG NGUYEN whose telephone number is (571)272-3864. The examiner can normally be reached on Monday-Friday 9:00-6:00. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Noel Beharry can be reached on 571-270-5630. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /THUONG NGUYEN/Primary Examiner, Art Unit 2416
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Prosecution Timeline

Dec 13, 2023
Application Filed
Dec 29, 2025
Non-Final Rejection mailed — §103
Mar 30, 2026
Examiner Interview Summary
Mar 30, 2026
Applicant Interview (Telephonic)
Apr 27, 2026
Response Filed
Jun 16, 2026
Final Rejection mailed — §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
68%
Grant Probability
99%
With Interview (+32.1%)
4y 0m (~1y 5m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 663 resolved cases by this examiner. Grant probability derived from career allowance rate.

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