DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-12 and 19-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites the term “device system-on-a-chip (SoC)” in claim 1, line 1. It is unclear, and therefore indefinite, whether this refers to a device comprising a system-on-a-chip, or a system-on-a-chip which is a device. It is additionally unclear whether “system-on-a-chip” is the same or different from the commonly understood term “system on a chip.”
For examination purposes “device system-on-a-chip (SoC)” will be read as “system on a chip (SoC).”
Claims 2-12, and 19-20 additionally recite “device system-on-a-chip (SoC)” or “device SoC” and are both rejected and read similarly.
Claims 2-12 and 20 are rejected due to their dependency from claims 1 and 19, respectively.
Claim 2 contains the trademark “SoundWire” in line 2. Where a trademark or trade name is used in a claim as a limitation to identify or describe a particular material or product, the claim does not comply with the requirements of 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph. See Ex parte Simpson, 218 USPQ 1020 (Bd. App. 1982). The claim scope is uncertain since the trademark or trade name cannot be used properly to identify any particular material or product. A trademark or trade name is used to identify a source of goods, and not the goods themselves. Thus, a trademark or trade name does not identify or describe the goods associated with the trademark or trade name. In the present case, the trademark is used to describe the streaming audio interface of line 1 and audio frame of line 2 and, accordingly, the description is indefinite.
Claim 3 is rejected under 112(b) for similar use of the term SoundWire, as well as for being dependent on claim 2.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-4 and 13-14, and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Poulsen, US-PG-PUB No. 2019/0287549 in view of Reiss et al (hereinafter Reiss), US-PG-PUB No. 2018/0038908.
Regarding claim 1, Poulsen discloses a device (A connected device of an audio system.....¶[0048], lines 3-4) comprising:
a streaming audio interface (A device controller which connects to the interface of a host device (thereby also acting as an interface for the connected device) to receive an audio data stream.....¶[0050], lines 12-13);
local memory (The slave devices of the connected device have registers (local memory).....¶[0143], lines 1-3); and
a device controller coupled to the local memory (Shown in Fig. 1A, device controller (140) is connected to the slave components (144, 142) and their registers), the device controller to:
decode (Audio data is encoded by the host device that sends it, and therefore must be decoded by the connected device to be used.....¶[0050], lines 9-12) an audio frame (The connection between host and connected device may conform to the SoundWire specification (¶[0050], lines 1-5), which utilizes a defined (audio) frame format.....¶[0071], lines 1-2) to generate a decoded audio frame (Explained above, the audio data is encoded by a codec of a host device, and therefore must be decoded by the connected device to be used), the audio frame received via the streaming audio interface (Audio data is transmitted over the streaming audio interface.....¶[0050], lines 12-13);
process the decoded audio frame according to a streaming audio protocol (The SoundWire protocol gives a framework for processing SoundWire streaming audio frames.....¶[0071], lines 1-2) to obtain corresponding control data (Shown in Fig. 17, a frame contains a command field (control data) comprising the operation codes in the third column.....¶[0142], lines 3-5), and periodic streaming audio data (Shown in Fig. 17, columns 4-11 contain streaming audio data);
parse the control data (Detailed below, the connected device operates (using read and write commands) based on the received data contents, requiring the decoding and parsing of said contents.....¶[0160], lines 1-4) to obtain a memory address pointer (Shown in Fig. 17, and detailed in Fig. 18, symbol (1804), column 4 of the frame includes a device ID and register address (memory address pointer) of the device, indicating an initial location for operations.....¶[0168], lines 7-9); and
perform memory access to the local memory based on the memory address pointer (Control data includes read and write commands, which access the indicated register address (memory address pointer).....¶[0160], lines 1-4).
Poulsen fails to disclose wherein the device comprises a system on a chip (SoC).
Reiss teaches a SoundWire audio interface for a slave device (comparable to the device of Poulsen) implemented in a SoC (¶[0033], lines 5-8) as part of an entire system for a computing device, also on the SoC (¶[0002], lines 7-9).
Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Poulsen to incorporate the teachings of Reiss, and provide wherein the device comprises a SoC. This would provide the benefit of a more compact device for use in consumer electronics.
Regarding claim 2, the combination of Poulsen and Reiss, as explained above, teach the SoC of claim 1.
Poulsen additionally teaches wherein the streaming audio interface is a SoundWire audio interface (¶[0050], lines 1-5), and the audio frame is a SoundWire audio frame (¶[0071], lines 1-2).
Regarding claim 3, the combination of Poulsen and Reiss, as explained above, teach the SoC of claim 2.
Poulsen additionally teaches wherein the device controller is to: forward the periodic streaming audio data of the SoundWire audio frame to a local buffer (The audio data is forwarded to audio output circuitry, requiring the use of a buffer at least as part of a digital to analog conversion.....¶[0051], lines 13-15), the local buffer being separate from the local memory (The audio output circuitry is separate from the local memory registers).
Regarding claim 10, the combination of Poulsen and Reiss, as explained above, teach the SoC of claim 1.
Poulsen additionally teaches wherein the device controller is further to: process the decoded audio frame according to the streaming audio protocol to further obtain bulk data (Shown in Fig. 18B, frame (1816) is configured to transfer bulk data to the connected device.....¶[0169], lines 5-6).
Claim 13 is rejected under the same grounds as claim 1.
Claims 4, 11-12, 14, and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Poulsen in view of Reiss in further view of the Specification for SoundWire. MIPI Alliance, 2015 (hereinafter MIPI).
Regarding claim 4, the combination of Poulsen and Reiss, as explained above, teach the SoC of claim 1.
Poulsen additionally teaches wherein the device controller is further to: process the control data to obtain a memory access command (Control data includes read and write commands, which access the indicated register address (memory address pointer).....¶[0160], lines 1-4), and wherein the determination of the memory address pointer is based on the memory access command (Shown in Fig. 17, the frame’s access command indicates which registers are to be accessed).
This further combination fails to teach the determination of the memory address pointer based on an address mapping table and the memory access command.
MIPI teaches wherein commands sent via the SoundWire audio interface may utilize a paging table (address mapping table) of additional paging registers (Shown on page 165, table 69, some address registers may only be accessed by utilizing paging registers, which map a virtual address space to a physical memory), and wherein the determination of the memory address pointer is based on an address mapping table and the memory access command (A control word contains the read or write command, as well as instructions to use the optional paging registers (address mapping table)…..Page 162, lines 3224-3226).
Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified the combined disclosures of Poulsen and Reiss to incorporate the teachings of MIPI, and provide wherein the determination of the memory address pointer is based on an address mapping table and the memory access command. This would provide the benefit of extending memory in SoundWire devices from 64 Kbytes to 2 Gbytes (MIPI, Page 162, lines 3227-3230).
Regarding claim 11, the combination of Poulsen and Reiss, as explained above, teach the SoC of claim 10.
Poulsen additionally teaches wherein the device controller is further to: process the bulk data to obtain a second memory access command (Processing of bulk data involves writing or reading data to or from multiple subsequent registers, thereby a bulk transfer operation consists of multiple commands to access said multiple registers.....¶[0169], lines 1-7), wherein the second memory address pointer is based on the second memory access command (The register increments with each command, so a memory access command also determines which memory address is pointed to.....¶[0168], lines 7-9).
This further combination fails to explicitly teach determining a second memory address pointer based on an address mapping table and the second memory access command.
MIPI teaches wherein commands sent via the SoundWire audio interface may utilize a paging table (address mapping table) of additional paging registers (Shown on page 165, table 69, some address registers may only be accessed by utilizing paging registers, which map a virtual address space to a physical memory), and wherein the determination of the memory address pointer is based on an address mapping table and the memory access command (A control word contains the read or write command, as well as instructions to use the optional paging registers (address mapping table)…..Page 162, lines 3224-3226).
Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified the combined disclosures of Poulsen and Reiss to incorporate the teachings of MIPI, and provide wherein the determination of the second memory address pointer is based on an address mapping table and the second memory access command. This would provide the benefit of extending memory in SoundWire devices from 64 Kbytes to 2 Gbytes (MIPI, Page 162, lines 3227-3230).
Regarding claim 12, the combination of Poulsen, Reiss, and MIPI, as explained above, teach the SoC of claim 11.
Poulsen additionally teaches wherein the device controller is further to: perform the second memory access command using the second memory address pointer associated with the local memory (Control data includes read and write commands, which access the indicated register address (memory address pointer).....¶[0160], lines 1-4), wherein the second memory address pointer and the memory address pointer are associated with corresponding non-overlapping memory address spaces of the local memory (The address increments on subsequent access commands, thus a second command won’t overlap with a first one.....¶[0168], lines 7-9).
Claim 14 is rejected under the same grounds as claim 4.
Regarding claim 19, the functional limitations cited are the same as those of claim 4, and are taught by the combination of Poulsen, Reiss, and MIPI as explained in the rejection of claim 4.
Regarding the additional limitations of claim 19, Poulsen additionally teaches the existence of a digital signal processor (Timing for operations within the device is driven by the clock of the digital signal processor (DSP clock).....¶[0077], line 7) coupled to the device controller (The DSP clock is coupled to the data bus, which is coupled to the device controller.....¶[0077], lines 7-8).
Claims 5-9, 15-18, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Poulsen in view of Reiss and MIPI in further view of Tsirkin, US-PG-PUB No. 2022/0058119.
Regarding claim 5, the combination of Poulsen, Reiss, and MIPI, as explained above, teach the SoC of claim 4, but fail to explicitly teach wherein the device controller is further to: perform a verification of the memory address pointer.
Tsirkin teaches a computing device wherein a device controller (A digital signal processing device.....¶[0080], line 11) performs verification of memory address pointers (A validation module verifies memory address pointers before use.....¶[0043], lines 8-11).
Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified the combined disclosures of Poulsen, Reiss, and MIPI to incorporate the teachings of Tsirkin, and provide wherein the device controller performs verification of memory address pointers. This would provide the benefit of a system which avoids common issues from the referencing of null pointers such as segmentation faults and software crashes (Tsirkin, ¶[0012], last four lines).
Regarding claim 6, the combination of Poulsen, Reiss, and MIPI, and Tsirkin, as explained above teach the SoC of claim 5.
Tsirkin additionally teaches wherein the device controller is further to:
perform a memory access command using the memory address pointer (Pointers are used in accessing memory chunks.....¶[0024], lines 14-15) associated with the local memory (Achieved using page tables.....¶[0029], lines 8-12), based on a result of the verification indicating that the memory address pointer is valid (A new pointer is provided before access as part of the verification process.....¶[0024], lines 10-14).
Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified the combined disclosures of Poulsen, Reiss, MIPI, and Tsirkin to further incorporate the teachings of Tsirkin, and provide wherein the device controller is further to: perform the memory access command using the memory address pointer associated with the local memory, based on a result of the verification indicating that the memory address pointer is valid. This would provide the benefit of a system which avoids common issues from the referencing of null pointers such as segmentation faults and software crashes (Tsirkin, ¶[0012], last four lines).
Regarding claim 7, the combination of Poulsen, Reiss, and MIPI, and Tsirkin, as explained above teach the SoC of claim 5.
Tsirkin additionally teaches further comprising a digital signal processor (DSP) (The method may be performed by a digital signal processing device.....¶[0080], line 11), and wherein the device controller is further to: cause the DSP to perform a validation of the local memory, based on a result of the verification indicating that the memory address pointer is invalid (A second (valid) pointer is provided based on the first pointer being marked invalid.....¶[0043], lines 13-17).
Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified the combined disclosures of Poulsen, Reiss, MIPI, and Tsirkin to further incorporate the teachings of Tsirkin, and provide further comprising a digital signal processor (DSP), and wherein the device controller is further to: cause the DSP to perform a validation of the local memory, based on a result of the verification indicating that the memory address pointer is invalid. This would provide the benefit of a system which avoids common issues from the referencing of null pointers such as segmentation faults and software crashes (Tsirkin, ¶[0012], last four lines).
Regarding claim 8, the combination of Poulsen, Reiss, and MIPI, and Tsirkin, as explained above teach the SoC of claim 7.
Tsirkin additionally teaches wherein the device controller is further to: determine an updated memory address pointer subsequent to the validation (An updated second (valid) pointer is provided based on the first pointer being marked invalid.....¶[0043], lines 13-17), based on the address mapping table (Memory commands are based on the paging table when used.....¶[0040], lines 22-26) and the memory access command (The process of updating is based on allocation (access) requests.....¶[0043], lines 1-4); and perform the memory access command using the updated memory address pointer associated with the local memory (The second, updated pointer is used to access the local memory.....¶[0043], lines 15-17).
Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified the combined disclosures of Poulsen, Reiss, MIPI, and Tsirkin to further incorporate the teachings of Tsirkin, and provide wherein the device controller is further to: determine an updated memory address pointer subsequent to the validation, based on the address mapping table and the memory access command; and perform the memory access command using the updated memory address pointer associated with the local memory. This would provide the benefit of a system which avoids common issues from the referencing of null pointers such as segmentation faults and software crashes (Tsirkin, ¶[0012], last four lines).
Regarding claim 9, the combination of Poulsen, Reiss, and MIPI, and Tsirkin, as explained above, teach the SoC of claim 7, but fail to explicitly teach wherein the device controller is further to: cause the DSP to transition from a low-power state to a normal power state before performing the validation of the local memory.
MIPI additionally teaches wherein a slave device (analogous to the SoC) may transition from a low-power state to a normal power state (A slave device may stop or start a clock, thus shifting between power states, in response to commands from a master device…..Pg. 112, lines 1986-1988) before performing memory payload operations (Pg. 112, line 1988).
Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified the combined disclosures of Poulsen, Reiss, MIPI, and Tsirkin to further incorporate the teachings of MIPI and provide wherein the SoC may transition from a low-power state to a normal power state before performing memory payload operations. This would provide the benefit of a system with effective power saving (MIPI, Pg. 111, line 1953). Such a modification would make obvious the feature wherein the device transitions to a normal power state before performing validation of local memory, as such validations are part of the memory payload operations of Tsirkin discussed in the rejection of claims 6-8.
Claim 15 is rejected under the same grounds as claim 5.
Claim 16 is rejected under the same grounds as claim 6.
Claim 17 is rejected under the same grounds as claim 9.
Claim 18 is rejected under the same grounds as claims 8 and 9.
Claim 20 is rejected under the same grounds as claims 8 and 9.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Savell et al, US Patent No. 8,060,226, teaches a method of controlling an audio device wherein page tables are used to translate virtual memory addresses into physical memory addresses.
Amarilio et al, US-PG-PUB No. 2019/0250876 teaches a method of parsing and sending soundwire data frames, largely taught from the perspective of the master device.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SEAN M RINEHART whose telephone number is (571)272-2778. The examiner can normally be reached M-F 10:00 AM - 6:00 PM ET.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Fan Tsang can be reached on (571) 272-7547. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/SEAN M RINEHART/Examiner, Art Unit 2694
/FAN S TSANG/Supervisory Patent Examiner, Art Unit 2694