DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are indicated in the table below, along with corresponding structure and/or lack thereof:
Claim limitation
Claim Numbers
Structure (PGPUB citation)
Storage assembly
1, 3-5, 7, 9-13 and 15-18
An array of high-power energy storage devices, which are supercapacitors, EDLCs, pseudo-capacitor or functional equivalents [0008], [0032-0033]
current limiting charging device
1-2, 4-7, 9-10, 13, 16 and 18
DC-DC converter [0040]
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 16-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 16 recites “a current limiting charging device configured to receive a second control instruction from said processor and direct one of said storage assembly voltage, to said terminals and said charging voltage at said terminals to said storage assembly” and “a protection device configured to receive a first control instruction from said processor and direct one of said storage assembly voltage to said terminals and said charging voltage at said terminals to said storage assembly”. It is unclear what is meant by the current limiting device directing “storage assembly volage” (which also lacks antecedent basis) and the protection device directing “charging voltage”. For the purpose of examination, Examiner is interpreting the limitations as the current limiting device as directing the charging voltage to the storage assembly device and as the protection device directing the storage assembly voltage to said terminals.
Claim 18 recites “said a limited charging voltage”. However, “limited charging voltage” has not been mentioned before this instance, so it is not clear how it is “said”.
Claim Rejections - 35 USC § 103
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-7, 9, 11-13 & 15 are rejected under 35 U.S.C. 103 as being unpatentable over Bottemiller et al. US Patent 9,508,399 in view of Kranz et al. US PGPUB 2019/0135355.
Regarding claim 1, Bottemiller discloses an electrical storage system [figs. 2-3] comprising:
a storage assembly configured to store electrical energy [col. 5, line 6-30; capacitor circuit 38 which may comprise “supercapacitors”],
a processor configured to control a charging of said storage assembly [fig. 2, power governor 30; col. 8, line 32-column 10, line 53; the power governor 30 controls the charge level of the capacitor circuit 38], and
a current limiting charging device configured to control at least the charging of said storage assembly based on a charging voltage applied to a plurality of terminals associated with said electrical storage system [fig. 3; col. 8, line 32-col. 9, line 26; column 10, lines 1-53; the control switches 62 control the charging based on a charging voltage at the capacitors], said current limiting charging device configured to limit said charging voltage to said storage assembly based on a storage assembly voltage being insufficient to power said processor [fig. 3; col. 8, line 32-col. 9, line 26; column 10, lines 1-53; the control switches 62 limit charging voltage to the capacitor circuit if the voltage is over a threshold plus a buffer (only allowing discharge, “discharge only”)].
Bottemiller disclose the current limiting charging device but does not explicitly disclose the structure corresponding to the 112(f) limitations above, that of a DC-DC converter.
However, Kranz disclose a supercapacitor charging system comprising a current limiting charging device which is a DC-DC converter [abs.; pars. 15, 34 & 36-39; fig. 3, super capacitor array 212 connected via DC-DC converter 210 to remainder of system].
It would have been obvious to one of ordinary skill before the effective filing date of the claimed invention to modify Bottemiller to further include the current limiting charging device comprises a DC-DC converter for the purpose of increasing the voltage to a high enough level to charge the capacitor array, as taught by Kran (par. 36).
Regarding claim 2, Bottemiller discloses further comprising a selector circuit configured to activate said current limiting charging device [fig. 3, OR gate 60; column 9, lines 26-47].
Regarding claim 3, Bottemiller discloses wherein said selector circuit is configured to receive at least one of a voltage associated with said storage assembly, a voltage associated with said plurality of terminals, and a control signal provided by said processor [column 9, lines 26-47; voltage level of capacitor circuit or control signal due to PLI event].
Regarding claim 4, Bottemiller discloses wherein said processor is configured to provide a control signal to said current limiting charging device, and wherein said control signal causes said current limiting charging device to limit a discharge voltage from said storage assembly [column 6, lines 13-32; column 7, lines 1-5; the processor 16 cause a signal to limit discharge if the capacitor voltage declines below a level].
Regarding claim 5, Bottemiller discloses wherein said processor is configured to provide a control signal to said current limiting charging device, and wherein said control signal causing said current limiting charging device to limit said charge voltage to said storage assembly [column 10, lines 7-21; the governor causes a switch in the current limiting device to open].
Regarding claim 6, Bottemiller does not explicitly disclose further comprising a protection circuit in parallel to said current limiting charging device, wherein said processor is configured to provide a first control signal to said protection circuit, and wherein said protection circuit control performs at least one of a discharge of said storage device and a charging of said storage device based on said first control signal.
However, Kranz further discloses a protection circuit in parallel to said current limiting charging device, wherein said processor is configured to provide a first control signal to said protection circuit, and wherein said protection circuit control performs at least one of a discharge of said storage device and a charging of said storage device based on said first control signal [fig. 3; discharge circuit 214 and switch 216 in parallel with boost circuit 210 with respect to 212; par. 39-41; the discharge circuit is operated based on a signal from processor 4 and discharges the super capacitor].
It would have been obvious to one of ordinary skill before the effective filing date of the claimed invention to modify Bottemiller to further include a protection circuit in parallel to said current limiting charging device, wherein said processor is configured to provide a first control signal to said protection circuit, and wherein said protection circuit control performs at least one of a discharge of said storage device and a charging of said storage device based on said first control signal for the purpose of reducing the capacitor voltage when desired, as taught by Kranz (par. 40).
Regarding claim 7, Bottemiller discloses an electrical storage system [figs. 2-3] configured to perform one of outputting a discharge voltage and receiving a charging voltage, said electrical storage system comprising:
a charge storage assembly comprising a plurality of electrical energy storage elements [col. 5, line 6-30; capacitor circuit 38 which may comprise “supercapacitors”],
a current limiting charging device, in parallel to said protection circuit and configured to control said received charging voltage applied to said storage assembly [fig. 3; col. 8, line 32-col. 9, line 26; column 10, lines 1-53; the control switches 62 control the charging based on a charging voltage at the capacitors], and
at least one processor configured to receive said voltage associated with said charge storage assembly [fig. 2, power governor 30; col. 8, line 32-column 10, line 53; the power governor 30 controls the charge level of the capacitor circuit 38], and provide a second indication to said current limiting charging device, wherein said processor manages one of said output of said discharge voltage and said receiving of said charging voltage based at least on said voltage associated with said charge storage assembly [fig. 3; col. 8, line 32-col. 9, line 26; column 10, lines 1-53; the control switches 62 limit charging voltage to the capacitor circuit if the voltage is over a threshold plus a buffer (only allowing discharge, “discharge only”)].
Bottemiller does not explicitly disclose the protection circuit configured to control at least one of outputting said discharge voltage from said storage assembly and applying said charging voltage to said storage assembly or the processor providing a first indication to said protection circuit.
However, Kranz disclose a supercapacitor charging system comprising the protection circuit configured to control at least one of outputting said discharge voltage from said storage assembly and applying said charging voltage to said storage assembly or the processor providing a first indication to said protection circuit [fig. 3; discharge circuit 214 and switch 216 in parallel with boost circuit 210 with respect to 212; par. 39-41; the discharge circuit is operated based on a signal from processor 4 and discharges the super capacitor].
It would have been obvious to one of ordinary skill before the effective filing date of the claimed invention to modify Bottemiller to further include the protection circuit configured to control at least one of outputting said discharge voltage from said storage assembly and applying said charging voltage to said storage assembly or the processor providing a first indication to said protection circuit for the purpose of reducing the capacitor voltage when desired, as taught by Kranz (par. 40).
Regarding claim 9, Bottemiller discloses further comprising a selection circuit configured to receive as inputs at least one of said charging voltage, said storage assembly voltage and said first indication, and pass at least one of said inputs to said current limiting charging device [column 9, lines 26-47; voltage level of capacitor circuit or control signal due to PLI event].
Regarding claim 11, Bottemiller discloses a second voltage measurement device configured to measure said voltage associated with said charging voltage [column 5, lines 46-69; column 6, lines 26-32 and lines 53-60].
Bottemiller does not explicitly disclose a first voltage measurement device configured to measure said voltage associated with said storage assembly.
However, Kranz further discloses a first voltage measurement device configured to measure said voltage associated with said storage assembly [par. 37].
It would have been obvious to one of ordinary skill before the effective filing date of the claimed invention to modify Bottemiller to further include wherein
for the purpose of determining when the supercapacitor voltage is sufficient, as taught by Kranz (par. 37).
Regarding claim 12, Bottemiller does not explicitly disclose wherein said protection circuit is configured to control one of said discharge voltage out of said storage assembly and said received charging voltage to said storage assembly based on said first indication.
However, Krantz as applied in claim 7 disclose wherein said protection circuit is configured to control one of said discharge voltage out of said storage assembly and said received charging voltage to said storage assembly based on said first indication [par. 40; based on the voltage of the supercapacitor the discharge switch operates].
Regarding claim 13, Bottemiller discloses wherein said current limiting charging device is configured to control one of said discharge voltage out of said storage assembly and said received charging voltage to said storage assembly based on said second indication [column 6, lines 13-32; column 7, lines 1-5; the processor 16 cause a signal to limit discharge if the capacitor voltage declines below a level].
Regarding claim 15, Bottemiller discloses further comprising at least one temperature sensor configured to measure a temperature of at least said storage assembly [fig. 2; 42; column 10, line 54-column 11, line 6].
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Bottemiller et al. US Patent 9,508,399 in view of Kranz et al. US PGPUB 2019/0135355, and further in view of Chol et al. US PGPUB 2018/0154779.
Regarding claim 8, Bottemiller does not explicitly disclose further comprising a balancing circuit configured to receive electrical energy from said plurality of energy storge elements and balance said received electrical energy from said storage elements to output said discharge voltage.
However, Chol discloses a supercapacitor power system comprising a balancing circuit configured to receive electrical energy from said plurality of energy storge elements and balance said received electrical energy from said storage elements to output said discharge voltage [pars. 11, 27, 70, 83, 98 & 108; processor 512 controls switches to force supercapacitor cells to drain power].
It would have been obvious to one of ordinary skill before the effective filing date of the claimed invention to modify Bottemiller to further include wherein a balancing circuit configured to receive electrical energy from said plurality of energy storge elements and balance said received electrical energy from said storage elements to output said discharge voltage for the purpose of preventing overcharge, as taught by Chol (par. 27).
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Bottemiller et al. US Patent 9,508,399 in view of Kranz et al. US PGPUB 2019/0135355, and further in view of Ingram et al. US PGPUB 2006/0241876.
Regarding claim 14, Bottemiller does not explicitly disclose further comprising a user interface configured to provide information regarding said electrical storage system to a user, and an external input module configured to receive at least said charging voltage.
However, Ingram discloses a supercapacitor array system [abs.; figs. 2-3] further comprising a user interface configured to provide information regarding said electrical storage system to a user, and an external input module configured to receive at least said charging voltage [par. 37-39 & 193; cell parameters are received and outputted on a GUI for a user including cell voltage].
It would have been obvious to one of ordinary skill before the effective filing date of the claimed invention to modify Bottemiller to further include a user interface configured to provide information regarding said electrical storage system to a user, and an external input module configured to receive at least said charging voltage for the purpose of indicating to a user the system status, and since it has been held to be within the general skill of a worker in the art to apply a known technique to a known device (method, or product) which was ready for improvement in order to yield results predictable by one of ordinary skill the art. KSR International Co. v Teleflex Inc., 550 U.S. 398, 127 S. Ct. 1727, 82 USPQ2d 1385, 1395-97 (2007).
Claims 10, 16 and 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over Bottemiller et al. US Patent 9,508,399 in view of Kranz et al. US PGPUB 2019/0135355, and further in view of Flett US PGPUB 2010/0133025.
Regarding claim 10, Bottemiller discloses wherein said current limiting charging device is configured to step-down said received charging voltage to be applied to said storage assembly when said storage assembly voltage is below a known threshold.
However, Flett discloses a supercapacitor array wherein said current limiting charging device is configured to step-down said received charging voltage to be applied to said storage assembly when said storage assembly voltage is below a known threshold [pars. 31, 43 & 48-49; the capacitors output a voltage which is stepped up or down based on the DC bus voltage requirements].
It would have been obvious to one of ordinary skill before the effective filing date of the claimed invention to modify Bottemiller to further include wherein said current limiting charging device is configured to step-down said received charging voltage to be applied to said storage assembly when said storage assembly voltage is below a known threshold for the purpose of regulating the voltage on the DC bus, as taught by Flett (pars. 31, 43 & 48-49).
Regarding claim 16, Bottemiller discloses an electrical storage system [figs. 2-3] comprising:
a pair of electrical terminals [fig. 3; charge and supply terminals],
a storage assembly comprising a plurality of electrical storage elements [col. 5, line 6-30; capacitor circuit 38 which may comprise “supercapacitors”], and
a management device configured to control a discharge voltage from said storage assembly to said electrical terminals and a charging voltage from said electrical terminals to said storage assembly [fig. 2-3; the controller 28 contains power governor 30 and controls the charge/discharge of the capacitor device; column 7, line 61-column 8, line 9; col. 8, line 32-column 10, line 53]; said management device comprising
a processor configured to determine control instructions based on at least one of a storage assembly voltage and a charging voltage present at said electrical terminals [fig. 2, power governor 30; col. 8, line 32-column 10, line 53; the power governor 30 controls the charge level of the capacitor circuit 38],
a current limiting charging device configured to receive a second control instruction from said processor and direct one of said storage assembly voltage to said terminals and said charging voltage at said terminals to said storage assembly [fig. 3; col. 8, line 32-col. 9, line 26; column 10, lines 1-53; the control switches 62 control the charging based on a charging voltage at the capacitors].
Bottemiller does not explicitly disclose a protection device configured to receive a first control instruction from said processor and direct one of said storage assembly voltage to said terminals and said charging voltage at said terminals to said storage assembly.
Bottemiller does not explicitly disclose wherein when said storage voltage is less than a first threshold stepping down said charging voltage passed to said storage assembly.
However, Kranz disclose a supercapacitor charging system comprising the protection device configured to receive a first control instruction from said processor and direct one of said storage assembly voltage to said terminals and said charging voltage at said terminals to said storage assembly [fig. 3; discharge circuit 214 and switch 216 in parallel with boost circuit 210 with respect to 212; par. 39-41; the discharge circuit is operated based on a signal from processor 4 and discharges the super capacitor].
It would have been obvious to one of ordinary skill before the effective filing date of the claimed invention to modify Bottemiller to further include the protection device configured to receive a first control instruction from said processor and direct one of said storage assembly voltage to said terminals and said charging voltage at said terminals to said storage assembly for the purpose of reducing the capacitor voltage when desired, as taught by Kranz (par. 40).
The combination of Bottemiller and Franz does not explicitly disclose wherein when said storage voltage is less than a first threshold stepping down said charging voltage passed to said storage assembly.
However, Flett discloses a supercapacitor array wherein when said storage voltage is less than a first threshold stepping down said charging voltage passed to said storage assembly [pars. 31, 43 & 48-49; the capacitors output a voltage which is stepped up or down based on the DC bus voltage requirements].
It would have been obvious to one of ordinary skill before the effective filing date of the claimed invention to modify Bottemiller to further include wherein when said storage voltage is less than a first threshold stepping down said charging voltage passed to said storage assembly for the purpose of regulating the voltage on the DC bus, as taught by Flett (pars. 31, 43 & 48-49).
Regarding claim 18, Bottemiller discloses further comprising a selector circuit configured to receive as input at least one of said storage assembly voltage and said charging voltage [fig. 3, OR gate 60; column 9, lines 26-47], and provide an output of said selector circuit to said current limiting charging device [fig. 3, OR gate 60; column 9, lines 26-47], wherein said current limiting charging device is configured to direct said a limited charging voltage to said storage assembly when said storage voltage is below said first threshold [column 9, line 56-column 10, line 54; charging the capacitors until a certain voltage level].
Regarding claim 19, Bottemiller discloses wherein said electrical storage elements comprise at least one of a supercapacitor, an electrical double-layer capacitor, a hybrid capacitor, and a pseudo-capacitor [column 5, lines 18-20; super capacitors].
Regarding claim 20, Bottemiller does not explicitly disclose wherein said electrical storage elements are arranged in a plurality of strings in parallel.
However, Flett further discloses wherein said electrical storage elements are arranged in a plurality of strings in parallel [par. 27].
It would have been obvious to one of ordinary skill before the effective filing date of the claimed invention to modify Bottemiller to further include wherein said electrical storage elements are arranged in a plurality of strings in parallel for the purpose of providing more current, and since it has been held to be within the general skill of a worker in the art to apply a known technique to a known device (method, or product) which was ready for improvement in order to yield results predictable by one of ordinary skill the art. KSR International Co. v Teleflex Inc., 550 U.S. 398, 127 S. Ct. 1727, 82 USPQ2d 1385, 1395-97 (2007).
Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over Bottemiller et al. US Patent 9,508,399 in view of Kranz et al. US PGPUB 2019/0135355, further in view of Flett US PGPUB 2010/0133025, and further in view of Chol et al. US PGPUB 2018/0154779.
Regarding claim 17, the combination of Bottemiller, Franz and Flett does not explicitly disclose a passive balancing circuit configured to balance the electrical energy stored in said electrical storage elements within said storage assembly.
However, Chol discloses a passive balancing circuit configured to balance the electrical energy stored in said electrical storage elements within said storage assembly [pars. 11, 27, 70, 83, 98 & 108; processor 512 controls switches to force supercapacitor cells to drain power].
It would have been obvious to one of ordinary skill before the effective filing date of the claimed invention to modify the combination of Bottemiller, Franz and Flett to further include wherein a passive balancing circuit configured to balance the electrical energy stored in said electrical storage elements within said storage assembly for the purpose of preventing overcharge, as taught by Chol (par. 27).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Kristensen US PGPUB 2019/0103750 discloses a super-capacitor bank system which uses current limiting devices.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAVID V HENZE whose telephone number is (571)272-3317. The examiner can normally be reached M to F, 9am to 7pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Julian Huffman can be reached at 571-272-2147. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/DAVID V HENZE/Primary Examiner, Art Unit 2859
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