Prosecution Insights
Last updated: April 19, 2026
Application No. 18/572,285

METHOD FOR DETERMINING A TEMPERATURE OF A DEPLETION LAYER OF A SEMICONDUCTOR SWITCH, AND DEVICE

Non-Final OA §102§103§112
Filed
Dec 20, 2023
Examiner
HILTUNEN, THOMAS J
Art Unit
2849
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Robert Bosch GmbH
OA Round
1 (Non-Final)
81%
Grant Probability
Favorable
1-2
OA Rounds
2y 1m
To Grant
87%
With Interview

Examiner Intelligence

Grants 81% — above average
81%
Career Allow Rate
1003 granted / 1235 resolved
+13.2% vs TC avg
Moderate +6% lift
Without
With
+6.0%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
30 currently pending
Career history
1265
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
44.4%
+4.4% vs TC avg
§102
39.7%
-0.3% vs TC avg
§112
10.9%
-29.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1235 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Objections Claim 1, 4-6 and 9 are objected to because of the following informalities: With respect to claim 1, The recitations of “in that” on lines 8, 10 and 12 should be deleted to maintain consistency with the deletion of “characterized in that” on line 7. With respect to claim 4, the recitation of “in that” should be deleted to maintain consistency with the deletion of “characterized in that” on line 7 of claim 1. With respect to claim 5, the recitation of “in that” should be deleted to maintain consistency with the deletion of “characterized in that” on line 7 of claim 1. With respect to claim 6, the recitations of “in that” should be deleted to maintain consistency with the deletion of “characterized in that” on line 7 of claim 1. With respect to claim 9, the recitation of “in that” should be deleted to maintain consistency with the deletion of “characterized in that” on line 7 of claim 1. Appropriate correction is required. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-13 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. With respect to claim 1, it cannot be determined if the recitation of “the first voltage” on line 6 is the same, or different, than the recitation of “a first electrical voltage” one line 2. Furthermore, it cannot be determined if the recitation of “a first voltage” on line 11 is the same, or different, than the recitations of “a first electrical voltage” one line 2 and “a first voltage” on line 6. As far as can be understood the above recitations refer to the same voltage and will be treated as such for purposes of examination. It cannot be determined if the recitations of “whether a temperature-independent first trigger is present, in that it is monitored whether a temperature-dependent second trigger is present” on lines 9-10 of claim 1 are the same or different respective recitations of “a temperature-independent first trigger” and “a temperature-dependent second trigger” as recited on lines 7-9 of claim 1. As far as can be understood the above recitations refer to the same “temperature-independent first trigger” and “ temperature-dependent second trigger”, respectively, and will be treated as such for purposes of examination. It cannot be determined if the recitation of “the second trigger” on line 11 of claim 1 refers to the same or different as the recitations of “a temperature-dependent second trigger” on lines 8-9 and 10. As far as can be understood the above recitation refers to the same “ temperature-dependent second trigger” as recited on lines 8-9 and line 10 and will be treated as such for purposes of examination. It cannot be determined if the recitation of “the first trigger” on line 13 of claim 1 refers to the same or different as the recitations of “a temperature-independent first trigger” on lines 7-8 and 9. As far as can be understood the above recitation refers to the same “ temperature-independent first trigger” as recited on lines 7-8 and line 9 and will be treated as such for purposes of examination. It cannot be determined if the recitation of “the second trigger” on line 14 of claim 1 refers to the same or different as the recitations of “a temperature-dependent second trigger” on lines 8-9 and 10. As far as can be understood the above recitation refers to the same “ temperature-dependent second trigger” as recited on lines 8-9 and line 10 and will be treated as such for purposes of examination. Claims 2-13 are rejected for the same reasons as claim 1. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1-3, 5, 9 and 11-13 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Akin et al. (USPN 11,525,740). With respect to claim 1, Akin et al. discloses, in Figs. 3-4 and 10, a method (method for operating Figs. 3 and 4 further details disclosed in Fig. 10, for determining a temperature of a depletion layer of a semiconductor switch (the circuits of Fig. 3 and 4 operate to measure the temperature of the switch/DUT of Figs. 3 and 4), wherein a first electrical voltage between a source terminal of the semiconductor switch and a Kelvin source terminal of the semiconductor switch (Voltage across Lcs of Fig. 3 which is an electrical voltage between the source, i.e., voltage at the source, and Kelvin source, i.e., voltage at terminal of Lcs connected to COND. CIRCUIT 2 of Fig. 3, see Col. 5 lines 46-48) being monitored (monitored by the COND. CIRCUIT 2) at least during a switch-on process of the semiconductor switch (during the turn-on delay, see Col. 5 lines 31-33, see also Fig. 10), and the temperature of the depletion layer being determined as a function of the first voltage (the measured temperature based on a function of the voltage across Lcs, see Col. 5 lines 23-26 and line 52 to Col. 6 line 11), in that it is monitored whether a temperature-independent first trigger is present (first trigger of the start of turn-on of the switch/DUT of Fig. 3 as determined by the measuring of Vgs by COND. CIRCUIT 1 of Fig. 3, see Col. 5 lines 34-42, Vgs and beginning of turn-on is temperature independent, see Fig. 10), in that it is monitored whether a temperature-dependent second trigger is present (second trigger being end of the turn-on delay as determined by the measuring of the voltage across Lcs, see Col. 5 lines 52-63 and Fig. 10. The end of the turn-on period is temperature dependent, see Fig. 10, i.e., lower temperatures delay the end of the turn-on period), whether a temperature-independent first trigger is present, in that it is monitored whether a temperature-dependent second trigger is present (both triggers are present during a full turn-on operation, see Fig. 10), it being established that the second trigger is present when a first voltage (i.e., voltage across Lcs) exceeding a predefined first threshold value (Viref input to comparator 360) is detected (detected by 360), in that a first time interval (period that Vtd,on is pulsed high, see Fig. 10, i.e., the turn-on delay) is determined which begins with detection of the first trigger and ends with detection of the second trigger (the turn-on delay time period determination begins when the triggering of the end of turn-on by COND. CIRCUIT 2 which indicates the end of the turn-on delay, which is the end of the start of the turn-on as indicated by the triggering of COND. CIRCUIT 1), and in that the temperature of the depletion layer is determined as a function of the first time interval (the temperature is determined according to the turn-on delay time interval as determined by the first and second triggers, see Col. 5 lines 23-26 and line 52 to Col. 6 line 11). With respect to claim 2, the method according to claim 1 wherein a gate driver circuit (GATE DRIVER of Fig. 3) assigned to the semiconductor switch (switch/DUT of Fig. 3) provides the first trigger (the gate driver provides Vgs and thus the first trigger). With respect to claim 3, the method according to according to claim 1, wherein it is established as a function of the first voltage that the first trigger is present (the voltage across Lcs is a function of the first trigger, since the voltage across Lcs is dependent upon id and id is dependent upon Vgs/the first trigger, see Fig. 10) With respect to claim 5, the method according to claim 1, wherein, a second electrical voltage (Vgs) is monitored between the gate terminal (gate of the switch) of the semiconductor switch and the source terminal (source of the switch, i.e., Vgs gate-to-source voltage) of the semiconductor switch (switch/DUT), and in that the temperature of the depletion layer is determined as a function of the second voltage detected at the end of the first time interval (the determined temperature is based on a time function, i.e., the amount of time/delay time, it takes Vgs to turn on the switch). With respect to claim 9, the method according to claim 1, wherein, an electrical load current flowing through the semiconductor switch (id) is monitored (by the COND. CIRCUIT 2 and comparator), and in that the temperature of the depletion layer is determined as a function of the load current (id controls when the end of the on-delay is determined and thus the temperature is determined as a time function of id). With respect to claim 11, a device (Fig. 4 details of Fig. 4 disclose din Fig. 3) for determining a temperature of a depletion layer of a semiconductor switch (the circuit determines the temperature of the switch/DUT of Figs. 3 and 4), wherein the device (40) comprises an evaluation unit (at least one of 310 and 315 of Fig. 3 and C2000 MICROCONTROLLER of Fig. 4) and a sensor unit (COND. CIRCUIT 2 and 360 of Fig. 3) for monitoring a first electrical voltage (Voltage across Lcs) between a source terminal (Source of the transistor/switch/DUT of Figs. 3 and 4) of the semiconductor switch and a Kelvin source terminal of the semiconductor switch (Kelvin terminal of the transistor/switch/DUT, see Col. 5 lines 46-48), wherein the device (Fig. 4 details disclosed in Fig. 3) is specifically configured to carry out the method according to claim 1 (the circuits of Figs. 3 and 4 carry out the method of claim 1). With respect to claim 12, the device according to claim 11, wherein the evaluation unit is designed as a microcontroller (C2000 is a microcontroller). With respect to claim 13, the device according to claim 11, wherein the evaluation unit comprises at least one flip-flop circuit (310 of Fig. 3). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Akin et al. (USPN 11,525,740) in view non-patent literature document from the transcript of the video series for C2000TM configurable logic block (CLB) by Texas Instruments from the website of https://www.ti.com/video/series/C2000-configurable-logic-block.html#transcript-tab accessed 12/18/2025 (NPL1 hereinafter). See attached portion of the transcript of the attached NPL document. With respect to claim 10, Akin et al. discloses an evaluation circuit (C2000 microcontroller of Fig. 4) to determine the temperature of the depletion layer according to the detected on-delay of the switch of Figs. 3 and 4. Akin et al. fails to disclose the details of the C2000 microcontroller. Thus Akin et al. fails to explicitly disclose, “the temperature of the depletion layer is calculated, in particular as a function of at least one coefficient stored in a lookup table”. However, it is old and well-known to input measured data (e.g., measured on-time delays) into a lookup table of a microcontroller and output a determined/measured output (e.g. measured temperature) according to values/coefficients stored in the lookup table compared/indexed to the measured data. Examiner takes official notice of the use of lookup tables to determined a measured amount/output, such as temperature, according to coefficients stored in a lookup table compared/indexed to input data, such as on-time delay data. Lookup tables are simply designed components that allow one to easily determine a desired/determined output based value on measured/input data/value. Furthermore, C2000TM microcontrollers include lookup tables as evidenced in NPL1, see fourth paragraph of the transcript of NPL after “[MUSIC PLAYING]. It would have been obvious to use program the lookup tables of the C2000TM microcontroller of Fig. 4 of Akin such that the lookup tables produce a measured temperature of the depletion layer calculated as a function of the detected on-time delay and coefficients that index/compare the on-time delay and provide an associated temperature value according to the on-time delay within the lookup tables of the C2000TM microcontroller for the purpose of having a simply designed temperature measuring component that allow one to easily determine the temperature value based on the measured on-time delay as shown in Fig. 10 of Akin et al. Allowable Subject Matter Allowable subject matter could not be determined due to at least the above the indicated issues associated with the rejection under 35 U.S.C. section 112. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Thomas J. Hiltunen whose telephone number is (571)272-5525. The examiner can normally be reached 9:00AM-5:30PM EST M-F. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Menatoallah Youssef can be reached at 571-270-3684. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /THOMAS J. HILTUNEN/Primary Examiner, Art Unit 2849
Read full office action

Prosecution Timeline

Dec 20, 2023
Application Filed
Dec 18, 2025
Non-Final Rejection — §102, §103, §112
Apr 16, 2026
Applicant Interview (Telephonic)
Apr 16, 2026
Examiner Interview Summary

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12592639
SELF-BIASING THE INPUT CONTROLLER IN A POWER CONVERTER
2y 5m to grant Granted Mar 31, 2026
Patent 12592640
CIRCUIT AND METHOD FOR REDUCING DRIVING LOSSES IN GAN SWITCHES
2y 5m to grant Granted Mar 31, 2026
Patent 12592849
TERMINATION CIRCUIT OF RECEIVER
2y 5m to grant Granted Mar 31, 2026
Patent 12587095
CHARGE PUMP DEVICE
2y 5m to grant Granted Mar 24, 2026
Patent 12587017
METHODS AND APPARATUS FOR CONTROLLING AN INVERTER
2y 5m to grant Granted Mar 24, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

AI Strategy Recommendation

Get an AI-powered prosecution strategy using examiner precedents, rejection analysis, and claim mapping.
Powered by AI — typically takes 5-10 seconds

Prosecution Projections

1-2
Expected OA Rounds
81%
Grant Probability
87%
With Interview (+6.0%)
2y 1m
Median Time to Grant
Low
PTA Risk
Based on 1235 resolved cases by this examiner. Grant probability derived from career allow rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month