CTNF 18/573,781 CTNF 101476 Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia 1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. 2. This application has claimed domestic priority and the effective date is 7/12/2021. Drawings 06-22-06 3. Figure 2 is objected to as failing to comply with 37 CFR 1.84(p)(5) because they do not include the following reference sign(s) mentioned in the description: Bluetooth protocol stack 202, VHCI 204, Hwbinder 214, HIDL 216, first interface function 206, second interface function 208, third interface function 210, and fourth interface function 212. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 103 07-20-aia AIA 4. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA 5. Claim s 1-3 are rejected under 35 U.S.C. 103 as being unpatentable over Ardolino Pat. No. US 5,265,239 A in view of Padmanabhan et al. Pub. No. US 2004/0107300 A1 (hereafter Padmanabhan) . 6. Ardolino was disclosed in the IDS filed on 12/22/2023. 7. Regarding claim 1, Ardolino teaches “A method of protocol stack data transmission comprising: a kernel monitoring a protocol stack ([Col 3, line 62 – Col 4, line 61] teaches the a kernel supporting multiple protocol stacks; the kernel monitoring for any access requests made by the protocol stack) ; the kernel sending a first notification … in response to the kernel detecting that the protocol stack sends first data to a driver chip controller, … ([Col. 4, line 39 – Col. 5, line 41] teaches that upon receipt by a protocol stack of an access request, a virtual-circuit is created representing a communication path between the protocol stack/device driver pair and the necessary service program. A network command block (NCB) is generated, which points to data control block (DCB), the DCB including control information to associate the service program with the protocol stack/driver pair such that it may represent a notification for facilitating the data transfer between the protocol stack and underlying hardware as it points to a virtual control block (VCB), the VCB referencing the relevant hardware) wherein the first notification is used to call interface functions for … forward(ing) the first data to the driver chip controller ([Col. 5, line 42 – Col. 11, line 18] teaches of the different data blocks that may contain function calls associating the service program to the protocol stack/device driver pair, orchestrating the data blocks to facilitate the transmission. It then teaches of hashing to determine the connection of identifiers for existing connection to hardware, and then common service interfaces may be included for implementing socket function calls) .” Ardolino does not explicitly teach of a structure for an intermediate service module carrying out the orchestration of the data blocks. Padmanabhan teaches of a virtual host controller interface (vHCI) driver such that it teaches the limitation “ the intermediate service module being between the protocol stack and the driver chip controller, … instructing the intermediate service module to receive the first data and forward the first data to the driver chip controller ([0040-0052] teaches a virtual host controller interface (vHCI) driver and a vHCI layer, the driver residing in the vHCI layer responsible for routing data as described in [0112], and is also located between the common architecture layer and the underlying hardware of pHCIs and client devices). ” It would have been obvious to a person of ordinary skill in the art before the effective filing date to combine the teachings of Padmanabhan with the invention of Ardolino to implement a vHCI layer containing a vHCI driver between the protocol stack and the device drivers. A person having ordinary skill in the art would have been motivated to make this combination to provide centralized routing and abstraction of multiple hardware paths, improving the flexibility and scalability of the system. Together, Padmanabhan in combination with Ardolino teach every limitation of the claimed invention. Since the teachings were analogous art known at the filing time of the invention, one of ordinary skill could have applied said teachings to achieve expected results. 8. Regarding claim 2, wherein the combination, Padmanabhan teaches “The method of claim 1, wherein the first data is data sent by the protocol stack to a virtual host controller interface VHCI node ([0049] teaches a vHCI layer that receives I/O packets from the common architecture layer) , the kernel sending a first notification to an intermediate service module in response to the kernel detecting that the protocol stack sends first data to a driver chip controller comprises: the kernel sending the first notification to the intermediate service module in response to the kernel detecting that the VHCI node receives the first data ([0049-0052] teaches the vHCI layer able to send and receive I/O packets between the common architecture layer and the physical host controller interface (pHCI), such that the vHCI driver is inherently notified) .” 9. Regarding claim 3, the combination teaches “ The method of claim 1, wherein the intermediate service module receiving the first data and forwarding the first data to the driver chip controller comprises: the intermediate service module calling a first interface function corresponding to the protocol stack to receive the first data; and the intermediate service module calling a second interface function corresponding to the driver chip controller to send the first data to the driver chip controller (Ardolino [Col. 4, line 62 – Col. 6, line 9] teaches a virtual circuit representing a communication path between the protocol stack and the device driver such that it contains the information for facilitating the data transfer between the protocol stack to the device driver (DCB), and that vHCI driver taught in Padmanabhan [0065-0112] may have services allowing the processing of the (DCB) to invoke read operations (e.g. *nd_rdq, nd_dataq;) and then invokes the lower level interface layer to pass data to a driver as described in Ardolino [Col. 10, line 35 – Col. 11, line 2]. Also see Fig. 1, teaching two service interfaces 17 and 19 such that a first and second interface function respective to their layer must be called in order to forward the data through the interfaces) . ” 07-21-aia AIA 10. Claim s 5-11, and 13-19 are rejected under 35 U.S.C. 103 as being unpatentable over Ardolino and Padmanabhan as applied to claim 1 above, and in further view of MASPUTRA et al. Pub. No. US 2019/0306109 A1 (hereafter MASPUTRA) . 11. Regarding claim 5, the combination teaches “ The method of claim 1, further comprising: the kernel sending a second notification to the intermediate service module in response to the kernel detecting that the driver chip controller sends second data to the protocol stack; wherein the second notification is used to instruct the intermediate service module to receive the second data and forward the second data to the protocol stack. (Ardolino [Col. 4, lines 39 – 64] teaches of data transfer to and from the protocol stack associated with the protocol stack/driver device pair such that the kernel may also monitor for outgoing data from the device driver to the protocol stack such that the kernel may notify the vHCI taught by Padmanabhan for forwarding the data to the protocol stack since the virtual circuit of Ardolino represents a communication path between the protocol stack and the device driver. Also, in Padmanabhan [0061], it teaches of drivers interrupt handler or command competition callback function being invoked such that the vHCI driver is notified to execute the callback function, possibly forwarding data back the protocol stack).” The combination may teach of bidirectional data transmission, however does not explicitly show the data being transmitted from the drivers to the protocol stack. MASPUTRA teaches data routing (loops) from and to the user space and the kernel space such that it teaches the limitation of “… the driver chip controller sends second data to the protocol stack ([0067-0069] teaches a device driver notifying a processor to then service it to move data to the data link interface layer, next the processor services data link interface layer, the processor determining which socket the packets should be routed to and delivers it up to the application level). ” It would have been obvious to a person of ordinary skill in the art before the effective filing date to combine the teachings of MASPUTRA with the invention of Ardolino and Padmanabhan facilitate data transmission from device drivers to the protocol stack. A person having ordinary skill in the art would have been motivated to make this combination to show the process of bidirectional data transmission, from underlying hardware to user space. Together, MASPUTRA in combination with Ardolino and Padmanabhan teach every limitation of the claimed invention. Since the teachings were analogous art known at the filing time of the invention, one of ordinary skill could have applied said teachings to achieve expected results. 12. Regarding claim 6 the combination teaches “The method of claim 5, wherein the second data is data sent by the chip controller to the hwbinder node, the kernel sending a second notification to the intermediate service module in response to the kernel detecting that the driver chip controller sends second data to the protocol stack comprises: the kernel sending the second notification to the intermediate service module in response to the kernel detecting that the hwbinder node receives the second data (Padmanabhan [0061] teaches a callback function invoked for the I/O request such that completion data is sent from the pHCI to the vHCI layer, such that it may have been communicated through a message passing interface as taught in Ardolino, and may trigger subsequent processing by the vHCI driver by one its many services Padmanabhan [0065-0112]) .” 13. Regarding claim 7, the combination teaches “The method of claim 5, wherein the intermediate service module receiving the second data and forwarding the second data to the protocol stack comprises: the intermediate service module calling a third interface function corresponding to the driver chip controller to receive the second data; and the intermediate service module calling a fourth interface function corresponding to the protocol stack to send the second data to the protocol stack (Ardolino [Fig. 1] teach of two service interfaces such that a third and fourth function must be called in order to forward data from the device drivers to the vHCI driver/layer as taught by Padmanabhan, and from the vHCI layer to the protocol stack. The vHCI layer receives the second data from the driver via the callback function [Padmanabhan 0061], corresponding to a third interface function. The vHCI layer may then forward the data to the upper layer via vHCI driver transport interfaces [Padmanabhan 0065-0112] corresponding to a fourth interface function. MASPUTRA teaches the data transmitted to upper layers such that it may apply to the vHCI layer) .” 14. Regarding claim 8, the combination teaches “The method of claim 5, wherein the intermediate service module calling a fourth interface function corresponding to the protocol stack to send the second data to the protocol stack comprises: the intermediate service module calling the fourth interface function to send the second data to the VHCI node, causing the VHCI node to send the second data to the protocol stack (Padmanabhan [0087-0112] teaches vHCI drivers with transport services for routing data such that it may call a function to route data to the vHCI layer, then upwards to the common architecture layer [Padmanabhan 0049]) .” 15. Regarding claims 9 and 10, they are similar to claim 1 and are rejected for similar reasons. Ardolino does not explicitly teach of a computer device with a memory and processor configured to carry out the method. MASPUTRA teaches a data processing system that can be carried out on a computer device with a processor and/or a non-transitory computer-readable storage. 16. Claim 9 is directed towards “A computer device, comprising a memory and a processor, the memory storing a computer program, the processor configured to, when executing the computer program, implement acts ([0164]) . Claim 10 is directed towards “A non-transitory computer-readable storage medium, comprising at least one program instruction, the at least one program instruction configured to perform acts ([0164]). ” It would have been obvious to a person of ordinary skill in the art before the effective filing date to combine the teachings of MASPUTRA with the combination of Ardolino and Padmanabhan to implement the data transmission method on a computer device and/or a non-transitory computer-readable storage. A person having ordinary skill in the art would have been motivated to make this combination for commercial/applicable uses in the field of endeavor. Together, MASPUTRA in combination with Ardolino and Padmanabhan teach every limitation of the claimed invention. Since the teachings were analogous art known at the filing time of the invention, one of ordinary skill could have applied said teachings to achieve expected results. 17. Regarding claims 17 and 18, they are similar to claim 2 and are rejected for the same reasons. 18. Regarding claims 11 and 19, they are similar to claim 3 and are rejected for the same reasons. 19. Regarding claim 13, it is similar to claim 5 and is rejected for the same reasons. 20. Regarding claim 14, it is similar to claim 6 and is rejected for the same reasons. 21. Regarding claim 15, it is similar to claim 7 and is rejected for the same reasons. 22. Regarding claim 16, it is similar to claim 8 and is rejected for the same reasons . 07-21-aia AIA 23. Claim s 4, 12, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Ardolino, Padmanabhan, and MASPUTRA as applied in claims 1, 9, and 10 above, and in further view of Yim et al. Pub. No. US 2018/0052723 A1 (hereafter Yim) . 24. Regarding claim 4, the combination teaches “ The method of claim 3, wherein the intermediate service module calling a second interface function corresponding to the driver chip controller to send the first data to the driver chip controller comprises: the intermediate service module calling the second interface function to send the first data to a hwbinder node, causing the hwbinder node to send the first data to the driver chip controller through an … interface (Ardolino [Col. 10, line 35 – Col. 11, line 19] teaches of UNIX System V STREAMS message processing such that it may be a structured message-passing interface between the layers, and the STREAMS interface may be used in combination with the processing of the data blocks (DCB) and (VCB) to facilitate data transmission . ” The combination does not explicitly teach of the interface being an interface definition language HIDL interface. Yim teaches a HIDL interface such that it teaches the limitation “ causing the hwbinder node to send the first data to the driver chip controller through an interface definition language HIDL interface ([0026, 0056-0059] teaches the HIDL generating middleware interface for providing access to hardware and I/O devices) .” It would have been obvious to a person of ordinary skill in the art before the effective filing date to combine the teachings of Yim with the invention of Ardolino, Padmanabhan, and MASPUTRA to substitute an interface definition language HIDL interface in for a service interface. A person having ordinary skill in the art would have been motivated to make this substitution as it would achieve predictable results, more so if the implementation was directed towards the Linux/Android framework. Together, Yim in combination with Ardolino, Padmanabhan, and MASPUTRA teach every limitation of the claimed invention. Since the teachings were analogous art known at the filing time of the invention, one of ordinary skill could have applied said teachings to achieve expected results. 25. Regarding claims 12 and 20, they are similar to claim 4 and are rejected for the same reasons. Conclusion 26. Any inquiry concerning this communication or earlier communications from the examiner should be directed to BRANDON A NGUYEN whose telephone number is (571)272-6074. The examiner can normally be reached Mon-Fri (10am-6pm). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Aimee Li can be reached at (571) 272-4169. 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If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /BRANDON NGUYEN/Examiner, Art Unit 2195 /Aimee Li/Supervisory Patent Examiner, Art Unit 2195 Application/Control Number: 18/573,781 Page 2 Art Unit: 2195 Application/Control Number: 18/573,781 Page 3 Art Unit: 2195 Application/Control Number: 18/573,781 Page 4 Art Unit: 2195 Application/Control Number: 18/573,781 Page 5 Art Unit: 2195 Application/Control Number: 18/573,781 Page 6 Art Unit: 2195 Application/Control Number: 18/573,781 Page 7 Art Unit: 2195 Application/Control Number: 18/573,781 Page 8 Art Unit: 2195 Application/Control Number: 18/573,781 Page 9 Art Unit: 2195 Application/Control Number: 18/573,781 Page 10 Art Unit: 2195 Application/Control Number: 18/573,781 Page 11 Art Unit: 2195 Application/Control Number: 18/573,781 Page 12 Art Unit: 2195
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