Prosecution Insights
Last updated: July 17, 2026
Application No. 18/573,929

UPDATING NON-VOLATILE MEMORY IN A COMPUTER CONTROLLED DEVICE

Non-Final OA §102§103
Filed
Dec 22, 2023
Priority
Jun 23, 2021 — nonprovisional of PCTIL2021050765
Examiner
KABIR, MOHAMMAD H
Art Unit
2192
Tech Center
2100 — Computer Architecture & Software
Assignee
Red Bend Ltd.
OA Round
1 (Non-Final)
67%
Grant Probability
Favorable
1-2
OA Rounds
10m
Est. Remaining
81%
With Interview

Examiner Intelligence

Grants 67% — above average
67%
Career Allowance Rate
287 granted / 427 resolved
+12.2% vs TC avg
Moderate +14% lift
Without
With
+14.2%
Interview Lift
resolved cases with interview
Typical timeline
3y 5m
Avg Prosecution
13 currently pending
Career history
445
Total Applications
across all art units

Statute-Specific Performance

§101
2.9%
-37.1% vs TC avg
§103
91.9%
+51.9% vs TC avg
§102
3.4%
-36.6% vs TC avg
§112
1.5%
-38.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 427 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Status of Claims Claims 1-20 are presented for examination in this application. The application filing date on 12/22/2023. Claims 1, 19 and 20 are independent. Examiner notes (A). Drawings submitted on 12/22/2023 comply with the provisions of 37 CFR 1.121(d). (B). IDS submitted on 12/22/2023, 02/21/2024 and 04/16/2025 have been fully considered by the Examiner. (C) Limitations have been provided with the Bold fonts in order to distinguish from the cited part of the reference (Italic). (D). Examiner has cited particular columns, line numbers, references, or figures in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses to fully consider the reference in entirety, as potentially teaching all or part of the claimed invention. See MPEP § 2141.02 VI and 2123. The examiner requests, in response to this Office action, support be shown for language added to any original claims on amendment and any new claims. That is, indicate support for newly added claim language by specifically pointing to page(s) and line number(s) in the specification and/or drawing figure(s). This will assist the examiner in prosecuting the application. When responding to this office action, Applicant is advised to clearly point out the patentable novelty which he or she thinks the claims present, in view of the state of the art disclosed by the references cited or the objections made. He or she must also show how the amendments avoid such references or objections See 37 CFR 1.111 (c). Priority Acknowledgment is made of applicant's claim for International application PCT/IL2021/050765 filed on 06/23/2021. Claim Objections Claims 9 and 15 are objected to because of the following informalities: Claim 9, line 2, replace “,” with --and--. Claim 15, before “at least” in line 3, insert --the-- and lines 5-6, replace “the other part of the modified non-volatile memory area” with --other part of modified non-volatile memory area--. Appropriate correction is required. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-2, 6, 10-13, 15-17 and 19 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Ogle et al. (US 7210010 B2, hereinafter Ogle). As to claim 1, Ogle discloses a configurable computerized device comprising: at least one hardware processor configured for executing a code for updating modified non-volatile memory content by (col. 7, ll. 30-32, The update instructions 302 are encoded to direct, among other things, how the update decoder 154 will append: (1) various elements of code supplied with the update package. Further, col. 15, ll. 3-8, the encoding can be applied without any knowledge of the microprocessor concerned or the internal structure of the image with respect to code and data areas. In turn this means that both the encoder and decoder for the update package can be relatively simple and thus in the case of the decoder, can be implemented for devices with relatively slow processors): accessing data change information indicative of at least one unmanaged modification applied to identified non-volatile memory content and computed when receiving at least one unmanaged modification instruction (col. 5, ll. 7-14, update encoder 116. Update generator 112 maintains, or receives from an external source, an original data image 120 corresponding to the subject client device 150 and is also supplied with or obtains [i.e. accessing] a copy of the new data image 122 for the subject client device. The BDE 118 receives a copy of the original data image 120 [i.e. unmanaged modification] and a copy of the new data image to be applied 122), where applying the at least one unmanaged modification to the identified non-volatile memory content produces the modified non-volatile memory content (col. 7, ll. 37-58, FIG. 3, flash memory device is divided into a plurality of memory blocks 310, 312 and 314, which represent the current block being updated at any one time (block 312) and the blocks updated immediately previously to the current block (310) and immediately after the current block (314). A notable feature of the block structure of flash memory devices is that for each block 312 … COPY operations 326 and 328 and in there respective destination, such as representative ADD operations 322 and 324. The existence of block boundaries necessarily increases the number of operations in an update [i.e. modification] instruction set, as they cause a bifurcation of instructions that would not occur in a conventional continuous update application. Further, col. 8, ll. 28-33, When the block is completely built (which must correspond to the end of an operation) the actual destination memory block X for such block image (indicated at 340) is erased and reprogrammed with the content of the new version of that block present in the scratch memory area.) used by the at least one hardware processor while executing a plurality of firmware computer instructions (col. 4, ll. 58-64, applies the update instruction set of update package 124 in order to convert original data image 120 into a new data image 122. Though shown schematically as two separate elements, download agent 152 and update decoder 154 may be parts of the same application or software, be embedded firmware or specialized hardware such as an application specific integrated circuit); and updating the modified non-volatile memory content, comprising (col. 11, ll. 57-61, COPY operations can be expressed as a length of data to be copied plus an offset into the current update location used to express the source location for the copy. The source location is thus calculated as an index into the new image 122 [i.e. update the modified content): computing reconstructed memory content using the modified non-volatile memory content produced by applying the at least one unmanaged modification to the identified non-volatile memory content (col. 21, ll. 31-45, the process for applying the update package 124 commences at a start state 902 where a client device 150 having a first original image 120 programmed across k blocks of a block structured non-volatile memory device 210 is to have such original image reprogrammed with a new image 122. As will be explained further below, start state 902 may be at a point when an update package 124 is first received and to be installed, or alternatively, when an update package to be applied has been previously received and installation is to re-commence after being interrupted [i.e. reconstructed] at some point prior to complete installation of the update package. Thus, in either scenario, it is assumed that an update package has already been received and saved to some a location, such as in a data memory block in space 230 of non-volatile memory device 210. Note: per spec page 2, ll. 10-16, reconstructed memory content using the modified non-volatile memory content and using the reconstructed memory content and at least one memory update instruction associated) and the data change information such that the reconstructed memory content is identical to the identified non-volatile memory content (col. 21, ll. 31-45, the process for applying the update package 124 commences at a start state 902 where a client device 150 having a first original image 120 [i.e. identified unmanage content] programmed across k blocks of a block structured non-volatile memory device 210 is to have such original image reprogrammed with a new image 122 [i.e. reconstructed]. As will be explained further below, start state 902 may be at a point when an update package 124 is first received and to be installed, or alternatively, when an update package to be applied has been previously received and installation is to re-commence after being interrupted at some point prior to complete installation of the update package. Thus, in either scenario, it is assumed that an update package has already been received and saved to some a location, such as in a data memory block in space 230 of non-volatile memory device 210. Note: when updated the original image i.e. identical with identified unmanage memory content); and computing new non-volatile memory content using the reconstructed memory content (col. 21, ll. 31-45, the process for applying the update package 124 commences at a start state 902 where a client device 150 having a first original image 120 programmed across k blocks of a block structured non-volatile memory device 210 is to have such original image reprogrammed with a new image 122. As will be explained further below, start state 902 may be at a point when an update package 124 is first received and to be installed, or alternatively, when an update package to be applied has been previously received and installation is to re-commence after being interrupted [i.e. reconstructed] at some point prior to complete installation of the update package. Thus, in either scenario, it is assumed that an update package has already been received and saved to some a location, such as in a data memory block in space 230 of non-volatile memory device 210. Note: per spec page 2, ll. 10-16, reconstructed memory content using the modified non-volatile memory content and using the reconstructed memory content and at least one memory update instruction associated) and at least one memory update instruction associated with the identified non-volatile memory content (abstract, an update package is generated which includes an encoded instruction set comprising COPY and ADD operations instructing the copying of source data [i.e. memory content] from locations in the memory device and adding other data provided in the update package. Further, col. 9, ll. 44-48, This process of updating continues until at query state 428 it is determined that the new image to be updated across the block-structured non-volatile memory has been applied to all k blocks to be updated, at which point the update process returns to state 414). As to claim 2, Ogle discloses the device of claim wherein the at least one hardware processor is further configured for storing the new non-volatile memory content to at least one non-volatile memory component connected to the at least one hardware processor (col. 9, ll. 12-15, Once the update package 124 [i.e. new content] is received, saved and confirmed complete, the update agent 156, which is comprised of the update decoder 154, is initiated at 410. According to one embodiment, the client device next at 412 steps through a power cycle to deliver control of the microprocessor. Further, col. 22, ll. 11-20, the update package is first stored on the device and act as switchable status identifiers during the process of updating. By definition these status bits will themselves be present in flash memory (but in a block not in the k blocks to be updated) by virtue of storing the update package after its initial receipt by the client device. Flash memory cells cannot be rewritten with new data without first erasing them, however with the exception that any flash memory cell storing a "1" can be programmed to "0"). As to claim 6, Ogle discloses the device wherein updating the modified non-volatile memory content is in response to receiving the at least one memory update instruction (col. 11, ll. 57-61, COPY operations can be expressed as a length of data to be copied plus an offset into the current update location used to express the source location for the copy. The source location is thus calculated as an index into the new image 122 [i.e. update the modified content). As to claim 10, Ogle discloses the device wherein the at least one hardware processor is further configured for storing the data change information to at least one non-volatile memory component connected to the at least one hardware processor (col. 9, ll. 11-16, Once the update package 124 is received, saved and confirmed complete, the update agent 156, which is comprised of the update decoder 154, is initiated at 410. According to one embodiment, the client device next at 412 steps through a power cycle to deliver control of the microprocessor. Further, col. 22, ll. 11-19, All status bits begin in a first or set state when the update package [i.e. change] is first stored on the device and act as switchable status identifiers during the process of updating. By definition these status bits will themselves be present in flash memory (but in a block not in the k blocks to be updated) by virtue of storing the update package after its initial receipt by the client device. Flash memory cells cannot be rewritten with new data without first erasing them). As to claim 11, Ogle discloses the device wherein the data change information comprises the identified non-volatile memory content (col. 22, ll. 11-25, the update package is first stored on the device and act as switchable status identifiers during the process of updating. By definition these status bits will themselves be present in flash memory (but in a block not in the k blocks to be updated) by virtue of storing the update package after its initial receipt by the client device. Flash memory cells cannot be rewritten with new data without first erasing them, however with the exception that any flash memory cell storing a "1" can be programmed to "0". Accordingly, in the present case each of the block status bits are set to 1 in the upgrade package as initially delivered and stored on the device constituting a first or initial set state for each status bit. Thus, these bits will be updated or switched to a second state when cleared to "0" in-situ during application of the upgrade package). As to claim 12, Ogle discloses the device wherein the data change information comprises a plurality of modification entries, each modification entry comprising one or more of: (1) at least part of the identified non-volatile memory content and identification information indicative of at least part of the modified non-volatile memory content, associated with the at least part of the identified non-volatile memory content (col. 7, ll. 37-58, FIG. 3, flash memory device is divided into a plurality of memory blocks 310, 312 and 314, which represent the current block being updated at any one time (block 312) and the blocks updated immediately previously to the current block (310) and immediately after the current block (314). A notable feature of the block structure of flash memory devices is that for each block 312 … COPY operations 326 and 328 and in there respective destination, such as representative ADD operations 322 and 324. The existence of block boundaries necessarily increases the number of operations in an update [i.e. modification] instruction set, as they cause a bifurcation of instructions that would not occur in a conventional continuous update application. Further, col. 8, ll. 28-33, When the block is completely built (which must correspond to the end of an operation) the actual destination memory block X for such block image (indicated at 340) is erased and reprogrammed with the content of the new version of that block present in the scratch memory area); and As to claim 13, Ogle discloses the device wherein the at least one hardware processor is further configured for storing the data change information to at least one non-volatile memory component connected to the at least one hardware processor (col. 9, ll. 11-16, Once the update package 124 is received, saved and confirmed complete, the update agent 156, which is comprised of the update decoder 154, is initiated at 410. According to one embodiment, the client device next at 412 steps through a power cycle to deliver control of the microprocessor. Further, col. 22, ll. 11-19, All status bits begin in a first or set state when the update package [i.e. change] is first stored on the device and act as switchable status identifiers during the process of updating. By definition these status bits will themselves be present in flash memory (but in a block not in the k blocks to be updated) by virtue of storing the update package after its initial receipt by the client device. Flash memory cells cannot be rewritten with new data without first erasing them); and wherein storing the data change information comprises compressing at least one of the plurality of modification entries (col. 9, ll. 11-16, further col. 15, ll. 39-43, The basic changes to the update package encoding [i.e. entries] using SETBLOCK operations become: 1. An ADD or COPY operation whose destination region crosses the end of the current block being updated is truncated at the end of the block). As to claim 15, Ogle discloses the device wherein computing the reconstructed memory content comprises for at least one of the plurality of modification entries at least one of: replacing at least part of the modified non-volatile memory content with the at least part of the identified non-volatile memory content associated therewith (col. 16, ll. 16-25, the SETBLOCK instruction in all encodings is that if any block of the image is updated by a single COPY operation from the same location in the original image then both the COPY and associated SETBLOCK instructions can be removed [i.e. replaced] from the BDE output entirely. This ensures that flash-blocks that are not modified at all will not be pointlessly erased and reprogrammed by the update package. For localized changes this optimisation has a dramatic effect on the time required to apply the update package); As to claim 16, Ogle discloses the device wherein the at least one hardware processor is further configured for: receiving at least one modification instruction to apply the at least one modification to the identified non-volatile memory content (col. 21, ll. 31-45, the process for applying the update package 124 commences at a start state 902 where a client device 150 having a first original image 120 programmed across k blocks of a block structured non-volatile memory device 210 is to have such original image reprogrammed with a new image 122. As will be explained further below, start state 902 may be at a point when an update package 124 is first received and to be installed, or alternatively, when an update package to be applied has been previously received and installation is to re-commence after being interrupted [i.e. reconstructed] at some point prior to complete installation of the update package. Thus, in either scenario, it is assumed that an update package has already been received and saved to some a location, such as in a data memory block in space 230 of non-volatile memory device 210. Note: per spec page 2, ll. 10-16, reconstructed memory content using the modified non-volatile memory content and using the reconstructed memory content and at least one memory update instruction associated); computing the data change information (col. 9, ll. 11-16, Once the update package 124 is received, saved and confirmed complete, the update agent 156, which is comprised of the update decoder 154, is initiated at 410. According to one embodiment, the client device next at 412 steps through a power cycle to deliver control of the microprocessor. Further, col. 22, ll. 11-19, All status bits begin in a first or set state when the update package [i.e. change] is first stored on the device and act as switchable status identifiers during the process of updating. By definition these status bits will themselves be present in flash memory (but in a block not in the k blocks to be updated) by virtue of storing the update package after its initial receipt by the client device. Flash memory cells cannot be rewritten with new data without first erasing them); and applying the at least one modification to the identified non-volatile memory content (abstract, an update package is generated which includes an encoded instruction set comprising COPY and ADD operations instructing the copying of source data [i.e. memory content] from locations in the memory device and adding other data provided in the update package. Further, col. 9, ll. 44-48, This process of updating continues until at query state 428 it is determined that the new image to be updated across the block-structured non-volatile memory has been applied to all k blocks to be updated, at which point the update process returns to state 414). As to claim 17, Ogle discloses the device further comprising memory access circuitry adapted for, in each of a plurality of iterations: receiving information indicative of at least part of the identified non-volatile memory content stored in at least one non-volatile memory component connected to the at least one hardware processor (col. 5, ll. 7-14, update encoder 116. Update generator 112 maintains, or receives from an external source, an original data image 120 corresponding to the subject client device 150 and is also supplied with or obtains [i.e. accessing] a copy of the new data image 122 for the subject client device. The BDE 118 receives a copy of the original data image 120 [i.e. unmanaged modification] and a copy of the new data image to be applied 122); receiving a modification instruction to apply to the at least part of the identified non-volatile memory content (col. 21, ll. 31-45, the process for applying the update package 124 commences at a start state 902 where a client device 150 having a first original image 120 programmed across k blocks of a block structured non-volatile memory device 210 is to have such original image reprogrammed with a new image 122. As will be explained further below, start state 902 may be at a point when an update package 124 is first received and to be installed, or alternatively, when an update package to be applied has been previously received and installation is to re-commence after being interrupted [i.e. reconstructed] at some point prior to complete installation of the update package. Thus, in either scenario, it is assumed that an update package has already been received and saved to some a location, such as in a data memory block in space 230 of non-volatile memory device 210. Note: per spec page 2, ll. 10-16, reconstructed memory content using the modified non-volatile memory content and using the reconstructed memory content and at least one memory update instruction associated); computing one or more modification entries using the at least part of the identified non-volatile memory content and the modification instruction (col. 21, ll. 31-45, the process for applying the update package 124 commences at a start state 902 where a client device 150 having a first original image 120 [i.e. identified unmanage content] programmed across k blocks of a block structured non-volatile memory device 210 is to have such original image reprogrammed with a new image 122 [i.e. reconstructed]. As will be explained further below, start state 902 may be at a point when an update package 124 is first received and to be installed, or alternatively, when an update package to be applied has been previously received and installation is to re-commence after being interrupted at some point prior to complete installation of the update package. Thus, in either scenario, it is assumed that an update package has already been received and saved to some a location, such as in a data memory block in space 230 of non-volatile memory device 210. Note: when updated the original image i.e. identical with identified unmanage memory content); modifying the at least part of the identified non-volatile memory content according to the modification instruction (col. 7, ll. 37-58, FIG. 3, flash memory device is divided into a plurality of memory blocks 310, 312 and 314, which represent the current block being updated at any one time (block 312) and the blocks updated immediately previously to the current block (310) and immediately after the current block (314). A notable feature of the block structure of flash memory devices is that for each block 312 … COPY operations 326 and 328 and in there respective destination, such as representative ADD operations 322 and 324. The existence of block boundaries necessarily increases the number of operations in an update [i.e. modification] instruction set, as they cause a bifurcation of instructions that would not occur in a conventional continuous update application. Further, col. 8, ll. 28-33, When the block is completely built (which must correspond to the end of an operation) the actual destination memory block X for such block image (indicated at 340) is erased and reprogrammed with the content of the new version of that block present in the scratch memory area.); and storing the one or more modification entries col. 9, ll. 11-16, further col. 15, ll. 39-43, The basic changes to the update package encoding [i.e. entries] using SETBLOCK operations become: 1. An ADD or COPY operation whose destination region crosses the end of the current block being updated is truncated at the end of the block). As to claim 19, it is a method claim, having similar limitations of claim 1. Thus, claim 19 is also rejected under the same rationale as cited in the rejection of claim 1. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Claim 3 is rejected under 35 U.S.C. 103 as being obvious over Ogle et al. and in view of Slyz et al. (US 20080098160 A1). As to claim 3, Ogle does not explicitly disclose the following limitations but, Slyz discloses the device wherein the at least one hardware processor is further configured for using the new non-volatile memory content instead of the modified non-volatile memory content when executing the plurality of firmware computer instructions (par. 0023, … information for updating memory in an electronic device such as those described above may be communicated using, for example, an update package comprising a set of instructions executable by firmware and/or software in the electronic device to transform or convert an existing version of software, firmware, and/or data in the electronic device into a new or updated version of the software, firmware, and/or data). Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to modify the system disclosed by Ogle include the device wherein the at least one hardware processor is further configured for using the new non-volatile memory content instead of the modified non-volatile memory content when executing the plurality of firmware computer instructions, as disclosed by Slyz, for the purpose of updating of memory contents as well firmware 0021 and Abstract of Slyz). Claims 4-5 are rejected under 35 U.S.C. 103 as being obvious over Ogle et al. and Slyz et al. as applied in the claim 3 above and further in view of Koval et al. (US 20200012488 A1, hereinafter Koval). As to claim 4, Ogle discloses wherein the new non-volatile memory content comprises a new plurality of firmware computer instructions (col. 4, ll. 57-63, Update agent 156 is further comprised of update decoder 154 that interprets and applies the update instruction set of update package 124 in order to convert original data image 120 into a new data image 122. Though shown schematically as two separate elements, download agent 152 and update decoder 154 may be parts of the same application or software, be embedded firmware); and the device wherein the identified non-volatile memory content comprises a first plurality of firmware computer instructions (col. 22, ll. 11-25, the update package is first stored on the device and act as switchable status identifiers during the process of updating. By definition these status bits will themselves be present in flash memory (but in a block not in the k blocks to be updated) by virtue of storing the update package after its initial receipt by the client device. Flash memory cells cannot be rewritten with new data without first erasing them, however with the exception that any flash memory cell storing a "1" can be programmed to "0". Accordingly, in the present case each of the block status bits are set to 1 in the upgrade package as initially delivered and stored on the device constituting a first or initial set state for each status bit. Thus, these bits will be updated or switched to a second state when cleared to "0" in-situ during application of the upgrade package. Further, see col. 4, ll. 57-63); Koval discloses wherein the modified non-volatile memory content comprises the plurality of firmware computer instructions, executed by the at least one hardware processor and produced by applying at least some of the at least one modification to the first plurality of firmware computer instructions (par. 0086, The IED 10 of FIG. 1 includes a plurality of sensors 12 coupled to various phases A, B, C and neutral N of an electrical distribution system 11, a plurality of analog-to-digital (A/D) converters 14, including inputs coupled to the sensor 12 outputs, a power supply 16, a volatile memory 18, a non-volatile memory 20, a multimedia user interface 22, and a processing system that includes at least one central processing unit (CPU) 50 (or host processor) and one or more digital signal processors, two of which are shown, i.e., DSP1 60 and DSP2 70. The IED 10 also includes a Field Programmable Gate Array 80 which performs a number of functions, including, but not limited to, acting as a communications gateway for routing data between the various processors 50, 60, 70, receiving data from the A/D converters 14 performing transient detection and capture and performing memory decoding for CPU 50 and the DSP processor 60. In one embodiment, the FPGA 80 is internally comprised of two dual port memories to facilitate the various functions. Further, (par. 0333, ED 10 or IED 1100, may be configured to provide more efficient update procedures for packages on an IED while decreasing any interruptions to the functionality of the IED during the update. It is to be appreciated that a package is a collection of files, scripts, and descriptive information, which may be used in combination to install and uninstall updates to the IED. Files may include, but are not limited to: resources such as pictures, web pages, configuration files, documentation, test files, and software instructions; executables such as compiled firmware binaries, compiled software binaries … ); Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to modify the system disclosed by Ogle include wherein the modified non-volatile memory content comprises the plurality of firmware computer instructions, executed by the at least one hardware processor and produced by applying at least some of the at least one modification to the first plurality of firmware computer instructions, as disclosed by Koval, to perform of updating of memory contents as well firmware (see par. 0081 of Koval). Slyz discloses wherein using the new non-volatile memory content instead of the modified non-volatile memory content comprises executing the new plurality of firmware computer instructions instead of the plurality of firmware computer instructions (par. 0023, … information for updating memory in an electronic device such as those described above may be communicated using, for example, an update package comprising a set of instructions executable by firmware and/or software in the electronic device to transform or convert an existing version of software, firmware, and/or data in the electronic device into a new or updated version of the software, firmware, and/or data). Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to modify the system disclosed by Ogle include the device wherein the at least one hardware processor is further configured for using the new non-volatile memory content instead of the modified non-volatile memory content when executing the plurality of firmware computer instructions, as disclosed by Slyz, for the purpose of updating of memory contents as well firmware 0021 and Abstract of Slyz). As to claim 5, Koval discloses the device wherein the at least one hardware processor is further configured for: computing an updated plurality of firmware computer instructions using the new plurality of firmware computer instructions and the data change information (par. 0155, … retrieving real time information, downloading logs, or registering for notification of events. For example, as shown in FIG. 8, a server 530 could be on a network 516 to collect log information from meters 510, 512, 514, and … the server 530 may then post the data to server 524. Furthermore, the server 530 may automatically download new firmware, retrieve files and change or modify programmable settings in the meters 510, 512, 514); and executing the updated plurality of firmware computer instructions instead of the plurality of firmware computer instructions (par. 0333, executables such as compiled firmware binaries, compiled software binaries, uncompiled source code, and script programs; and package information files, which provide information about the package. The descriptive information, further more known as the ‘header’, though not limited to the beginning of the package …upgrade, and modify, which could be used by the updater to determine which scripts to run and which updater actions can use the package. The scripts are a sequence of instructions run by the updater to perform an install action. Install actions may include, but are not limited to, installing a new package, uninstalling an existing package, upgrading an existing package using a new one, and modifying the features and settings of an existing package. The instructions in the script may be used to perform part of the install action, and may include actions such as, but not limited to, copying files from the package to an install or resource directory, deleting existing files, modifying entries). Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to modify the system disclosed by Ogle include computing an updated plurality of firmware computer instructions using the new plurality of firmware computer instructions and the data change information and executing the updated plurality of firmware computer instructions instead of the plurality of firmware computer instructions, as disclosed by Koval, to perform of updating of memory contents as well firmware (see par. 0081 of Koval). Claims 7-9, 14, and 18 are rejected under 35 U.S.C. 103 as being obvious over Ogle et al. in view of Koval et al. (US 20200012488 A1, hereinafter Koval). As to claim 7, Ogle does not explicitly disclose the following limitations but, Koval discloses the device further comprising at least one digital communication network interface connected to the at least one hardware processor (par. 0031, FIG. 5 is a functional block diagram of the processor of the web server power quality and revenue meter system shown in FIG. 4, according to the embodiment of the present invention. Further, par. 0099, … . An event command can be issued by a user, on a schedule or by digital communication that will trigger the IED 10 to access a remote server and obtain the new program code. …); wherein the at least one hardware processor (Fig. 5, par. 0031) is further configured for receiving the at least one memory update instruction via the at least one digital communication network interface (par. 0099. Further, par. 0222, the transfer of data between the data collection component and the memory accessible from the CPU, is to use a DMA controller to transfer the data between the memories of each of the two processors. For example, the kernel running on the CPU could specify a section of its memory to the DMA controller as the location to write data updates). Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to modify the system disclosed by Ogle include wherein the at least one hardware processor is further configured for receiving the at least one memory update instruction via the at least one digital communication network interface, as disclosed by Koval, to perform of updating of memory contents as well firmware (see par. 0081 of Koval). As to claim 8, Koval discloses the device wherein the at least one digital communication network interface is connected to a wireless digital communication network (par. 0095, … The wireless connection will operate under any of the various wireless protocols including but not limited to Bluetooth™ interconnectivity, infrared connectivity, radio transmission connectivity including computer digital signal broadcasting and reception commonly referred to as Wi-Fi or 802.11.X (where x denotes the type of transmission), satellite transmission or any other type of communication protocols, communication architecture or systems currently existing or to be developed for wirelessly transmitting data including spread spectrum 900 MHz, or other frequencies, Zigbee, WiFi, or any mesh enabled wireless communication). Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to modify the system disclosed by Ogle include the device wherein the at least one digital communication network interface is connected to a wireless digital communication network, as disclosed by Koval, to perform enabled wireless communication. (see par. 0095 of Koval). As to claim 9, Koval discloses the device wherein the wireless digital communication network is selected from the group of digital communication networks of: a Wi-Fi network (par. 0095), a cellular network (par. 0096, The IED 10 may communicate to a server or other computing device via the communication device 24. The IED 10 may be connected to a communications network, e.g., the Internet, by any means, for example, a hardwired or wireless connection, such as dial-up, hardwired, cable, DSL, satellite, cellular … ). As to claim 14, Ogle discloses the device wherein computing the reconstructed memory content, for at least some of the modified non-volatile memory content, comprises: identifying in the plurality of modification entries at least one modification entry associated with the at least some of the modified non-volatile memory content (col. 21, ll. 31-45, the process for applying the update package 124 commences at a start state 902 where a client device 150 having a first original image 120 [i.e. identified unmanage content] programmed across k blocks of a block structured non-volatile memory device 210 is to have such original image reprogrammed with a new image 122 [i.e. reconstructed]. As will be explained further below, start state 902 may be at a point when an update package 124 is first received and to be installed, or alternatively, when an update package to be applied has been previously received and installation is to re-commence after being interrupted at some point prior to complete installation of the update package. Thus, in either scenario, it is assumed that an update package has already been received and saved to some a location, such as in a data memory block in space 230 of non-volatile memory device 210. Note: when updated the original image i.e. identical with identified unmanage memory content); and computing respective reconstructed memory content using the at least one modification entry (col. 21, ll. 31-35, the process for applying the update package 124 commences at a start state 902 where a client device 150 having a first original image 120 [i.e. identified unmanage content] programmed across k blocks of a block structured non-volatile memory device 210 is to have such original image reprogrammed with a new image 122 [i.e. reconstructed]); Koval discloses retrieving the at least some of the modified non-volatile memory content (Koval par. 0221, FIG. 12, the common data interface 1200 includes a driver 1204 that accesses a data collection component 1202, e.g., DSP 60,70 as shown in FIG. 1, and an interface application 1206 that applications 1208 can use to read the data collected, called a Library. The driver 1204 receives data from the data collection component 1202 and fills memory 1210, e.g., volatile memory, with the data); Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to modify the system disclosed by Ogle include retrieving the at least some of the modified non-volatile memory content, as disclosed by Koval, to perform enabled wireless communication. (see par. 0095 of Koval). As to claim 18, Koval discloses the device wherein at least some of the data change information is computed by at least one other hardware processor (Fig. 1, element 50, par. 0333, … The descriptive information may include, but is not limited to, the following: a package name, which could be used by the updater to distinguish one package from another; a package version, which could be used by the updater to determine if the package is newer then the one already installed; a package dependency list, which could be used by the updater to ensure other required packages are installed before installing this package; a package signature, which could be used by the updater to ensure that the package is valid, and not modified [i.e. changed] by some third party; package update notes, which could be displayed to the user if the user is given the option to decide if the package should be updated, or could be entered into a log as part of the update process; a package manifest, or list of contained files, which could be used by the updater to verify the contents of the package; and a list of supported features of the package, such as install, uninstall, upgrade, and modify … ); and wherein the at least one hardware processor is further configured for receiving the at least some of the data change information from the at least one other hardware processor (Fig. 1, par. 0333). Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to modify the system disclosed by Ogle include the device wherein at least some of the data change information is computed by at least one other hardware processor, as disclosed by Koval, provide information to the user. (see par. 0092 of Koval). Claim 20 are rejected under 35 U.S.C. 103 as being obvious over Ogle et al. and in view of Aue et al. (US 20150325291 A1). As to claim 20, Ogle discloses a configurable computerized vehicle, comprising: at least one hardware processor configured for executing a code for updating modified non-volatile memory content by (col. 7, ll. 30-32 and Further, col. 15, ll. 3-8): accessing data change information indicative of at least one unmanaged modification applied to the identified non-volatile memory content and computed when receiving at least one unmanaged modification instruction (col. 5, ll. 7-14), where applying the at least one modification to the identified non-volatile memory content produces the modified non-volatile memory content (col. 7, ll. 37-58, FIG. 3, Further, col. 8, ll. 28-33), used by the at least one hardware processor when executing a plurality of firmware computer instructions (col. 4, ll. 58-64); and updating the modified non-volatile memory content, comprising (col. 11, ll. 57-61): computing reconstructed memory content using the modified non-volatile memory content produced by applying the at least one unmanaged modification to the identified non-volatile memory content (col. 21, ll. 31-45) and the data change information such that the reconstructed memory content is identical to the identified non-volatile memory content (col. 21, ll. 31-45); and computing new non-volatile memory content using the reconstructed memory content (col. 21, ll. 31-45) and at least one memory update instruction associated with the identified non-volatile memory content (abstract and further col. 9, ll. 44-48). Ogle does not explicitly disclose the following limitations but, Aue discloses a configurable computerized vehicle, comprising: the embedded system is used, for example, in a motor vehicle (par. 0023, the non-volatile memory is used in an embedded system, for example in a control unit. The embedded system is used, for example, in a motor vehicle. … Further, par. 0025, The present invention is especially suitable for embedded systems in a motor vehicle, for example for a control unit of a motor vehicle. The present invention thus makes a refresh of memory areas in the embedded system of the motor vehicle possible without performance fluctuations or runtime losses of the motor vehicle or disruptions in the rotation of the engine of the motor vehicle). Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to modify the system disclosed by Ogle include the embedded system is used, for example, in a motor vehicle, as disclosed by Aue, for the purpose of controlling the motor vehicle 0026 of Aue). Conclusion Prior arts made of record are considered pertinent to applicant's disclosure. See MPEP § 707.05 (C) For Examples: I. Hsu et al. (US 20200356284 A1) discloses: “ In an exemplary embodiment, the memory controller loads first-type security parameters to the data register by executing the base firmware code. The first-type security parameters depend on the project of the data storage device. A security function executed by the memory controller may load second-type security parameters to the data register. The second-type security parameters are retrieved from the non-volatile memory. After the second-type security parameters are downloaded to the data register and modified on the data register, the memory controller may execute the security firmware code to update the second-type security parameters to the non-volatile memory.” (please see [0009]). II. Hamakawa et al. (US 20160321057 A1) discloses: “] An electronic apparatus according to the present invention includes a processor that performs a process according to a program; and a non volatile memory that stores a target program to be updated and a boot program executed at starting up. The target program includes a rewriting program that rewrites the target program. The processor (a) downloads a update program used for update of the target program; (b) copies the rewriting program into the non volatile memory in accordance with the target program; (c) after copying the rewriting program, changes a program started by the boot program from the target program to the copied rewriting program, and reboots; (d) after the reboot, starts execution of the copied rewriting program in accordance with the boot pr” (please see [0009]). Any inquiry concerning this communication or earlier communications from the examiner should be directed to Mohammad Kabir whose telephone number is (571)270-13411. The examiner can normally be reached on M-F, 8:00 am - 5:00 pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Sam Sough can be reached on (571) 272-6799. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Mohammad Kabir/ Examiner, Art Unit 2192 /S. Sough/SPE, Art Unit 2192
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Prosecution Timeline

Dec 22, 2023
Application Filed
May 05, 2026
Non-Final Rejection mailed — §102, §103 (current)

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1-2
Expected OA Rounds
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Grant Probability
81%
With Interview (+14.2%)
3y 5m (~10m remaining)
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