DETAILED ACTION
Claims 1-8 (filed 12/27/2023) have been considered in this action. Claims 1 and 8 have been amended. Claims 2-7 are filed in the same format as originally filed.
Specification
The disclosure is objected to because of the following informalities:
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The examiner recommends a title that is reflective of the inventive concept, such as “CONTROL SYSTEM AND PROGRAMMABLE LOGIC CONTROLLER THAT SYNCRHONIZES TO CAMERA USING FIRST AND SECOND COUNTERS”
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 2, 3, 6 and 7 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claims 2, 6 and 7 each recites the limitation "the longest communication delay duration" in respective limitations of each claim. There is insufficient antecedent basis for this limitation in the claim. Claim 1 fails to establish “a longest communication delay duration” and thus the use of antecedent basis in each of these claims is improper.
Claim 3 is dependent upon claim 2, and thus inherits the rejection of claim 2 under 35 U.S.C. 112(b).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1, 4 and 5 are rejected under 35 U.S.C. 103 as being unpatentable over Dinev et al. (US 20150213838, hereinafter Dinev) in view of Miyasaka (US 20210364996, hereinafter Miyasaka) and IEEE 1588 outreach subcommittee (“IEEE-1588-2019 evolves to better serve its wide variety of application”, hereinafter IEEE-1588).
In regards to Claim 1, Dinev teaches “A control system, comprising: a camera including a first synchronous counter” ([0019] The camera 105 is mounted in such way, so it can monitor the entire or a selected sections of the production line motion. A camera-computer interface cable 106 connects the camera 105 to a video recording apparatus 110, which first processing module comprises of a camera interface card 111. The interface card 111 is connected to a single board computer 112 (SBC). The SBC includes a circular buffer 155 (CB) for storing images captured by camera 105 and a local time clock 157 (LTC) for providing a unique timestamp for each image in the CB; wherein a local clock is a first synchronous counter because clocks count the time incrementally) “a programmable logic controller including a second synchronous counter” ([0019] The programmable logic controller 122 is connected to the production line control unit 101 and includes a malfunction detection clock 162 (MDC) for determining a time of a malfunction detected by malfunction detector 151 and a trigger signal generator 164 for generating trigger signals based upon the malfunction detector 151 and the malfunction detector clock 162.; wherein a clock is a form of counter, because it progressively counts up in divisions of time (millisec, seconds, etc.)) “and a control network connecting the camera and the programmable logic controller” (Fig. 1 and [0019] A network interface card 113 is connected the computer 112 and an industrial protocol network 118. Industrial protocol network 118 may be any form of wired or wireless local area network known to those familiar with the art and capable of interfacing elements of a production system and includes an Ethernet/IP Process, DeviceNet, CompoNet, ControlNet and Common Industrial Protocol (CIP) and other networks for supporting process automation. The interface card is connected through the local area network to production equipment 120, which comprises of an IEEE 1588 timing server 121 or equivalent, a programmable logic controller 122 which may be provided by Rockwell, a control computer 123, and a file server 124, all connected to the network 118) “the control network being configured to synchronize the first synchronous counter and the second synchronous counter by measuring durations of a plurality of transmission delays between the camera and the programmable logic controller” ([0020] The timing server 121 provides a timing information and time synchronizes the LTC 157 of apparatus 110, and all components connected to network 118 including MDC 162. [0025] It should further be appreciated that modifications of the examples of the block diagrams of FIG. 1 and FIG. 2 are possible while remaining within the scope of this description. For example, the block diagram of FIG. 2 can be modified by adding the camera 105 and apparatus 110 of FIG. 1 coupled to local area network 118. In this example, the local time clock 157, local time clock 257 and malfunction detection clock 262 are synchronized by the IEEE 1588 timing server 121; wherein IEEE 1588 fundamentally includes the function of measuring durations of a plurality of transmission delays) “wherein the camera adds, to a captured image obtained by image capturing, a count value of the first synchronous counter at the image capturing, and transmits the captured image to the programmable logic controller through the control network” ([0021] The SW 114 combined with LTC 157 takes the timing information provided by server 121, generates a time stamp, and appends the time stamp to every incoming frame from camera 105 and stored in CB 155, where the time stamp of every image frame is different or unique. A sequence of predetermined number (N) of the appended image frames is stored into the computer 112 memory frame by frame in circular buffer 155, thus providing a loop recording of the images in is such ways, that loop contains the last N images all the time... In the event of a malfunction of the production line 100, the control unit 101 sends an error signal to the logic controller 122, and at least one trigger signal is generated by trigger signal generator 164 (TSG) and the trigger signal is send by the controller 122 to the apparatus 110 via the network 118. Upon receiving the trigger signal the computer instructs the SW 114 to generate video file comprising of the last N images, where the video file is generated in such way, so it contains the frame captured in the time moment when the line has malfunctioned (the event), or other time that may help with determining the malfunction of the production. When generating the video file the SW can be instructed with a trigger time window signal indicative of how many frames pre (start time) and how many frames post (stop time) event to record, based on the start time and stop parameters in the PLC trigger command. The video file contains the start and stop time along with the recording duration. Upon completion the video file is transferred to the file server 124, and a message is sent to control computer 123 the files are available for viewing. From computer 123 the video file can be rendered on the display for review and the cause for the malfunction event to be determined. In other examples, the control PC 123 and the file server 124 may be a single unit or the function may be distributed through various components of the system; wherein the file server 124 is storage for the PLC when combined as a single unit and distributed to the PLC as suggested, it would have the received the image over the network) “and the programmable logic controller stores… a count value of the second synchronous counter, internal data or data of a control target,” ([0017] In the event of a malfunction of the production line, the line motion control unit sends an error signal to the PLC, and subsequently the PLC sends a trigger signal containing the time of stoppage information to the single board computer via the factory LAN; wherein the time of stoppage/malfunction is sent from the PLC And thus it must be stored there is some form before sending; [0019] The programmable logic controller 122 is connected to the production line control unit 101 and includes a malfunction detection clock 162 (MDC) for determining a time of a malfunction detected by malfunction detector 151 and a trigger signal generator 164 for generating trigger signals based upon the malfunction detector 151 and the malfunction detector clock 162. [0020] Control unit 101 monitors the production line 100 motion and provides information to logic controller 122).
Dinev fails to teach “and the programmable logic controller stores, into a storage device included in the programmable logic controller, …, the count value of the first synchronous counter, and the captured image”. It is noted that while Dinev uses IEEE-1588, there is no explicit mention of durations of communication delays being utilized, but this is an inherited feature of IEEE-1588 and thus is incorporated by reference.
IEEE-1588 teaches “synchronize the first synchronous counter and the second synchronous counter by measuring durations of a plurality of transmission delays between the camera and the programmable logic controller” ([IEEE-1588-2019 page 3] The Master Clock and Slave Clock communicate over a CAT5 copper Ethernet cable. The time for a single bit to propagate over CAT5 is 2 x 10^8 meters/sec....The Delay_Req and Delay_Resp messages are used to find propagation time. The Slave Clock transmits a Delay_Req to the Master Clock, acquiring timestamp t3. Assume that t3 is 305000 ns. The Master Clock acquires timestamp t4 when with Delay_Req is received, and the Master Clock sends t4 back to the Slave Clock in the Delay_Resp message. Assume that t4 is 302050 ns. The Slave Clock can calculate (t4 – t3), also known as tsm, which is -2950 ns for this example. PTP assumes that propagation time is the same in each direction (symmetric). Therefore, the propagation time is calculated as (tms + tsm) / 2, which for this example is (3050 + -2950) / 2 = 50 ns. Now that PTP knows the propagation time, PTP can calculate the clock offset as (tms – <mean propagation time>), or 3000 ns. When the Slave Clock subtracts the clock offset from its local time, it is accurately synchronized to the Master Clock time).
It would have been obvious to a person having ordinary skill in the art before the effective file date of the claimed invention to have modified the system using a PLC and camera that communicate with one another and have respective clocks that are synchronized using IEEE-1588, to utilize those features of IEEE-1588 that includes measuring delays between clocks to determine transmission delays so they can be compensated for as taught by IEEE-1588 because those features are implied by Dinev through their explicit use of IEEE-1588 protocol.
The combination of Dinev and IEEE-1588 fails to teach “and the programmable logic controller stores, into a storage device included in the programmable logic controller, …, the count value of the first synchronous counter, and the captured image”.
Miyasaka teaches “and the programmable logic controller stores, into a storage device included in the programmable logic controller, a count value of the second synchronous counter, internal data or data of a control target, the count value of the first synchronous counter, and the captured image” ([0079] The image data stored into the moving image memory 37e is transferred to the basic unit 3; wherein the basic unit 3 is the PLC [0084] The time information such as a time stamp is useful, for example, at the time when data acquired by the basic unit 3 and data acquired by another extension unit are displayed in the dashboard in a contrastable manner. Generally, the collection timing in the basic unit 3 does not coincide with the collection timing in another extension unit. Thus, comparing the operation of the basic unit 3 with the operation of another extension unit requires information for associating the data of the basic unit 3 with the data of another extension unit. In general, time information can be synchronized between the basic unit 3 and another extension unit by inter-unit synchronization or the like. Therefore, the basic unit 3 and another extension unit each gives time information at the time when the data record is collected to the data records).
It would have been obvious to a person having ordinary skill in the art before the effective file date of the claimed invention to have modified the system with PLC and camera which uses two synchronization counters in the form of synchronized clocks that increment and which commands the camera to send images over a network to the PLC as taught by Dinev, with the use of storage internal to the PLC which stores not only the clock timestamp and internal/control data, but which also stores images and the timestamp assigned by the camera as taught by Miyasaka, because both inventions are in the same field of use relating to cameras and PLCs and their interoperation, and it can thus be considered taking the known techniques of Miyasaka and how their PLC operates, and improving the PLC of Dinev in a similar manner. In other words, it’s taking the known techniques of Miyasaka to improve the similar PLC device of Dinev in the same way.
In regards to Claim 4, the combination of Dinev, Miyasaka and IEEE teaches the system as incorporated by claim 1 above. Dinev further teaches “The control system according to claim 1, wherein the camera converts the count value of the first synchronous counter to a frame count value at a frequency different from a frequency of the first synchronous counter and transmits image data to the programmable logic controller together with the frame count value” ([0007] the video image stream including a multiplicity of frames; a local time clock for keeping a local time based upon a synchronization signal received from the industrial protocol network through the network interface controller and for generating a unique timestamp for each of the multiplicity of frames based upon the local time; wherein the unique timestamp can be considered a count value, as it is always increasing and is saved with each frame [0021] The SW 114 combined with LTC 157 takes the timing information provided by server 121, generates a time stamp, and appends the time stamp to every incoming frame from camera 105 and stored in CB 155, where the time stamp of every image frame is different or unique. A sequence of predetermined number (N) of the appended image frames is stored into the computer 112 memory frame by frame in circular buffer 155, thus providing a loop recording of the images in is such ways, that loop contains the last N images all the time... Upon receiving the trigger signal the computer instructs the SW 114 to generate video file comprising of the last N images, where the video file is generated in such way, so it contains the frame captured in the time moment when the line has malfunctioned (the event), or other time that may help with determining the malfunction of the production. When generating the video file the SW can be instructed with a trigger time window signal indicative of how many frames pre (start time) and how many frames post (stop time) event to record, based on the start time and stop parameters in the PLC trigger command. The video file contains the start and stop time along with the recording duration. Upon completion the video file is transferred to the file server 124, and a message is sent to control computer 123 the files are available for viewing; wherein the start and stop times can be considered frame numbers because they indicate the first and last frames [0024] It should further be appreciated that the frame rates of each camera may be different while remaining within the scope of the description, the trigger time window accounting for more frames within a determined window duration with a higher frame rate camera. ... production equipment operating at a slower rate may be able to utilize a camera operating at a slower rate and maintain an ability to diagnose a corresponding malfunction; wherein the frame rate is variable, and thus the frame count number of the timestamp is at a different frequency than that of the clock as each frame is able to be timestamped and furthermore it would be understood by PHOSITA that the clock is appreciably faster than the frame rate corresponding to the number of frames).
In regards to Claim 5, the combination of Dinev, Miyasaka and IEEE teaches the system as incorporated by claim 1 above. Dinev further teaches “The control system according to claim 1, wherein, upon generation of a trigger with a condition specified by setting information, the programmable logic controller stores, into the storage device included in the programmable logic controller, control data and image data before and after the trigger with the condition specified by the setting information” ([0007] a circular buffer coupled to the image capturing apparatus through a first connection exclusive of the industrial protocol network, the circular buffer for storing the multiplicity of frames, the circular buffer further coupled to the local time clock for storing the unique timestamp for each of the multiplicity of frames. The network interface controller further for receiving a trigger signal from the industrial protocol network, the trigger signal including a trigger time window based upon a detected malfunction of the production equipment occurring at a malfunction time, selecting a plurality of frames of the multiplicity of frames based upon the trigger time window and the unique timestamp associated with each of the multiplicity of frames, and communicating the plurality of frames through the industrial protocol network. Miyasaka teaches “the programmable logic controller stores, into the storage device included in the programmable logic controller, control data and image data” ([0079] The image data stored into the moving image memory 37e is transferred to the basic unit 3; wherein the basic unit 3 is the PLC [0084] The time information such as a time stamp is useful, for example, at the time when data acquired by the basic unit 3 and data acquired by another extension unit are displayed in the dashboard in a contrastable manner. Generally, the collection timing in the basic unit 3 does not coincide with the collection timing in another extension unit. Thus, comparing the operation of the basic unit 3 with the operation of another extension unit requires information for associating the data of the basic unit 3 with the data of another extension unit. In general, time information can be synchronized between the basic unit 3 and another extension unit by inter-unit synchronization or the like. Therefore, the basic unit 3 and another extension unit each gives time information at the time when the data record is collected to the data records; [0038] The basic unit (also referred to as CPU unit) 3 includes a display part 5 and an operation part 6. The display part 5 can display an operation state or the like of each extension unit 4 attached to the basic unit 3. The display part 5 switches the display content according to the operation content of the operation part 6. The display part 5 normally displays a current value (device value) of a device in the PLC 1 and error information generated in the PLC 1. Here, the device includes various devices, such as a relay, a timer, and counter, included in the basic unit 3 and the extension unit 4, refers to a region on a memory provided for storing a device value, and may be referred to as a device memory. The basic unit 3 collects and stores a device value of each device).
In regards to Claim 8, Dinev teaches “A programmable logic controller connectable to, with a control network, a camera including a first synchronous counter” (Fig. 1 and [0019] The camera 105 is mounted in such way, so it can monitor the entire or a selected sections of the production line motion. A camera-computer interface cable 106 connects the camera 105 to a video recording apparatus 110, which first processing module comprises of a camera interface card 111. The interface card 111 is connected to a single board computer 112 (SBC). The SBC includes a circular buffer 155 (CB) for storing images captured by camera 105 and a local time clock 157 (LTC) for providing a unique timestamp for each image in the CB,,, A network interface card 113 is connected the computer 112 and an industrial protocol network 118. Industrial protocol network 118 may be any form of wired or wireless local area network known to those familiar with the art and capable of interfacing elements of a production system and includes an Ethernet/IP Process, DeviceNet, CompoNet, ControlNet and Common Industrial Protocol (CIP) and other networks for supporting process automation. The interface card is connected through the local area network to production equipment 120, which comprises of an IEEE 1588 timing server 121 or equivalent, a programmable logic controller 122 which may be provided by Rockwell, a control computer 123, and a file server 124, all connected to the network 118; wherein a local clock is a first synchronous counter because clocks count the time incrementally) “the programmable logic controller comprising: a second synchronous counter; and a storage device” ([0019] The programmable logic controller 122 is connected to the production line control unit 101 and includes a malfunction detection clock 162 (MDC) for determining a time of a malfunction detected by malfunction detector 151 and a trigger signal generator 164 for generating trigger signals based upon the malfunction detector 151 and the malfunction detector clock 162.; wherein a clock is a form of counter, because it progressively counts up in divisions of time (millisec, seconds, etc.)) “wherein the programmable logic controller receives a captured image that is obtained by image capturing and to which is added a count value, at the image capturing, of the first synchronous counter that is synchronized by the control network through measurement of a duration of a transmission delay between the camera and the programmable logic controller” ([0021] The SW 114 combined with LTC 157 takes the timing information provided by server 121, generates a time stamp, and appends the time stamp to every incoming frame from camera 105 and stored in CB 155, where the time stamp of every image frame is different or unique. A sequence of predetermined number (N) of the appended image frames is stored into the computer 112 memory frame by frame in circular buffer 155, thus providing a loop recording of the images in is such ways, that loop contains the last N images all the time... In the event of a malfunction of the production line 100, the control unit 101 sends an error signal to the logic controller 122, and at least one trigger signal is generated by trigger signal generator 164 (TSG) and the trigger signal is send by the controller 122 to the apparatus 110 via the network 118. Upon receiving the trigger signal the computer instructs the SW 114 to generate video file comprising of the last N images, where the video file is generated in such way, so it contains the frame captured in the time moment when the line has malfunctioned (the event), or other time that may help with determining the malfunction of the production. When generating the video file the SW can be instructed with a trigger time window signal indicative of how many frames pre (start time) and how many frames post (stop time) event to record, based on the start time and stop parameters in the PLC trigger command. The video file contains the start and stop time along with the recording duration. Upon completion the video file is transferred to the file server 124, and a message is sent to control computer 123 the files are available for viewing. From computer 123 the video file can be rendered on the display for review and the cause for the malfunction event to be determined. In other examples, the control PC 123 and the file server 124 may be a single unit or the function may be distributed through various components of the system; wherein the file server 124 is storage for the PLC when combined as a single unit and distributed to the PLC as suggested, it would have received the image over the network) “and the programmable logic controller stores, into the storage device, a count value of the second synchronous counter that is synchronized by the control network through measurement of the duration of the transmission delay between the camera and the programmable logic controller, internal data or data of a control target…” ([0017] In the event of a malfunction of the production line, the line motion control unit sends an error signal to the PLC, and subsequently the PLC sends a trigger signal containing the time of stoppage information to the single board computer via the factory LAN; wherein the time of stoppage/malfunction is sent from the PLC And thus it must be stored there is some form before sending; [0019] The programmable logic controller 122 is connected to the production line control unit 101 and includes a malfunction detection clock 162 (MDC) for determining a time of a malfunction detected by malfunction detector 151 and a trigger signal generator 164 for generating trigger signals based upon the malfunction detector 151 and the malfunction detector clock 162…A network interface card 113 is connected the computer 112 and an industrial protocol network 118. Industrial protocol network 118 may be any form of wired or wireless local area network known to those familiar with the art and capable of interfacing elements of a production system and includes an Ethernet/IP Process, DeviceNet, CompoNet, ControlNet and Common Industrial Protocol (CIP) and other networks for supporting process automation. The interface card is connected through the local area network to production equipment 120, which comprises of an IEEE 1588 timing server 121 or equivalent, a programmable logic controller 122 which may be provided by Rockwell, a control computer 123, and a file server 124, all connected to the network 118. [0020] Control unit 101 monitors the production line 100 motion and provides information to logic controller 122).
Dinev fails to teach “and the programmable logic controller stores, into the storage device…, the count value of the first synchronous counter, and the captured image”. It is noted that while Dinev uses IEEE-1588, there is no explicit mention of durations of communication delays being utilized, but this is an inherited feature of IEEE-1588 and thus is incorporated by reference.
IEEE-1588 teaches “synchronized by the control network through measurement of a duration of a transmission delay between the camera and the programmable logic controller” ([IEEE-1588-2019 page 3] The Master Clock and Slave Clock communicate over a CAT5 copper Ethernet cable. The time for a single bit to propagate over CAT5 is 2 x 10^8 meters/sec....The Delay_Req and Delay_Resp messages are used to find propagation time. The Slave Clock transmits a Delay_Req to the Master Clock, acquiring timestamp t3. Assume that t3 is 305000 ns. The Master Clock acquires timestamp t4 when with Delay_Req is received, and the Master Clock sends t4 back to the Slave Clock in the Delay_Resp message. Assume that t4 is 302050 ns. The Slave Clock can calculate (t4 – t3), also known as tsm, which is -2950 ns for this example. PTP assumes that propagation time is the same in each direction (symmetric). Therefore, the propagation time is calculated as (tms + tsm) / 2, which for this example is (3050 + -2950) / 2 = 50 ns. Now that PTP knows the propagation time, PTP can calculate the clock offset as (tms – <mean propagation time>), or 3000 ns. When the Slave Clock subtracts the clock offset from its local time, it is accurately synchronized to the Master Clock time).
It would have been obvious to a person having ordinary skill in the art before the effective file date of the claimed invention to have modified the system using a PLC and camera that communicate with one another and have respective clocks that are synchronized using IEEE-1588, to utilize those features of IEEE-1588 that includes measuring delays between clocks to determine transmission delays so they can be compensated for as taught by IEEE-1588 because those features are implied by Dinev through their explicit use of IEEE-1588 protocol.
The combination of Dinev and IEEE-1588 fails to teach “and the programmable logic controller stores, into the storage device…, the count value of the first synchronous counter, and the captured image”.
Miyasaka teaches “and the programmable logic controller stores, into the storage device included, a count value of the second synchronous counter… internal data or data of a control target, the count value of the first synchronous counter, and the captured image” ([0079] The image data stored into the moving image memory 37e is transferred to the basic unit 3; wherein the basic unit 3 is the PLC [0084] The time information such as a time stamp is useful, for example, at the time when data acquired by the basic unit 3 and data acquired by another extension unit are displayed in the dashboard in a contrastable manner. Generally, the collection timing in the basic unit 3 does not coincide with the collection timing in another extension unit. Thus, comparing the operation of the basic unit 3 with the operation of another extension unit requires information for associating the data of the basic unit 3 with the data of another extension unit. In general, time information can be synchronized between the basic unit 3 and another extension unit by inter-unit synchronization or the like. Therefore, the basic unit 3 and another extension unit each gives time information at the time when the data record is collected to the data records).
It would have been obvious to a person having ordinary skill in the art before the effective file date of the claimed invention to have modified the system with PLC and camera which uses two synchronization counters in the form of synchronized clocks that increment and which commands the camera to send images over a network to the PLC as taught by Dinev, with the use of storage internal to the PLC which stores not only the clock timestamp and internal/control data, but which also stores images and the timestamp assigned by the camera as taught by Miyasaka, because both inventions are in the same field of use relating to cameras and PLCs and their interoperation, and it can thus be considered taking the known techniques of Miyasaka and how their PLC operates, and improving the PLC of Dinev in a similar manner. In other words, it’s taking the known techniques of Miyasaka to improve the similar PLC device of Dinev in the same way.
Allowable Subject Matter
Claims 2, 3, 6 and 7 are objected to as being dependent upon a rejected base claim, but would be allowable in terms of prior art if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Nishiyama et al. (US 20190171192) – teaches a synchronization between devices using counters
Narayanswarmy et al. (US 20170134619) – teaches how to synchronize image data with non-image data
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JONATHAN M SKRZYCKI whose telephone number is (571)272-0933. The examiner can normally be reached M-Th 7:30-3:30.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ken Lo can be reached at 571-272-9774. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JONATHAN MICHAEL SKRZYCKI/Examiner, Art Unit 2116