DETAILED ACTION
This office action is responsive to communication filed on October 17, 2025.
Response to Arguments
Applicant's arguments filed October 17, 2025 have been fully considered but they are not persuasive.
Applicant argues, with respect to claim 1, that while Chu may arguably disclose measuring an amount of charges in the FD region 118, i.e., the alleged "accumulation part," the same cannot be said about measuring an amount of charges in the PD 112, which is compared by the Office to the recited "photoelectric conversion part." Applicant also notes that the Office seemingly overlooks this distinction in the Office Action, writing that "[a]s detailed in paragraph 0047, in a normal mode, an amount of charges accumulated in the accumulation part (118) is measured through comparison to a ramp voltage (RAMP).)." Office Action P4 (emphasis added). But while this may be true, claim 1 again requires measuring the "amount of charges accumulated in the photoelectric conversion part," about which Chu is silent.
The Examiner respectfully disagrees. In Chu et al., the charges in the accumulation part (118) directly correspond to the amount of charges generated by the photoelectric conversion part (112), accumulated in the photoelectric conversion part (112), and transferred to the accumulation part (118) via the transfer transistor (114, see paragraph 0025). Therefore, the measurement of the amount of charges in the FD region (118) during the normal mode (paragraph 0047) is a measurement of an amount of charges accumulated in the photoelectric conversion part (112).
Applicant further argues, with respect to claim 1, that Chu et al. does not teach (i) a signal based on the number of times the predetermined amount of charges is accumulated in the accumulation part measured by the measurement part and (ii) a signal based on the amount of charges accumulated in the photoelectric conversion part measured by the measurement part are output within one frame period.
The Examiner respectfully disagrees. For instance, in figure 5B of Chu et al., (i) a signal based on the number of times the predetermined amount of charges is accumulated in the accumulation part measured by the measurement part (i.e. in an “Auto Exposure” period of figure 5B) and (ii) a signal based on the amount of charges accumulated in the photoelectric conversion part measured by the measurement part (i.e. in a “SIG AD” period of figure 5B) are output within one frame period (e.g. “1F”, see figure 5B, paragraphs 0056-0058).
Applicant argues that Claim 3 recites, for example: (i) "a first input terminal connected to the accumulation part," (ii) "a second input terminal to which a predetermined reference potential is applied," and (iii) that "the measurement part changes a potential applied to the first input terminal." The Office rejects claim 3 over Chu, and particularly over that reference's 1[0047], which describes a stepped ramp voltage RAMP applied to the comparator 122. But while Chu's Fig. 3 may show an alleged "first input terminal" (upper) connected to the FD 118 and an alleged "second input terminal" (lower) to which a reference voltage REF is applied, that Figure also clearly shows that the stepped ramp voltage RAMP is also applied to the alleged "second input terminal" as an alternative to the reference voltage REF. Chu therefore does not disclose "chang[ing] a potential applied to the first input terminal," as required.
The Examiner respectfully disagrees. The potential applied to the first input part (i.e. the positive input terminal, figure 3) of the comparator (122) corresponds to the potential of the accumulation part (118, figure 3) is thus changed through selective operation of the transfer transistor (114, paragraph 0025).
Therefore, the rejection is maintained by the Examiner.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1, 3, 4, 7, 10 and 12 are rejected under 35 U.S.C. 103 as being unpatentable over Chu et al. (US 2020/0396401) in view of Shim et al. (US 2021/0134865).
Consider claim 1, Chu et al. teaches:
An imaging element (see figure 3) comprising:
a photoelectric conversion part (photodiode, 112) configured to convert light into charges (see paragraphs 0024 and 0025);
an accumulation part (floating diffusion region, 118) in which the charges from the photoelectric conversion part (112) are accumulated (see paragraphs 0024 and 0025);
a transfer path part (transfer transistor, 114) which is a transfer path for transferring charges from the photoelectric conversion part (112) to the accumulation part (118, see paragraphs 0024 and 0025); and
a measurement part (comparator, 122, storage unit, 124) configured to measure the number of times a predetermined amount of charges is accumulated in the accumulation part (118) and to measure an amount of charges accumulated in the photoelectric conversion part (As detailed in paragraphs 0044-0046, in an AE mode a number of times an amount of charges accumulated in the accumulation part (118) is higher than or equal to a reference voltage (REF) during an exposure period is measured and stored in the storage unit (124). As detailed in paragraph 0047, in a normal mode an amount of charges accumulated in the accumulation part (118) is measured through comparison to a ramp voltage (RAMP). The charges in the accumulation part (118) directly correspond to the amount of charges generated by the photoelectric conversion part (112), accumulated in the photoelectric conversion part (112), and transferred to the accumulation part (118) via the transfer transistor (114, see paragraph 0025). Therefore, the measurement of the amount of charges in the FD region (118) during the normal mode (paragraph 0047) is a measurement of an amount of charges accumulated in the photoelectric conversion part (112).),
wherein (i) a signal based on the number of times the predetermined amount of charges is accumulated in the accumulation part measured by the measurement part (i.e. in an “Auto Exposure” period of figure 5B) and (ii) a signal based on the amount of charges accumulated in the photoelectric conversion part measured by the measurement part (i.e. in a “SIG AD” period of figure 5B) are output within one frame period (e.g. “1F”, see figure 5B, paragraphs 0056-0058).
However, Chu et al. does not explicitly teach that the transfer path has a lower potential than a pixel separation region formed around the photoelectric conversion part.
Shim et al. similarly teaches an imaging element (figures 5 and 7) comprising a photoelectric conversion part (photodiode, PD1, paragraph 0053), an accumulation part (floating diffusion region, FD, paragraph 0054), and a transfer path part (transfer transistor, TX1, paragraph 0053) by which charges are transferred from the photoelectric conversion part (PD1) to the accumulation part (FD, see paragraph 0055).
However, Shim et al. additionally teaches that the transfer path has a lower potential than a pixel separation region formed around the photoelectric conversion part (As shown in figure 7, Shim et al. teaches a pixel separation region (first conductivity-type well, R1) formed around the photoelectric conversion part (PD1), paragraphs 0067, 0068 and 0073. Figure 8 shows a potential (PB2) of the transfer path (TX1, paragraph 0076) and a potential (PB1) of the pixel separation region (R1, paragraph 0074). As detailed in paragraph 0076, “The second potential barrier PB2 may be lower than the first potential barrier PB1.”).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have the transfer path taught by Chu et al. be of a lower potential than a pixel separation region formed around the photoelectric conversion part as taught by Shim et al. for the benefit of preventing crosstalk and thus improving image quality and a signal-to-noise ratio in a high illuminance environment (Shim et al., paragraphs 0155, 0157, 0158 and 0004).
Consider claim 3, and as applied to claim 1 above, Chu et al. further teaches a comparator (comparator, 122, figure 3, paragraph 0041) including a first input terminal connected to the accumulation part (118, see figure 3), a second input terminal to which a predetermined reference potential (REF or RAMP) is applied (see figure 3), and an output terminal which outputs a potential (CMP_OUT) based on a potential of the first input terminal and a potential of the second input terminal (see paragraphs 0043-0047), wherein the measurement part changes a potential applied to the first input terminal and measures the amount of charges accumulated in the photoelectric conversion part (118) on the basis of a time until the potential of the output terminal changes (i.e. in the normal mode, paragraph 0047. The potential applied to the first input part (i.e. the positive input terminal, figure 3) of the comparator (122) corresponds to the potential of the accumulation part (118, figure 3) is thus changed through selective operation of the transfer transistor (114, paragraph 0025).).
Consider claim 4, and as applied to claim 1 above, Chu et al. further teaches that the measurement part measures an amount of charges transferred from the photoelectric conversion part (112) to the accumulation part (118) via the transfer path part (i.e. in the normal mode, paragraph 0047).
Consider claim 7, and as applied to claim 1 above, Chu et al. further teaches that after the number of times a predetermined amount of charges is accumulated in the accumulation part is measured (i.e. after the “Auto Exposure 1-Bit AD” period ends at “1” in figure 5B), the measurement part measures the amount of charges accumulated in the accumulation part (“RST AD” between “1” and “2” in figure 5B) before the amount of charges accumulated in the photoelectric conversion part is measured (i.e. before “SIG AD” occurs between “2” and “3” in figure 5B, paragraphs 0048 and 0054-0058).
Consider claim 10, Chu et al. teaches an imaging device (figure 1) having the imaging element (110) of claim 1 (see paragraph 0023, claim 1 rationale).
Consider claim 12, and as applied to claim 1 above, Chu et al. further teaches that the signal based on the number of times the predetermined amount of charges is accumulated in the accumulation part measured by the measurement part is output (i.e. in an “Auto Exposure” period prior to “1” in figure 5B), and then the signal based on the amount of charges accumulated in the photoelectric conversion part measured by the measurement part is output (i.e. in a “SIG AD” period between “2” and “3” in figure 5B) within one frame period (see figure 5B, paragraphs 0056-0058).
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Chu et al. (US 2020/0396401) in view of Shim et al. (US 2021/0134865), as applied to claim 1 above, and further in view of Kato et al. (US 2017/0345853).
Consider claim 2, and as applied to claim 1 above, the combination of Chu et al. and Shim et al. does not explicitly teach that the transfer path part is a region having a lower impurity concentration than in the pixel separation region.
Kato et al. similarly teaches an imaging element (figures 2 and 3) having isolation regions (212, 214) with potential barriers (see paragraphs 0048 and 0052, figures 3D and 3E).
However, Kato et al. further teaches that a height of a potential barrier is increased by increasing the carrier concentration and reduced by lowering the carrier concentration (see paragraph 0120).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have a region of the transfer path part and the pixel separation region taught by the combination of Chu et al. and Shim et al. have respectively lower and higher impurity concentrations as taught by Kato et al. for the benefit of improving image quality and focus detection accuracy (Kato et al., paragraph 0006).
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Chu et al. (US 2020/0396401) in view of Shim et al. (US 2021/0134865), as applied to claim 1 above, and further in view of Liu et al. (US 2019/0319061).
Consider claim 6, and as applied to claim 1 above, the combination of Chu et al. and Shim et al. does not explicitly teach an accumulation amount selection part configured to select a capacitance of the accumulation part from a plurality of capacitances, wherein the accumulation amount selection part selects different capacitances according to whether the number of times a predetermined amount of charges is accumulated in the accumulation part or the amount of charges accumulated in the photoelectric conversion part is measured.
Liu et al. similarly teaches a dual photodiode pixel cell (800, figure 12).
However, Liu et al. additionally teaches an accumulation amount selection part (switch, M6) configured to select a capacitance of the accumulation part from a plurality of capacitances (i.e. from a floating diffusion capacitance CFD and a combination of the floating diffusion capacitance CFD and an auxiliary capacitance CAUX, paragraph 0124), wherein the accumulation amount selection part (M6) selects different capacitances according to whether the amount of charges accumulated in the photoelectric conversion part is measured (i.e. in a PD ADC mode, paragraphs 0063, 0124, 0134 and 0136).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have the imaging element taught by the combination of Chu et al. and Shim et al. include an accumulation amount selection part operational in the manner taught by Liu et al. for the benefit of expanding the dynamic range of the imaging element (Liu et al., paragraph 0063).
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Chu et al. (US 2020/0396401) in view of Shim et al. (US 2021/0134865), as applied to claim 3 above, and further in view of Sakakibara et al. (US 2017/0272678).
Consider claim 5, and as applied to claim 3 above, the combination of Chu et al. and Shim et al. does not explicitly teach that the comparator is configured of two transistors including a first transistor to which the first input terminal is connected and a second transistor to which the second input terminal is connected.
Sakakibara et al. similarly teaches an imaging element (figure 2) including a pixel circuit (41) and a comparator (51), wherein a first input terminal (SIG) of the comparator (51) is connected to the output of the pixel circuit (41), and a second input terminal (REF) of the comparator (51) is connected to a reference potential (see figure 2, paragraphs 0119 and 0120).
However, Sakakibara et al. additionally teaches that the comparator (61, see figure 4) is configured of two transistors (81, 82) including a first transistor (82) to which the first input terminal (SIG) is connected (see figure 4, paragraph 0131) and a second transistor (81) to which the second input terminal (REF) is connected (see figure 4, paragraph 0131).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have the comparator taught by the combination of Chu et al. and Shim et al. be configured in the manner taught by Sakakibara et al. for the benefit of providing a comparator with reduced power consumption and increased determination speed (Sakakibara et al., paragraph 0007).
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Chu et al. (US 2020/0396401) in view of Shim et al. (US 2021/0134865), as applied to claim 1 above, and further in view of Liu et al. (US 2020/0007798).
Consider claim 8, and as applied to claim 1 above, the combination of Chu et al. and Shim et al. does not explicitly teach that the measurement part outputs a value obtained by adding the amount of charges accumulated in the photoelectric conversion part and the amount of charges accumulated in the accumulation part to the photoelectric conversion part as an amount of light converted into charges.
Liu et al. similarly teaches an imaging element (1100, figure 3) having a photoelectric conversion part (PD), an accumulation part (CFD) and a comparator (1104, paragraphs 0113 and 0114).
However, Liu et al. additionally teaches that the measurement part outputs a value obtained by adding the amount of charges accumulated in the photoelectric conversion part and the amount of charges accumulated in the accumulation part to the photoelectric conversion part as an amount of light converted into charges (“Moreover, the TG signal can set transfer switch M1 in a fully turned-on state to transfer the residual charge to CFD. The residual charge can be added to the overflow charge in CFD, which changes the PIXEL_OUT voltage to Vpixel_out_sig2.” Paragraph 0134).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have the measurement part taught by the combination of Chu et al. and Shim et al. output a value obtained in the manner taught by Liu et al. for the benefit of providing an image sensor with improved global shutter operation (Liu et al., paragraph 0052).
Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Chu et al. (US 2020/0396401) in view of Shim et al. (US 2021/0134865), as applied to claim 1 above, and further in view of Niwa (US 2020/0260032).
Consider claim 9, and as applied to claim 1 above, Chu et al. further teaches a chip (CH1) provided with the photoelectric conversion part (i.e. including pixel 110, figures 11 and 3, paragraph 0099) and a chip (CH2) provided with the measurement part (i.e. provided with the ADC part 120, figures 11 and 3, paragraph 0099).
However, the combination of Chu et al. and Shim et al. does not explicitly teach that a potential of a ground point of the chip provided with the photoelectric conversion part is lower than a potential of a ground point of a chip provided with the measurement part.
Niwa similarly teaches an imaging element (figure 7) having a photoelectric conversion part on a first chip (“light-receiving board”, 201, paragraphs 0035 and 0047-0053) and measurement circuitry on a second chip (“circuit board”, 202, paragraphs 0035 and 0047-0053).
However, Niwa additionally teaches that a potential of a ground point of the chip (“light receiving board”, 201) provided with the photoelectric conversion part is lower than a potential of a ground point of a chip (“circuit board”, 202) provided with the measurement part (“The negative-potential supply section 230 supplies the light-receiving board 201 with a predetermined potential lower than a predetermined reference potential (e.g., ground potential). The predetermined potential is supplied as a negative potential.” Paragraph 0039, see figure 7).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have the ground point of the chip provided with the photoelectric conversion part taught by the combination of Chu et al. and Shim et al. be lower than a potential of a ground point of a chip provided with the measurement part as taught by Niwa for the benefit of increasing sensitivity and reducing dark current (Niwa, paragraph 0060).
Allowable Subject Matter
Claims 11 and 13 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Consider claim 11, the prior art of record does not teach nor reasonably suggest that the measurement part changes the potential applied to the first input terminal by way of a ramp voltage, and the ramp voltage is applied simultaneously with the predetermined reference potential being applied to the second input terminal, in combination with the other elements recited in parent claims 1 and 3.
Consider claim 13, the prior art of record does not teach nor reasonably suggest that an adder part configured to add the signal based on the number of times the predetermined amount of charges is accumulated in the accumulation part measured by the measurement part and the signal based on the amount of charges accumulated in the photoelectric conversion part measured by the measurement part within one frame period, in combination with the other elements recited in parent claim 1.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/ALBERT H CUTLER/Primary Examiner, Art Unit 2637