DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Priority
Acknowledgment is made of applicant's claim for foreign priority based on applications filed in Korea on 18 July 2022 and 18 July 2023. It is noted, however, that applicant has not filed certified copies of either of the KR-10-2022-0088147 and KR-10-2023-0093117 applications as required by 37 CFR 1.55.
Claim Objections
A number of claims are objected to because of the following informalities: the claims recite features without providing antecedent basis for those features. Appropriate correction is required.
Claim 8 recites “the CCG data voltage” instead of “a CCG data voltage.”
Claim 9 recites “the capacitor connected to the two data voltages as the CCG data voltage and the PWM data voltage are applied…” instead of “a capacitor connected to two data voltages as a CCG data voltage and a PWM data voltage are applied….”
Claim 10 recites “the voltage increases slowly as a Vsweep signal…” instead of “a voltage increases slowly as a Vsweep signal….”
Claim 11 recites “during the data setting period” instead of “during a data setting period;” “the set image data voltage” instead of “a set image data voltage;” and “the light emission period” instead of “a light emission period.”
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-2, 5, and 7-11 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Watanabe et al. (hereinafter “Watanabe” US 2021 / 0366368).
As pertaining to Claim 1, Watanabe discloses (see Fig. 1A and Fig. 1B) a micro LED driving circuit (10) comprising a double gate transistor (11), comprising
a PWM circuitry (11, 14) adjusting light emitting time of a micro LED (17), the PMW circuitry (11, 14) comprising a PWM circuitry driving transistor (11) having a double gate structure (see Page 6, Para. [0074]-[0075] and [0077]-[0078]),
wherein the double gate structure compensates for threshold voltage shift of the driving TFT (11) while determining an on/off timing (i.e., an on/off timing of (T5); see (11)) through comparison of the PWM data voltage (i.e., the voltage provided by (S1) to (11)) and sweep voltage (Vsweep; see (G3)); and
a CCG circuitry (12, 13) controlling a constant current to be supplied during light emission of the micro LED (17) based on the PWM data voltage (i.e., the voltage provided by (S1) to (11)),
wherein the CCG circuitry (12, 13) further comprises at least two capacitors (15, 16) arranged to provide capacitive coupling, and wherein a driving voltage (VDD; see (Cath)) is connected only to the CCG circuitry (12, 13) without a line connected to the PWM circuitry (see (11, 14); see Page 6, Para. [0077]-[0078] and [0080]; and Page 6 through Page 7, Para. [0081]-[0086]).
As pertaining to Claim 5, Watanabe discloses (see Fig. 1A and Fig. 1B) that the PMW circuitry (11, 14) and CCG circuitry (12, 13) each comprise a plurality of switching TFTs (i.e., (11, 14) and (12, 13); again, see Page 6, Para. [0077]-[0078]).
As pertaining to Claim 7, Watanabe discloses (see Fig. 1A and Fig. 1B) a line in which the CCG data voltage (Com) is branched and supplied to the PWM circuitry (11, 14) and the CCG circuitry (12, 13), respectively (again, see Page 6, Para. [0077]-[0078]).
As pertaining to Claim 8, Watanabe discloses (see Fig. 1A and Fig. 1B) that the driving circuit (10) operates by being divided in a total of 5 steps of:
a first step (see (T0) in Fig. 1B) in which a current of the micro LED (17) is blocked;
a second step (see (T1) in Fig. 1B) in which PWM data application (see (S1)) and compensation are performed;
a third step (see (T2) in Fig. 1B) in which compensation in the CCG circuitry (12, 13) is achieved after PWM data application (see (S1)) to the PWM circuitry (11, 14) and CCG circuitry (12, 13) is completed;
a fourth step (see any time between (T2) and (T3) in Fig. 1B) in which the CCG data voltage (Com) is applied to the CCG circuitry (12, 13) and capacitive coupling is caused by at least two capacitors (see (15, 16)); and
a fifth step (see “Lighting” in Fig. 1B) in which the micro LED (17) emits light while a current flows to the CCG circuitry driving transistor (12; see Page 6 through Page 7, Para. [0081]-[0086]).
As pertaining to Claim 9, Watanabe discloses (see Fig. 1A and Fig. 1B) that in the first step (see (T0) in Fig. 1B), a switching transistor (12) directly connected to the micro LED (17) is turned off to block the current of the micro LED (17), and
in the second step (see (T1) in Fig. 1B), the voltage is stored in the capacitor (i.e., see either of (15) or (16)) connected to the two data voltages as the CCG data voltage (Com) and PWM data voltage (i.e., the voltage provided by (S1)) are applied to the PWM circuitry (see (11, 14); and again, see Page 6 through Page 7, Para. [0081]-[0086]).
As pertaining to Claim 10, Watanabe discloses (see Fig. 1A and Fig. 1B) that in the fifth step (see “Lighting” in Fig. 1B), the voltage increases slowly as a Vsweep signal (see (G3)) in a triangle wave form is applied, and as the driving transistor (11) of the PWM circuitry (11, 14) is turned on, a first capacitor (16) comprised in the CCG circuitry (12, 13) is discharged and light emission of the micro LED (17) can be stopped (again, see Page 6 through Page 7, Para. [0081]-[0086]).
As pertaining to Claim 11, Watanabe discloses (see Fig. 1A and Fig. 1B, and see Fig. 2A and Fig. 2B) a display device (see (20) in Fig. 2A and Page 4, Para. [0060]) comprising a driving circuit (10) of a micro LED (17), comprising
a display panel (again, see (20) in Fig. 2A) comprising a pixel array (21) in which pixels (i.e., see any groups of (10)) composed of a plurality of inorganic light emitting elements (17) are arranged in a plurality of row lines (i.e., horizontal lines), and subpixel circuits (i.e., see any (10)) which are prepared for each of the plurality of inorganic light emitting elements (17), and provide a driving current to the inorganic light emitting elements (17; see Page 6, Para. [0074]-[0075] and [0077]-[0078]); and
a driver (see (22, 23) in Fig. 2A) which sets an image data voltage (see (S1)) to the subpixel circuits (10) of the display panel (20) in row line order, during the data setting period (see (T1, T2) in Fig. 1B corresponding to (T11, T12) and (T12, T13) in Fig. 2B for row lines “1” and “2”, for example), and drives the subpixel circuits (10) so that the driving current is provided to the inorganic light emitting elements (17) of the pixel array (21) in row line order, based on a sweep signal (Vsweep; see (G3)) which sweeps from a first voltage (i.e., a minimum voltage) to a second voltage (i.e., a maximum voltage; see Fig. 1B and Fig. 2B) and the set image data voltage (i.e., the voltage provided by (S1)), during the light emission period (see “Lighting” in Fig. 1B and Fig. 2B), wherein the subpixel circuits (10), comprise
a PWM circuitry (11, 14) controlling light emitting time of a micro LED (17); and
a CCG circuitry (12, 13) controlling a constant current to flow during light emission of the micro LED (17; see Page 6 through Page 7, Para. [0081]-[0086] in combination with Page 7, Para. [0089]-[0099]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 3-4 are rejected under 35 U.S.C. 103 as being unpatentable over Watanabe in view of Jung et al. (hereinafter “Jung” US 2022 / 0225481).
As pertaining to Claim 3, Watanabe discloses (see Fig. 1A and Fig. 1B) that the PMW circuitry (11, 14) comprises two switching transistors (11, 14), and the CCG circuitry (12, 13) comprises two switching transistors (12, 13) and two capacitors (see (15, 16); and see Page 6, Para. [0077]-[0078]).
Watanabe does not disclose that the PWM circuitry comprises a total of four switching transistors and one capacitor, and the CCG circuitry comprises a total of three switching transistors and two capacitors. However, the claimed switching transistors and capacitors of the claimed PWM circuitry and CCG circuitry are entirely arbitrary and not claimed to have any particular configuration or function. In this regard, one of ordinary skill in the art would have readily appreciated that modifications of the PWM circuitry and CCG circuitry disclosed by Watanabe would be necessary in order to adapt the teachings of Watanabe to a desired application.
In the same field of endeavor, Jung discloses (see Fig. 7) an application in which a micro LED driving circuit comprises a PWM circuitry (320) and a CCG circuitry (310; see Page 11, Para. [0166]-[0167]). Jung discloses that the PWM circuitry (320) comprises two switching transistors (331, 332) configured to be turned on/off in order to control electromagnetic interference (Emi) by separating the PWM circuitry (320) from a power source (VDD) and from the CCG circuitry (310), respectively, and a capacitor (341) configured to received and store a sweep volage (Vsweep; see Page 11 through Page 12, Para. [0178], [0181], and [0183]). Jung further discloses that the CCG circuitry (310) comprises a transistor (334) configured to be turned on/off in order to control electromagnetic interference (Emi) by separating the CCG circuitry (310) from a micro LED (200; see Page 12, Para. [0182]). It is a general goal of Jung to provide a high luminance and high resolution display panel (see Page 1, Para. [0003]). Further, Jung expressly suggests a means for reducing electromagnetic interference in a micro LED driving circuit through the implementation of additional switching transistors and/or capacitors not provided by the driving circuit of Watanabe.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Watanabe with the teachings of Jung, such that the PWM circuitry (11, 14) disclosed by Watanabe further includes the additional two switching transistors and capacitor suggested by Jung, and the CCG circuitry (12, 13) disclosed by Watanabe further includes the additional switching transistor suggested by Jung, so that the PWM circuitry comprises a total of four switching transistors and one capacitor, and the CCG circuitry comprises a total of three switching transistors and two capacitors, in order to provide for a high luminance and high resolution display panel that supports the function disclosed by Watanabe while allowing for reduced electromagnetic interference as suggested by Jung.
As pertaining to Claim 4, Jung discloses (see Fig. 7) that one of the switching transistors (i.e., see (334)) of the CCG circuitry (310) is a switching transistor directly connected to the micro LED (200) to prevent a current from flowing into the micro LED (200) before operation of the driving circuit (again, see Page 12, Para. [0182]; and note that one of ordinary skill in the art would appreciate, given the combined teachings of Watanabe and Jung, that the transistor (334) of Jung is implemented in the driving circuit of Watanabe in the same manner in order to control electromagnetic interference (Emi) by separating the CCG circuitry from the micro LED).
Response to Arguments
Applicant's arguments filed 05 September 2025 have been fully considered but they are not persuasive. The applicant has argued that none of the references relied upon by the examiner in the prior Office Action, particularly Watanabe, teach or fairly suggest the claimed “PWM circuitry” and/or the claimed “CCG circuitry” of amended independent Claim 1. Specifically, the applicant has asserted that the teachings of Watanabe do not describe using a “double gate transistor in the PWM circuitry” to provide for “threshold voltage compensation” (see Remarks at Page 6); the teachings of Watanabe do not provide for “at least two capacitors arranged to provide capacitive coupling” (see Remarks spanning Pages 6 and 7); and the teachings of Watanabe do not provide for a “VDD” that is “connected only to the CCG circuitry” (see Remarks at Page 7). The applicant has further argued, with respect to dependent Claim 3, that the teachings of Jung, as relied upon by the examiner, do not suggest the “specific arrangement” of switching transistors and/or capacitors of the claimed invention, and do suggest switching transistors and/or capacitors to “precise control of light emission time” (see Remarks at Pages 7 and 8). The applicant is respectfully reminded that the claims must be given their broadest reasonable interpretation in view of the disclosure without reading features from the disclosure into the claims.
The examiner respectfully points out, with respect to independent Claim 1, that the claimed invention neither recites nor requires any specific function or measure for providing threshold voltage compensation of the driving transistor. The invention as claimed merely recites an arbitrary resulting feature of implementing a “PWM circuitry driving transistor” having a “double gate structure.” That is, the claimed invention neither recites nor requires that the claimed “double gate transistor” performs any specific function to produce any particular measurable result, and the claimed compensating for “threshold voltage shift of the driving TFT” is open to broad interpretation and can be attributable to any arbitrary feature of implementing a “double gate transistor.” Watanabe clearly provides for a PWM circuitry (11, 14) adjusting light emitting time of a micro LED (17) and comprising a PWM circuitry driving transistor (11) having a double gate structure (see Page 6, Para. [0074]-[0075] and [0077]-[0078]), and Watanabe clearly suggests that the double gate structure compensates for threshold voltage shift of the driving TFT (11; see Page 6 through Page 7, Para. [0081]-[0086]). There is no quantitative feature claimed for defining the metes and bounds of the claimed compensating for “threshold voltage shift of the driving TFT” that would distinguish the claimed compensating from any compensating that is provided by the structure disclosed by Watanabe. As such, any argument that the double gate transistor of Watanabe does not provide a particular means of compensating for threshold voltage shift of the driving TFT is moot.
Further, in this same regard with respect to independent Claim 1, the claimed invention requires “CCG circuitry” that “comprises at least two capacitors arranged to provide capacitive coupling.” Again, the claimed invention neither recites nor requires any structural and/or functional features relating to the claimed “at least two capacitors” that would limit the interpretation of the claimed invention to anything other than an arbitrary arrangement of “at least two capacitors.” Watanabe clearly provides at least two capacitors (15, 16) arranged to provide capacitive coupling. Again, any argument that the “at least two capacitors” disclosed by Watanabe do not provide some specific capacitive coupling feature is moot, as the claimed invention neither recites nor requires any structural and/or functional feature extending beyond “CCG circuitry” that comprises at least two capacitors arranged to provide an arbitrary “capacitive coupling.”
Further still, with respect to independent Claim 1, the claimed invention requires that “a driving volage (VDD) is connected only to the CCG circuitry without a line connected to the PWM circuitry.” Watanabe clearly provides for a driving voltage (see (Cath)) that is connected only to the CCG circuitry (12, 13) at the transistor (12). Watanabe does not provide for a separate line that is connected to the PWM circuitry (see (11, 14)). Again, any argument directed to unclaimed structural and/or functional features of the claimed “driving voltage” and/or “lines” connected to the CCG circuitry and/or PWM circuitry is moot.
Finally, with respect to dependent Claim 3, the applicant’s argument that the combined teachings of Watanabe and Jung do not provide for the “specific arrangement” of switching transistors and/or capacitors of the claimed invention is moot, as the claimed invention does not require any “specific arrangement” of switching transistor and/or capacitors, and further does not require any “precise control of light emission time.” The invention, as claimed, merely requires that the PWM circuitry comprises a total of four switching transistors and one capacitor, and the CCG circuitry comprises a total of three switching transistors and two capacitors in any arbitrary configuration to provide any arbitrary function. The combined teachings of Watanabe and Jung clearly provide this feature.
Therefore, the rejection of Claims 1, 3-5, and 7-11 is maintained.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Takahashi et al. (US 11,222,583) and Baumheinrich et al. (US 12,183,261) disclose LED driving circuits providing pulse width modulation (PWM) driving by comparing data voltages to modulation voltages.
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JASON M MANDEVILLE whose telephone number is (571)270-3136. The examiner can normally be reached Mon - Fri 7:30AM-4:00PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Chanh Nguyen can be reached at 571-272-7772. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JASON M MANDEVILLE/Primary Examiner, Art Unit 2623