Prosecution Insights
Last updated: October 02, 2026
Application No. 18/574,646

SEMICONDUCTOR OPTICAL ELEMENT

Non-Final OA §102§103§112
Filed
Dec 27, 2023
Priority
Jul 09, 2021 — nonprovisional of PCTJP2021025986
Examiner
VAN ROY, TOD THOMAS
Art Unit
Tech Center
Assignee
Mitsubishi Electric Corporation
OA Round
1 (Non-Final)
54%
Grant Probability
Moderate
1-2
OA Rounds
6m
Est. Remaining
92%
With Interview

Examiner Intelligence

Grants 54% of resolved cases
54%
Career Allowance Rate
428 granted / 789 resolved
-5.8% vs TC avg
Strong +38% interview lift
Without
With
+38.1%
Interview Lift
resolved cases with interview
Typical timeline
3y 3m
Avg Prosecution
43 currently pending
Career history
825
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
57.9%
+17.9% vs TC avg
§102
20.1%
-19.9% vs TC avg
§112
15.2%
-24.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 789 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 3 and 6 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 3 recites the limitation "one and the other region" in line 2. There is insufficient antecedent basis for this limitation in the claim as the regions have not been established, making the scope of the claim unclear. For purposes of examination, the limitation will be read as “first and second regions”. Claim 6 recites the limitation "from both end surfaces" in line 4. There is insufficient antecedent basis for this limitation in the claim as the end surfaces have not been established, making the scope of the claim unclear. For purposes of examination, the limitation will be read as “from first and second surfaces”. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1-6, 11 is/are rejected under 35 U.S.C. 102a1/2 as being anticipated by Takagi et al. (US 6226310). With respect to claim 1, Takagi discloses a semiconductor optical element (fig.1/3a/24a) comprising: a first-conductivity-type semiconductor substrate (fig.3a #31; n type, col.7 lines 26-27); a stripe-shaped ridge structure (fig.3a #39) provided on the first-conductivity-type semiconductor substrate and including a first-conductivity-type cladding layer (fig.3a #42; col.7 lines 19-20, 30) and an active layer (fig.3a #44; col.7 line 39); a buried structure (fig.3a #50/51) buried so as to cover both side surfaces of the ridge structure; a second-conductivity-type ridge upper cladding layer (fig.3a thin portion of #49; fig.24a thin portion of #49, also seen in fig.17a; p type, col.8 lines 6-7) provided above the ridge structure; a second-conductivity-type cladding layer (fig.3a thicker portions of #49, seen also in fig.24a and fig.17a) and a second-conductivity-type contact layer (fig.3a #41, col.8 line 10) provided on a surface of the buried structure; a stripe-shaped recess (fig.17a/24a thinned portion) provided in the second-conductivity-type cladding layer and the second-conductivity-type contact layer (col.13 lines 8-10), the stripe-shaped recess having a bottom surface formed of an upper surface of the second-conductivity-type ridge upper cladding layer (fig.17a/24a top of thin portion of #49 forms bottom of recess), and side surfaces formed of the second-conductivity-type cladding layer and the second- conductivity-type contact layer (fig.17a/24a sides of recess formed by thick portions of #49 and #41); a stripe-shaped mesa structure including the ridge structure (fig.3a central mesa between #52s) and having both side surfaces formed by a mesa extending from the second-conductivity-type contact layer to the first-conductivity-type semiconductor substrate (fig.3a sides of mesa extend from #31 to #41); and an insulating film (fig.3a #53/54) covering the bottom surface and the side surfaces of the recess (fig.24a, see also fig.20a), a surface of the second-conductivity-type contact layer (fig.3a top/sides of #41 covered), and the both side surfaces of the mesa structure (fig.3a each side of central mesa covered). With respect to claim 2, Takagi discloses a stripe-shaped insulating film opening provided in the insulating film on the second- conductivity-type contact layer (fig.3a #55, see also fig.23a); and a second-conductivity-type-side electrode in contact with the second-conductivity-type contact layer through the insulating film opening (fig.3a #36). With respect to claim 3, Takagi discloses a plurality of the insulating film openings are provided in one and the other region of the upper surface of the mesa structure that is divided by the recess, respectively (fig.23a an opening formed on either side of the recess area #78). With respect to claim 4, Takagi discloses a central axis of the ridge structure and a central axis of the recess are separated by a predetermined distance from a central axis of the mesa structure in a direction perpendicular to a surface of the first-conductivity-type semiconductor substrate (fig.3a, all axes are aligned thereby having a predetermined separation distance of 0). With respect to claim 5, Takagi discloses a cross section of the recess in a direction perpendicular to a cavity has a U-shape (fig.7a, cavity runs left/right, recess #78 is U-shaped in the depicted perpendicular cross-sectional view). With respect to claim 6, Takagi discloses the second-conductivity-type ridge upper cladding layer and the recess are not provided in a predetermined region from both end surfaces in a cavity direction (fig.17a recess #78 is provided spaced from left and right end surfaces in the left/right direction). With respect to claim 11, Takagi discloses the first-conductivity-type is an n-type and the second-conductivity-type is a p-type (see claim 1 rejection). Claim(s) 7, 16 is/are rejected under 35 U.S.C. 102a2 as being anticipated by Yokokawa (US 2022/0360048; note foreign priority with support). With respect to claim 7, Yokokawa discloses semiconductor optical element (fig.10) comprising: a first-conductivity-type semiconductor substrate (fig.10 #232; understood to be of the first type, abstract, [0007], [0046], claim 1; n-type); a stripe-shaped ridge structure (fig.10 central ridge loosely indicated by #210) provided on the first-conductivity-type semiconductor substrate and including a first-conductivity-type cladding layer (fig.10 #220, [0038]) and an active layer (fig.10 #216, [0087]); a buried structure (fig.10 #218) buried so as to cover both side surfaces of the ridge structure; a second-conductivity-type first cladding layer (fig.10 #222 on left side of central mesa, [0089], p-type) and a second-conductivity-type contact layer (fig.10 #244, [0089]) provided on a surface of the buried structure (note #218 extends through center, left, and right sides) on one side of the ridge structure (fig.10 #244 formed over ridge and on left/right sides of central mesa); a second-conductivity-type ridge upper cladding layer (fig.10 #222 over central mesa/ridge) provided above the ridge structure; a second-conductivity-type second cladding layer (fig.10 #222 on right side of central mesa) provided on the surface of the buried structure on the other side of the ridge structure and forming the same plane as an upper surface of the ridge upper cladding layer (fig.10 central #222 same height as right side #222); a step portion formed by upper surfaces of the second-conductivity-type second cladding layer and the second-conductivity-type ridge upper cladding layer, and side surfaces of the second-conductivity-type first cladding layer and the second-conductivity-type contact layer (fig.10 “step” can be the tops of the right and central regions, along with the insides of the trenches #248); a stripe-shaped mesa structure including the ridge structure and having both side surfaces formed by a mesa which has one side reaching the first-conductivity-type semiconductor substrate from the second-conductivity-type contact layer and the other side reaching the first-conductivity-type semiconductor substrate from the step portion (fig.10 trenches #248 form central mesa which reaches the denoted layers); an insulating film covering the step portion, the second-conductivity-type contact layer, and the both side surfaces of the mesa structure (fig.10 #238); a stripe-shaped insulating film opening provided in the insulating film on the second- conductivity-type contact layer (fig.10 below #250); and a second-conductivity-type-side electrode in contact with the second-conductivity-type contact layer through the insulating film opening (fig.10 #250). PNG media_image1.png 566 951 media_image1.png Greyscale With respect to claim 16, Yokokawa discloses the first-conductivity-type is an n-type and the second-conductivity-type is a p-type ([0114]). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Takagi in view of Kneissi et al (RE40230). With respect to claim 8, Takagi teaches the device outlined above, but does not teach the second-conductivity-type ridge upper cladding layer has a layer thickness of 0.3 um or more and 0.4 um or less. Kneissi teaches a related ridge laser device integrated with a modulator (fig.4b) which includes an isolation trench (fig.4b #114) and that the depth of the trench into the upper clad, and thereby the thickness of the upper clad, is a result effective variable chosen to balance electrical isolation and optical coupling (col.7 lines 35-42). Therefore it would have been obvious to one of ordinary skill in the art before the filing of the instant application to adapt the thickness of the upper cladding layer of Takagi to be 0.3um or more and 0.4um or less as a means of optimizing the electrical isolation and optical coupling between the laser and modulator as taught by Kneissi (see also MPEP 2144.05 II A/B). Claim(s) 9-10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Takagi in view of Nakahara et al. (US 2018/0090910). With respect to claims 9 and 10, Takagi teaches the device outlined above, but does not teach the buried structure includes at least a second-conductivity-type first buried layer and a first-conductivity-type second buried layer OR the buried structure includes a first-conductivity-type first buried layer, a second- conductivity-type second buried layer, and a first-conductivity-type third buried layer. Nakahara teaches a related laser deice (fig.5) which includes a buried structure (fig.5 #55) that includes a first-conductivity-type first buried layer (fig.5 #71), a second- conductivity-type second buried layer (fig.5 #72), and a first-conductivity-type third buried layer (fig.5 #73; [0061]). It would have been obvious to one of ordinary skill in the art before the filing of the instant application to adapt the buried layer structure of Takagi to make use of the 3 layer buried layer structure of Nakahara to further insure the blocking of current, and to provide an alternate form for the buried layer as Nakahara has taught the buried layer(s) to be largely interchangeable to accomplish the same goal ([0068]). See also MPEP 2144.06 II, 2144.07. Claim(s) 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Takagi. With respect to claim 12, Takagi teaches the device outlined above, but does not teach the first-conductivity-type is a p-type and the second-conductivity-type is an n-type. The Examiner takes Official Notice that reversing the doping type (n to p, p to n) of semiconductor light emitting devices is well known in the art and provides alternative material choices, production methods, and reversed electrical contact options. Therefore, it would have been obvious to one of ordinary skill in the art before the filing of the instant application to adapt the device of Takagi to reverse the p/n doping to provide alternate material choices, production methods, and reversed electrical contacts (see also MPEP 2144.07). Claim(s) 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yokokawa in view of Fukunaga (US 6195373). With respect to claim 13, Yokokawa teaches the device outlined above, but does not teach the second-conductivity-type ridge upper cladding layer has a layer thickness of 0.3 um or more and 0.4 um or less. Fukunaga teaches a related ridge laser device integrated with a modulator (fig.4b) which includes an isolation trench (fig.1) and that the thickness of the upper clad is a result effective variable chosen to control the optical mode passing therethrough (col.1 lines 50-54). Therefore, it would have been obvious to one of ordinary skill in the art before the filing of the instant application to adapt the thickness of the upper cladding layer of Yokokawa to be 0.3um or more and 0.4um or less as a means of optimizing the control of the optical mode as taught by Fukunaga (see also MPEP 2144.05 II A/B). Claim(s) 14-15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yokokawa in view of Nakahara. With respect to claims 14 and 15, Yokokawa teaches the device outlined above, but does not teach the buried structure includes at least a second-conductivity-type first buried layer and a first-conductivity-type second buried layer OR the buried structure includes a first-conductivity-type first buried layer, a second- conductivity-type second buried layer, and a first-conductivity-type third buried layer. Nakahara teaches a related laser deice (fig.5) which includes a buried structure (fig.5 #55) that includes a first-conductivity-type first buried layer (fig.5 #71), a second- conductivity-type second buried layer (fig.5 #72), and a first-conductivity-type third buried layer (fig.5 #73; [0061]). It would have been obvious to one of ordinary skill in the art before the filing of the instant application to adapt the buried layer structure of Yokokawa to make use of the 3 layer buried layer structure of Nakahara to further insure the blocking of current, and to provide an alternate form for the buried layer as Nakahara has taught the buried layer(s) to be largely interchangeable to accomplish the same goal ([0068]). See also MPEP 2144.06 II, 2144.07. Claim(s) 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yokokawa. With respect to claim 17, Yokokawa teaches the device outlined above, but does not teach the first-conductivity-type is a p-type and the second-conductivity-type is an n-type. The Examiner takes Official Notice that reversing the doping type (n to p, p to n) of semiconductor light emitting devices is well known in the art and provides alternative material choices, production methods, and reversed electrical contact options. Therefore, it would have been obvious to one of ordinary skill in the art before the filing of the instant application to adapt the device of Yokokawa to reverse the p/n doping to provide alternate material choices, production methods, and reversed electrical contacts (see also MPEP 2144.07). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Please see the included pto892 for a list of related references directed to devices with similar configurations to claims 1/7. Any inquiry concerning this communication or earlier communications from the examiner should be directed to TOD THOMAS VAN ROY whose telephone number is (571)272-8447. The examiner can normally be reached M-F: 8AM-430PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, MinSun Harvey can be reached at 571-272-1835. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /TOD T VAN ROY/Primary Examiner, Art Unit 2828
Read full office action

Prosecution Timeline

Dec 27, 2023
Application Filed
Aug 17, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

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Prosecution Projections

1-2
Expected OA Rounds
54%
Grant Probability
92%
With Interview (+38.1%)
3y 3m (~6m remaining)
Median Time to Grant
Low
PTA Risk
Based on 789 resolved cases by this examiner. Grant probability derived from career allowance rate.

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