DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Claims 1-6 are pending and have been examined. Claim Rejections - 35 USC § 102 The following is a quotation of 35 U.S.C. 102(a)(1) that forms the basis for the rejection set forth in this Office action: (a) NOVELTY; PRIOR ART.—A person shall be entitled to a patent unless— (1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention; Notes : when present, hyphen separated fields within the hyphens (- -) represent, for example, as ( 30A - Fig 2B - [0128]) = (element 30A - Figure No. 2B - Paragraph No. [0128]). For brevity, the texts “Element”, “Figure No.” and “Paragraph No.” shall be excluded, though; additional clarification notes may be added within each field. The number of fields may be fewer or more than three indicated above. The same conventions apply to Column and Sentence, for example (19:14-20) = (column19:sentences 14-20). These conventions are used throughout this document. The following is a quotation of 35 U.S.C. 102(a)(2) that forms the basis for the rejection set forth in this Office action: (a) NOVELTY; PRIOR ART.—A person shall be entitled to a patent unless— (2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Notes : when present, hyphen separated fields within the hyphens (- -) represent, for example, as ( 30A - Fig 2B - [0128]) = (element 30A - Figure No. 2B - Paragraph No. [0128]). For brevity, the texts “Element”, “Figure No.” and “Paragraph No.” shall be excluded, though; additional clarification notes may be added within each field. The number of fields may be fewer or more than three indicated above. The same conventions apply to Column and Sentence, for example (19:14-20) = (column19:sentences 14-20). These conventions are used throughout this document. Claims 1-4 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lee at al. (US 20060068601 A1 – hereinafter Lee) Regarding independent claim 1 , Lee teaches A method of manufacturing an aluminum nitride (AIN) layer ([0037] – “an AlN layer is grown” – hereinafter ‘ AlN ’) , comprising: preparing a growth substrate (2 – Fig. 2 – {[0025] – “substrate 2”}, {[0065] – “substrate can be made from materials other than silicon adoptable as long as they permit epitaxial growth of nitride semiconductors, examples being sapphire, silicon compound”}) ; growing ([0024] – “buffer layers 9 and 10 are successively grown by epitaxy on the silicon substrate 2”) Al.sub.1-v-wGa.sub.vIn.sub.wN (0≤v<1, 0≤w<1, v+w <1) layer (9 – Fig. 3 – [0028] – “first buffer layers 9 are all made from an aluminum-containing nitride semiconductor selected from among the Groups III-V compound semiconductors that are generally defined as: Al.sub.xM.sub.yGa.sub.1-x-yN where M is at least either of indium and boron; the subscript x is a numeral that is greater than zero and equal to or less than one; the subscript y is a numeral that is equal to or greater than zero and less than one; and the sum of x and y is equal to or less than one}) on the growth substrate (2) ; etching ([0039] – “Those parts of the surface of the second buffer layer 10 which are left exposed by the sparse deposition of AlN will then be subjected to the etching action of the reactor atmosphere, with the consequent creation of the voids 15 in the second buffer layer”) the Al.sub.1-v-wGa.sub.vIn.sub.wN (0≤v<1, 0≤w<1, v+w <1) layer (9) by decomposing and evaporating gallium (Ga) and indium (In) ([0038] – “The lowermost non- sublayered , open-worked second buffer layer 10 is created upon completion of the lowermost multi- sublayered first buffer layer 9. The same material as that of the second sublayers L.sub.2 of the first buffer layer 9 may be grown in the same MOVPE reactor for creation of the second buffer layer 10. However, the second buffer layers 10 may be made from a different material, such as InGaN , from that of the second sublayers L.sub.2 of the first buffer layer 9. The lowermost second buffer layer 10 thus grown on the lowermost first buffer layer 9 is not yet open-worked but is to be in the course of the ensuing fabrication of the lowest first sublayer L.sub.1 of the second lowest multi- sublayered first buffer layer 9”) therein to obtain a porous ([0039] – “Those parts of the surface of the second buffer layer 10 which are left exposed by the sparse deposition of AlN will then be subjected to the etching action of the reactor atmosphere, with the consequent creation of the voids 15 in the second buffer layer” – this describes a porous layer) Al.sub.1-v-wGa.sub.vIn.sub.wN (0≤v<1, 0≤w<1, v+w <1) layer (9) having a plurality of air voids (15 – Fig. 2 – [0040] – “voids 15”) ; forming a plurality of air voids (15) in the growth substrate (2) using the porous Al.sub.1-v-wGa.sub.vIn.sub.wN (0≤v<1, 0≤w<1, v+w <1) layer (9) as an etching mask ([0070] – “The voids 15 in the second buffer layers 10 of the buffer region 3 or 3' may be created by masking and etching”) ; and growing an AlN layer ([0037] – “For making the lowermost multi- sublayered first buffer layer 9 on this substrate 2, the first and second sublayers L.sub.1 and L.sub.2 may be alternately grown a prescribed number of times by the known method of metal organic vapor phase epitaxy (MOVPE). If the first sublayers L.sub.1 are to be made from AlN , trimethyl aluminum (TMA) and ammonia (NH.sub.3) may be charged in required proportions into the MOVPE reactor until an AlN layer is grown each time to a thickness of five nanometers or so”) on the porous Al.sub.1-v-wGa.sub.vIn.sub.wN (0≤v<1, 0≤w<1, v+w <1) layer (9) . Regarding claim 2 , Lee teaches claim 1 from which claim 2 depends. Lee further teaches wherein the growing and etching of an Al.sub.1-v- wGa.sub.vIn.sub.wN (0≤v<1, 0≤w<1, v+w <1) layer ({[0037] – “fabrication of the semiconductor wafer 1, configured as above described with reference to FIGS. 1-3, starts with the preparation of the silicon substrate 2”}, {[0039] – “Then comes the fabrication of that lowest first sublayer L.sub.1 of the second lowest multi- sublayered first buffer layer 9 following the creation of the not-yet-open-worked lowermost second buffer layer 10. The lowest first sublayer L.sub.1 of the second lowest first buffer layer 9 is grown on the not-yet-open-worked lowermost second buffer layer 10 by introducing TMA into the reactor at a reduced rate”) are repeated several times (Fig. 3 shows multiple layers formed) before the forming of a plurality of air voids (15) in the growth substrate (2) . Regarding claim 3 , Lee teaches claim 1 from which claim 3 depends. Lee further teaches wherein the etching and the growing of an AlN layer ( AlN ) are repeated several times (n times) ({[0037] – “fabrication of the semiconductor wafer 1, configured as above described with reference to FIGS. 1-3, starts with the preparation of the silicon substrate 2”}, {[0039] – “Then comes the fabrication of that lowest first sublayer L.sub.1 of the second lowest multi- sublayered first buffer layer 9 following the creation of the not-yet-open-worked lowermost second buffer layer 10. The lowest first sublayer L.sub.1 of the second lowest first buffer layer 9 is grown on the not-yet-open-worked lowermost second buffer layer 10 by introducing TMA into the reactor at a reduced rate”) in the growing of an Al.sub.1-v-wGa.sub.vIn.sub.wN (0≤v<1, 0≤w<1, v+w <1) (9) . Regarding claim 4 , Lee teaches claim 1 from which claim 4 depends. Lee further teaches wherein the Al.sub.1-v-wGa.sub.vIn.sub.wN (0≤v<1, 0≤w<1, v+w <1) (9) layer is an Al.sub.1-vGa.sub.vN (0<v<1) layer ([0029] – “Thus the second buffer sublayers L.sub.2 can be made from such compounds as GaN , InGaN , AlInN , AlGaN , and AlInGaN , of which GaN is currently preferred”) . Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Notes : when present, hyphen separated fields within the hyphens (- -) represent, for example, as ( 30A - Fig 2B - [0128]) = (element 30A - Figure No. 2B - Paragraph No. [0128]). For brevity, the texts “Element”, “Figure No.” and “Paragraph No.” shall be excluded, though; additional clarification notes may be added within each field. The number of fields may be fewer or more than three indicated above. The same conventions apply to Column and Sentence, for example (19:14-20) = (column19:sentences 14-20). These conventions are used throughout this document. Claims 5 and 6 are rejected under 35 U.S.C. 103 as being unpatentable over Lee in view of Keller et al. (US 20240063340 A1 – hereinafter Keller). Regarding claim 5 , Lee teaches claim 1 from which claim 5 depends. Lee further teaches the porous Al.sub.1-v-wGa.sub.vIn.sub.wN (0≤v<1, 0≤w<1, v+w <1) layer (9) . Lee does not expressly disclose the other limitations of claim 5. However, in an analogous art, Keller teaches further comprising: growing an aluminum (Al)-containing Group III-nitride ([0266] – “Group III-N, Al.sub .(1-x-y) In.sub.yGa.sub.xN where 0<x<1 and 0<y<1, or AlInGaN , as used herein”) semiconductor diode region ([0012] – “One or more further embodiments of the present invention allow the fabrication of light emitting diodes (LEDs) (especially micro-LEDs) with minimal etch damage or without etch damage”) on the AIN layer ([0766] – “ AlN allows for light emitting diodes (LEDs)”) ; and separating the growth substrate from the Group III-nitride semiconductor diode region ([0672] – “comprising: [0673] growing a semiconductor layer on or above a growth substrate, wherein the semiconductor layer is coherently strained; [0674] bonding the semiconductor layer directly or indirectly to the compliant substrate; [0675] removing the growth substrate or at least partially removing the growth substrate from the semiconductor layer, so that the semiconductor layer becomes relaxed or at least partially relaxed; and [0676] depositing the device structure on the semiconductor layer”) using the porous Al.sub.1-v-wGa.sub.vIn.sub.wN (0≤v<1, 0≤w<1, v+w <1) layer as a sacrificial layer ([0284] – “First sacrificial layer may be used for original substrate removal”) . Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the growth substrate structure and removing it as taught by Keller into Lee. An ordinary artisan would have been motivated to use the known technique of Keller in the manner set forth above to produce the predictable result [0035] – “so that a surface of the intermediate semiconductor layer, having an opposite polarity to an interface with the porous semiconductor layer, is exposed so as to flip a polarity of the device.” Regarding claim 6 , Lee teaches claim 1 from which claim 6 depends. Lee does not expressly disclose the limitations of claim 6. However, in an analogous art, Keller teaches wherein the Group III-nitride semiconductor diode region includes an active region ([0574] – “light emitting devices include an active region having a different indium content and emitting a different wavelength of electromagnetic radiation”) emitting ultraviolet light ([0524] – “The ( Al,Ga )—N alloy system is very attractive for ultraviolet (UV) optoelectronic devices”) . Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the diode emitting characteristics as taught by Keller into Lee. An ordinary artisan would have been motivated to use the known technique of Keller in the manner set forth above to produce the predictable result a device capable of emitting wavelength of light corresponding to ultraviolet. To do so would have merely been to apply a known technique to a known device ready for improvement to yield predictable results, KSR Int'l Co. v. Teleflex Inc. , 550 U.S. 398, 82 USPQ2d 1385 (2007), MPEP 2143 I. D. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to GARY ABEL whose telephone number is (571) 272-0246. The examiner can normally be reached Monday - Friday 8:00 am - 5:00 pm (Eastern). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, CHAD M DICKE can be reached on (571) 270-7996. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and ttps://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /GRA/ Examiner, Art Unit 2897 /CHAD M DICKE/ Supervisory Patent Examiner, Art Unit 2897